Patent application number | Description | Published |
20080315908 | DIRECT DETECT SENSOR FOR FLAT PANEL DISPLAYS - Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential. | 12-25-2008 |
20090295425 | DIRECT DETECT SENSOR FOR FLAT PANEL DISPLAYS - Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential. | 12-03-2009 |
20100045334 | DIRECT DETECT SENSOR FOR FLAT PANEL DISPLAYS - Each sensor of a linear array of sensors includes, in part, a sensing electrode and an associated feedback circuit. The sensing electrodes are adapted to be brought in proximity to a flat panel having formed thereon a multitude of pixel electrodes in order to capacitively measure the voltage of the pixel electrodes. Each feedback circuit is adapted to actively drive its associated electrode via a feedback signal so as to maintain the voltage of its associated electrode at a substantially fixed bias. Each feedback circuit may include an amplifier having a first input terminal coupled to the sensing electrode and a second input terminal coupled to receive a biasing voltage. The output signal of the amplification circuit is used to generate the feedback signal that actively drives the sensing electrode. The biasing voltage may be the ground potential. | 02-25-2010 |
20100084744 | Thermal processing of substrates with pre- and post-spike temperature control - Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a scan path. A first image may serve to effect spike annealing of the substrates while another may be used to provide auxiliary heat treatment to the substrates before and/or after the spike annealing. Control over the temperature profile of the prespike and/or postspike may also reduce stresses and strains generated in the wafers. Also provided are microelectronic devices formed using the inventive apparatuses and methods. | 04-08-2010 |
20100140768 | Systems and processes for forming three-dimensional circuits - Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with reach other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat treated, the initial microstructure of the circuit layer having unsuitable properties is transformed into one that exhibits electronic properties suitable for forming circuit feature therein. Also provided are three-dimensional circuit structures optionally formed by the inventive systems and/or processes. | 06-10-2010 |
20100283978 | LED-based UV illuminators and lithography systems using same - An LED-based UV illuminator is disclosed that includes a plurality of LED light sources that emit UV light, and a plurality of dichroic mirrors. The dichroic mirrors are arranged relative to the LED light sources and configured to direct the UV light along a common optical path. A light homogenizer, such as a light pipe, is arranged along the common optical path and acts to homogenize the UV light. The UV illuminator has a collection efficiency of greater than 50% and an illumination output equal to or greater than 850 mW/mm | 11-11-2010 |
20110038704 | Sub-field enhanced global alignment - Sub-field enhanced global alignment (SEGA) methods for aligning reconstituted wafers in a lithography process are disclosed. The SEGA methods provide the ability to accommodate chip placement errors for chips supported by a reconstituted wafer when performing a lithographic process having an overlay requirement. The SEGA methods include measuring chip locations to determine sub-fields of the reconstituted wafer over which enhanced global alignment (EGA) can be performed on the chips therein to within the overlay requirement. The SEGA methods further included individually performing EGA over the respective sub-fields. The SEGA methods take advantage of the benefits of both EGA and site-by-site alignment and are particularly applicable to wafer-level packing lithographic processes such as fan-out wafer-level packaging. | 02-17-2011 |
20110089523 | SYSTEMS AND PROCESSES FOR FORMING THREE-DIMENSIONAL CIRCUITS - Provided are systems and processes for forming a three-dimensional circuit on a substrate. A radiation source produces a beam that is directed at a substrate having an isolating layer interposed between circuit layers. The circuit layers communicate with reach other via a seed region exhibiting a crystalline surface. At least one circuit layer has an initial microstructure that exhibits electronic properties unsuitable for forming circuit features therein. After being controllably heat treated, the initial microstructure of the circuit layer having unsuitable properties is transformed into one that exhibits electronic properties suitable for forming circuit feature therein. Also provided are three-dimensional circuit structures optionally formed by the inventive systems and/or processes. | 04-21-2011 |
20110108796 | Laser spike annealing for GaN LEDs - Methods of performing laser spike annealing (LSA) in forming gallium nitride (GaN) light-emitting diodes (LEDs) as well as GaN LEDs formed using LSA are disclosed. An exemplary method includes forming atop a substrate a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method also includes performing LSA by scanning a laser beam over the p-GaN layer. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance. | 05-12-2011 |
20110129948 | Optical alignment methods for forming LEDs having a rough surface - A method of aligning a wafer when lithographically fabricating a light-emitting diode (LED). The method includes forming on the wafer at least one roughened alignment mark having a root-mean-square (RMS) surface roughness σ | 06-02-2011 |
20110278587 | Fast Annealing for GaN LEDs - Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance. | 11-17-2011 |
20110298093 | Thermal Processing of Substrates with Pre- and Post-Spike Temperature Control - Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a scan path. A first image may serve to effect spike annealing of the substrates while another may be used to provide auxiliary heat treatment to the substrates before and/or after the spike annealing. Control over the temperature profile of the prespike and/or postspike may also reduce stresses and strains generated in the wafers. Also provided are microelectronic devices formed using the inventive apparatuses and methods. | 12-08-2011 |
20110309374 | Fast thermal annealing of GaN LEDs - Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing having a time duration of 10 seconds or faster. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance. | 12-22-2011 |
20120062726 | Optical alignment systems for forming LEDs having a rough surface - An alignment system for aligning a wafer when lithographically fabricating LEDs having an LED wavelength λ | 03-15-2012 |
20120111838 | Thermal Processing of Substrates with Pre- and Post-Spike Temperature Contro - Provided are apparatuses and method for the thermal processing of a substrate surface, e.g., controlled laser thermal annealing (LTA) of substrates. The invention typically involves irradiating the substrate surface with first and second images to process regions of the substrate surface at a substantially uniform peak processing temperature along a scan path. A first image may serve to effect spike annealing of the substrates while another may be used to provide auxiliary heat treatment to the substrates before and/or after the spike annealing. Control over the temperature profile of the prespike and/or postspike may also reduce stresses and strains generated in the wafers. Also provided are microelectronic devices formed using the inventive apparatuses and methods. | 05-10-2012 |
20120153323 | Photolithographic led fabrication using phase-shift mask - Photolithographic methods of forming a roughened surface for an LED to improve LED light emission efficiency are disclosed. The methods include photolithographically imaging a phase-shift mask pattern onto a photoresist layer of a substrate to form therein a periodic array of photoresist features. The roughened substrate surface is created by processing the exposed photoresist layer to form a periodic array of substrate posts in the substrate surface. A p-n junction multilayer structure is then formed atop the roughened substrate surface to form the LED. The periodic array of substrate posts serve as scatter sites that improve the LED light emission efficiency as compared to the LED having no roughened substrate surface. The use of the phase-shift mask enables the use of affordable photolithographic imaging at a depth of focus suitable for non-flat LED substrates while also providing the needed resolution to form the substrate posts. | 06-21-2012 |
20130044301 | Programmable illuminator for a photolithography system - A programmable illuminator for a photolithography system includes a light source, a first optical system having a light uniformizing element, a programmable micro-mirror device, and a second optical system that forms an illumination field that illuminates a reticle. The programmable micro-mirror device can be configured to perform shutter and edge-exposure-blocking functions that have previously required relatively large mechanical devices. Methods of improving illumination field uniformity using the programmable illuminator are also disclosed. | 02-21-2013 |
20130267096 | Systems for and methods of laser-enhanced plasma processing of semiconductor materials - Systems for and methods of laser-enhanced plasma processing of semiconductor materials are disclosed. The method includes supporting a semiconductor material in a processing chamber interior and subjecting the semiconductor material to a plasma process. The method also includes simultaneously heating the wafer surface with a laser beam through a window in the processing chamber to increase the reaction rate of the plasma process. Other methods include performing laser heating of the semiconductor material before or after the plasma process but while the semiconductor material resides in the same chamber interior. | 10-10-2013 |
20130278109 | Betavoltaic power sources for mobile device applications - A betavoltaic power source for mobile devices and mobile applications includes a stacked configuration of isotope layers and energy conversion layers. The isotope layers have a half-life of between about 0.5 years and about 5 years and generate radiation with energy in the range from about 15 keV to about 200 keV. The betavoltaic power source is configured to provide sufficient power to operate the mobile device over its useful lifetime. | 10-24-2013 |
20130330844 | Laser annealing systems and methods with ultra-short dwell times - Laser annealing systems and methods for annealing a semiconductor wafer with ultra-short dwell times are disclosed. The laser annealing systems can include one or two laser beams that at least partially overlap. One of the laser beams is a pre-heat laser beam and the other laser beam is the annealing laser beam. The annealing laser beam scans sufficiently fast so that the dwell time is in the range from about 1 μs to about 100 μs. These ultra-short dwell times are useful for annealing product wafers formed from thin device wafers because they prevent the device side of the device wafer from being damaged by heating during the annealing process. Embodiments of single-laser-beam annealing systems and methods are also disclosed. | 12-12-2013 |
20140021826 | Betavoltaic power sources for transportation applications - A betavoltaic power source for transportation devices and applications is disclosed, wherein the device having a stacked configuration of isotope layers and energy conversion layers. The isotope layers have a half-life of between about 0.5 years and about 5 years and generate radiation with energy in the range from about 15 keV to about 200 keV. The betavoltaic power source is configured to provide sufficient power to operate the transportation device over its useful lifetime. | 01-23-2014 |
20140049978 | LED-based photolithographic illuminator with high collection efficiency - An LED-based photolithographic illuminator with high collection efficiency is disclosed. The illuminator utilizes an array of LEDs, wherein each LED has an LED die and a heat sink. The LED dies are imaged onto the input end of a homogenizer rod to substantially cover the input end without inclusion of the non-light-emitting heat sink sections of the LED. A microlens array is used to image the LED dies. The collection efficiency of the illuminator is better than 50% and the illumination uniformity at the output end of the light homogenizer is within +/−2%. | 02-20-2014 |
20140057457 | Non-melt thin-wafer laser thermal annealing methods - Methods of annealing a thin semiconductor wafer are disclosed. The methods allow for high-temperature annealing of one side of a thin semiconductor wafer without damaging or overheating heat-sensitive electronic device features that are either on the other side of the wafer or embedded within the wafer. The annealing is performed at a temperature below the melting point of the wafer so that no significant dopant redistribution occurs during the annealing process. The methods can be applied to activating dopants or to forming ohmic contacts. | 02-27-2014 |
20140097171 | Ultrafast laser annealing with reduced pattern density effects in integrated circuit fabrication - Systems and methods for performing ultrafast laser annealing in a manner that reduces pattern density effects in integrated circuit manufacturing are disclosed. The method includes scanning at least one first laser beam over the patterned surface of a substrate. The at least one first laser beam is configured to heat the patterned surface to a non-melt temperature T | 04-10-2014 |
20140131723 | LASER ANNEALING OF GAN LEDS WITH REDUCED PATTERN EFFECTS - The disclosure is directed to laser annealing of GaN light-emitting diodes (LEDs) with reduced pattern effects. A method includes forming elongate conductive structures atop either an n-GaN layer or a p-GaN layer of a GaN LED structure, the elongate conductive structures having long and short dimensions, and being spaced apart and substantially aligned in the long dimensions. The method also includes generating a P-polarized anneal laser beam that has an anneal wavelength that is greater than the short dimension. The method also includes irradiating either the n-GaN layer or the p-GaN layer of the GaN LED structure through the conductive structures with the P-polarized anneal laser beam, including directing the anneal laser beam relative to the conductive structures so that the polarization direction is perpendicular to the long dimension of the conductive structures. | 05-15-2014 |
20140141538 | METHODS OF CHARACTERIZING SEMICONDUCTOR LIGHT-EMITTING DEVICES BASED ON PRODUCT WAFER CHARACTERISTICS - Methods of characterizing semiconductor light-emitting devices (LEDs) based on product wafer characteristics are disclosed. The methods include measuring at least one product wafer characteristic, such curvature or device layer stress. The method also includes establishing a relationship between the at least one characteristic and the emission wavelengths of the LED dies formed from the product wafer. The relationship allows for predicting the emission wavelength of LED structures formed in the device layer of similarly formed product wafers. This in turn can be used to characterize the product wafers and in particular the LED structures formed thereon, and to perform process control in high-volume LED manufacturing. | 05-22-2014 |
20140176923 | Wynn-Dyson imaging system with reduced thermal distortion - A Wynn-Dyson imaging system with reduced thermal distortion is disclosed, wherein the reticle and wafer prisms are made of glass material having a coefficient of thermal expansion of no greater than about 100 ppb/° C. The system also includes a first IR-blocking window disposed between the reticle and the reticle prism, and a second matching window disposed between the wafer and the wafer prism to maintain imaging symmetry. The IR-blocking window substantially blocks convective and radiative heat from reaching the reticle prism, thereby reducing the amount of thermally induced image distortion in the reticle image formed on the wafer. | 06-26-2014 |
20150041431 | Methods of laser processing photoresist in a gaseous environment - Methods of laser processing photoresist in a gaseous environment to improve at least one of etch resistance and line-edge roughness are disclosed. The methods include sequentially introducing first and second molecular gases to the photoresist surface and performing respective first and second laser scanning of the surface for each molecular gas. The first molecular gas can be trimethyl aluminum, titanium tetrachloride or diethyl zinc, and the second molecular gas comprises water vapor. Short dwell times prevent the photoresist from flowing while serving to speed up the photoresist enhancement process. | 02-12-2015 |