Prabhat Agarwal
Prabhat Agarwal, Brussels DE
Patent application number | Description | Published |
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20090008631 | NANOWIRE TUNNELING TRANSISTOR - A transistor comprises a nanowire ( | 01-08-2009 |
20100097135 | TUNNEL FIELD EFFECT TRANSISTOR - A tunnel transistor includes source diffusion ( | 04-22-2010 |
Prabhat Agarwal, Leuven BE
Patent application number | Description | Published |
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20080315361 | Semiconductor Device and Method of Manufacturing the Same - The invention relates to a semiconductor device ( | 12-25-2008 |
20090114950 | Semiconductor Device and Method of Manufacturing such a Device - The invention relates to a semiconductor device ( | 05-07-2009 |
20090146068 | RADIATION DOSIMETER - A personal X-ray dosimeter system, comprising a portable detector ( | 06-11-2009 |
20090200536 | Method for manufacturing an electric device with a layer of conductive material contracted by nanowire - The electric device ( | 08-13-2009 |
20090200641 | Semiconductor device and method of manufacturing the same - The invention relates to a semiconductor device ( | 08-13-2009 |
Prabhat Agarwal, West Bengal IN
Patent application number | Description | Published |
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20090045852 | Low Voltage Differential Signalling Driver with Pre-Emphasis - There is provided a LVDS driver arranged to receive an input signal which switches between two voltage levels. The driver comprises a pre-emphasis block ( | 02-19-2009 |
Prabhat Agarwal, Calcutta IN
Patent application number | Description | Published |
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20080204096 | Circuit and method to convert a single ended signal to duplicated signals - A circuit to convert a single ended signal to differential signals is disclosed. The circuit has two paths with each of the two paths comprising a plurality of stages. The number of stages in each of the two paths is the same. A first path of the two paths includes a buffer stage and at least one inverter stage. A second path of the two paths includes at least two inverter stages. The buffer stage has a delay matched to that of a first inverter stage of the second path. The buffer stage comprises a first pair of transistors comprising a first transistor of a first category operatively connected to a first transistor of a second category with their channel connections being connected in series. | 08-28-2008 |