Nardone
Fabio Nardone, San Vito Chietino IT
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20120149510 | ELASTOMERIC COMPOSITIONS COMPRISING FLUORINATED ADDITIVES AND USE THEREOF FOR THE MANUFACTURE OF DRIVE BELTS - The invention relates to an elastomeric composition comprising a branched polymer obtained from a polymer selected from the group consisting of NBR, HNBR, XHNBR, EP(D)M, and maleized EPDM and from a compound adapted to form a bond at a bond of the polymer to form a side chain. This compound comprises a group Y comprising a perfluoroalkyl functional group and a functional group adapted to react with the double bond. Preferably, Y=F(CF | 06-14-2012 |
20120157251 | TOOTHED BELT AND USE OF A TOOTHED BELT IN OIL - There is described a belt comprising a body made of a first elastomeric material, in which a plurality of longitudinal filiform resistant inserts is embedded, and a working surface coated by a coating fabric, advantageously the working surface consists of a toothing. The first elastomeric material comprises fibres which extend in a direction substantially perpendicular to the resistant inserts and substantially parallel to a surface defined by the axes of the resistant inserts. | 06-21-2012 |
Flora Nardone, Napoli (na) IT
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20110180662 | LANDING GEAR - A bogie-type landing gear for aircraft is provided. The landing gear includes at least one front wheel and at least one rear wheel connected to a beam, a rocking arm centrally and rotatably connected to said beam, and a shock absorbing element. The rocking arm ends and the shock absorbing element, which are distal to the wheels, are articulated on a lever element hinged on the aircraft frame, onto which an actuator assembly for rotating said lever element urges between a position in which the wheels are in an operative configuration and a position in which the wheels are retracted in the landing gear bay. | 07-28-2011 |
Jennifer R. Nardone, Quezon City PH
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20100160126 | TRAINING DEVICE - The invention relates to a training device ( | 06-24-2010 |
Lorenzo Nardone, Rome IT
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20130179334 | PREFUNDING FOR MONEY TRANSFER SEND TRANSACTIONS - A computer is configured to facilitate prefunding a number of money transfer transaction fees. Each prefunded money transfer transaction fee is usable to pay for a transaction fee associated with a future money transfer send transaction. The computer is further configured to charge an amount for each prefunded money transfer transaction fee based on the number of money transfer transaction fees prefunded. A server connected to the computer is configured to store information related to the prefunded money transfer transaction fees. | 07-11-2013 |
Massimo Nardone, Helsinki FI
Patent application number | Description | Published |
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20080313715 | NODE AUTHENTICATION - A system and method of accessing a service on a terminal node. The system includes a chain of nodes, the chain comprising a first node, one or more intermediate nodes, and the terminal node, the terminal node maintaining the service, wherein the first node is arranged to initiate an access request and to transmit the access request to an adjacent node, each intermediate node is arranged to authenticate the transmitting node and to transmit the access request to an adjacent node, and the terminal node is arranged to authenticate the transmitting node and to execute the access request. | 12-18-2008 |
20130007844 | NODE AUTHENTICATION - A system and method of accessing a service on a terminal node. The system includes a chain of nodes, the chain comprising a first node, one or more intermediate nodes, and the terminal node, the terminal node maintaining the service, wherein the first node is arranged to initiate an access request and to transmit the access request to an adjacent node, each intermediate node is arranged to authenticate the transmitting node and to transmit the access request to an adjacent node, and the terminal node is arranged to authenticate the transmitting node and to execute the access request. | 01-03-2013 |
Peter Nardone, New South Wales AU
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20080230559 | Aerosol Container with Actuator Secured to Valve Stem - A security seal for an aerosol container ( | 09-25-2008 |
Valentina Nardone, Avezzano (l'Aquila) IT
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20120001655 | BASE CELL FOR IMPLEMENTING AN ENGINEERING CHANGE ORDER (ECO) - A circuit base cell is for implementing an engineering change order (ECO) obtained on a semiconductor substrate. The base cell may include a PMOS transistor having a first active region obtained in a first diffusion P+ layer implanted in an N-well provided for on the substrate, and an NMOS transistor having a second active region obtained in a second diffusion N+ layer implanted on the substrate in such a manner as to be electrically insulated from the first diffusion P+ layer. The cell may be characterized in that the active regions and the diffusion layers are aligned therebetween with respect to a reference axis and they are extended symmetrically in the direction orthogonal to the axis. A first and a second width may be associated with the active regions and to the diffusion layers, respectively. The first and second width may be greater than a width of the cell, which is equivalent to a pitch of the standard minimum cell. | 01-05-2012 |
20120075920 | MEMORY BASE CELL AND MEMORY BANK - A memory base cell stores a bit of information implemented from a regular and compact structure made up of multiple identical and replicated base elements, on the “sea of gates” Model, in which the base element of the structure is a cell able to be configured with a minimum width in relation to the particular technology used. Such a cell includes a bistable element with an input node operatively connected to a writing data line of the memory base cell, and an output node operatively connected to a reading data line of the memory base cell. The bistable element also has a first inverter and a second inverter arranged in a feedback configuration with respect to one another between the input node and the output node of the bistable element. | 03-29-2012 |
Valentina Nardone, Avezzano (aq) IT
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20100201400 | METHOD FOR IMPLEMENTING FUNCTIONAL CHANGES INTO A DESIGN LAYOUT OF AN INTEGRATED DEVICE, IN PARTICULAR A SYSTEM-ON-CHIP, BY MEANS OF MASK PROGRAMMABLE FILLING CELLS - A System-on-Chip (SoC) may include logic blocks connected to each other and to external connections, and a hardware debug infrastructure logic connected to the logic blocks and for performing functional changes to a design layout of the SoC. The hardware debug infrastructure logic may include software re-configurable modules based upon the logic blocks obtained from substituting a mask programmable ECO base cell configured as a functional logic cell for a logic cell in the design layout. | 08-12-2010 |
Valentina Nardone, Monza IT
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20100164547 | BASE CELL FOR ENGINEERING CHANGE ORDER (ECO) IMPLEMENTATION - A base cell for an Engineering Change Order (ECO) implementation having at least a first pair of CMOS transistors and a second pair of CMOS transistors, characterized in that said at least first pair of CMOS transistors have a common gate and said at least second pair of CMOS transistors have separate gates. | 07-01-2010 |
20100169857 | METHOD FOR DESIGNING A HIGH PERFORMANCE ASIC (APPLICATION-SPECIFIC INTEGRATED CIRCUIT) ACCELERATOR - A method is for designing an accelerator for digital signal processing including defining a software programmable fully pre-laid out macro by pre-laying out with a fixed topology a control logic of the DSP accelerator to obtain a fully pre-laid out control logic. The method further includes defining a hardware programmable partially pre-laid out macro by customizing a configurable layout area, thereby mapping a computational logic based on computation kernels related to an application of the DSP accelerator. A partially pre-laid out computational logic is therefore obtained. | 07-01-2010 |