Patent application number | Description | Published |
20110034124 | MOBILE COMMUNICATION TERMINAL DEVICE - A mobile communication terminal device whose authentication and settlement functions by noncontact proximity communication can be continuously used even after operating voltage from battery power drops is provided. Only when the supply of required power from a battery is lost, a security controller is controlled into a mode in which it operates with low power consumption and noncontact authentication and settlement functions are ensured by external electromagnetic field power. Thus the noncontact authentication and settlement functions can be used even after the battery remaining capacity is lost by use of a communication function for the principal purpose. Specifically, the following is implemented: when there is the supply of required power from the battery, it is made possible to carry out high-performance, multifunctional authentication and settlement processing making good use of high-speed processing, mass storage, and the like which are the advantages of the security controller essentially driven by battery; and in an anomalous instance in which the battery remaining capacity is lost, it is made possible to carry out minimal authentication and settlement processing. | 02-10-2011 |
20120321077 | CRYPTOGRAPHIC COMMUNICATION SYSTEM AND CRYPTOGRAPHIC COMMUNICATION METHOD - Provided is a cryptographic communication system including a first semiconductor device and a second semiconductor device. The first semiconductor device includes a common key generation unit that generates a common key CK(a) by using a unique code UC(a) and correction data CD(a), and an encryption unit that encrypts the common key CK(a) generated in the common key generation unit by using a public key PK(b) of the second semiconductor device. The second semiconductor device includes a secret key generation unit that generates a secret key SK(b) by using a unique code UC(b) and correction data CD(b), and a decryption unit that decrypts the common key CK(a) encrypted in the encryption unit by using the secret key SK(b). | 12-20-2012 |
20120324241 | SEMICONDUCTOR DEVICE - A semiconductor device in related art has a problem that security on confidential information stored is insufficient. A semiconductor device of the present invention has a unique code which is unique to a device and generates unique code corresponding information from the unique code. The semiconductor device has a memory region in which specific information obtained by encrypting confidential information is stored in a region associated with the unique code corresponding information. The specific information read from the memory region is encrypted with the unique code corresponding information to generate the confidential information. | 12-20-2012 |
20120324310 | SEMICONDUCTOR DEVICE AND METHOD OF WRITING DATA TO SEMICONDUCTOR DEVICE - A semiconductor device in related art has a problem that security at the time of writing data cannot be sufficiently assured. A semiconductor device of the present invention has: a unique code generating unit generating an initial unique code which is a value unique to a device and includes an error in a random bit; a first error correcting unit correcting an error in the initial unique code to generate an intermediate unique code; a second error correcting unit correcting an error in the intermediate unique code to generate a first determinate unique code; and a decrypting unit decrypting, with the first determinate unique code, transmission data obtained by encrypting confidential information with key information generated on the basis of the intermediate unique code by an external device to generate confidential information. | 12-20-2012 |
20140011451 | MOBILE COMMUNICATION TERMINAL DEVICE - A mobile communication terminal device whose authentication and settlement functions by noncontact proximity communication can be continuously used even after operating voltage from battery power drops is provided. Only when the supply of required power from a battery is lost, a security controller is controlled into a mode in which it operates with low power consumption and noncontact authentication and settlement functions are ensured by external electromagnetic field power. Specifically, the following is implemented: when there is the supply of required power from the battery, it is made possible to carry out high-performance, multifunctional authentication and settlement processing making good use of high-speed processing, mass storage, and the like which are the advantages of the security controller essentially driven by battery; and in an anomalous instance in which the battery remaining capacity is lost, it is made possible to carry out minimal authentication and settlement processing. | 01-09-2014 |
20140133652 | SEMICONDUCTOR DEVICE AND INFORMATION PROCESSING SYSTEM FOR ENCRYPTED COMMUNICATION - In a semiconductor device and an information processing system according to one embodiment, an external device generates external device unique information by using a unique code which is a value unique to the semiconductor device, and generates second information by encrypting the first information with the use of the external device unique information. The semiconductor device stores the second information and generates the principal device unique information independently of the external device, with the use of the unique code of the semiconductor device holding the second information, and decrypts the second information with the use of the principal device unique information to obtain the first information. | 05-15-2014 |
20140289538 | SEMICONDUCTOR DEVICE - A semiconductor device in related art has a problem that security on confidential information stored is insufficient. A semiconductor device of the present invention has a unique code which is unique to a device and generates unique code corresponding information from the unique code. The semiconductor device has a memory region in which specific information obtained by encrypting confidential information is stored in a region associated with the unique code corresponding information. The specific information read from the memory region is encrypted with the unique code corresponding information to generate the confidential information. | 09-25-2014 |
Patent application number | Description | Published |
20080245878 | IC CARD - Disclosed is a semiconductor device including built-in interface circuits whose operations are selected in response to initialization operation from a host apparatus coupled thereto. In the semiconductor device, a first synchronous interface circuit and a second asynchronous interface circuit using differential signals, share the external terminals of the differential signals (the external differential signal terminals). For example, the semiconductor device adopts an MMC interface circuit as the first interface circuit and a USB interface circuit as the second interface circuit, while keeping the IC card interface function. The semiconductor device selects operations of the adopted interface circuits exclusively. One selection method is to enable an interface operation of the first interface circuit, upon detection of a plurality of edge changes in a clock input from an external clock terminal, which is for initializing the first interface circuit when power supply to the semiconductor device is started. | 10-09-2008 |
20090057417 | IC CARD - The present invention realizes a card on which a secure IC chip (a first semiconductor chip) that operates on both of a high power source voltage and a low power source voltage, and a nonvolatile semiconductor storage chip that operates on the lower power source voltage are mounted. Means for operating the card without exerting an adverse influence of the nonvolatile semiconductor storage chip when the high power source voltage is supplied is realized. A card has a voltage supply interrupting unit which is coupled to a power source terminal to which a first power source voltage and a second power source voltage higher than the first power source voltage are supplied, and a grounding terminal to which a grounding voltage is supplied. The voltage supply interrupting unit, when the first power source voltage is supplied, supplies voltage to a nonvolatile semiconductor storage chip and, when the second power source voltage is supplied, stops supplying the voltage to the nonvolatile semiconductor storage chip. | 03-05-2009 |
20090144834 | DATA PROCESSING CIRCUIT AND COMMUNICATION MOBILE TERMINAL DEVICE - A data processing circuit includes a rewritable nonvolatile memory and a controller performing nonvolatile memory control and external interface control. A first detector and a second detector are employed to detect respectively whether the operation of the data processing circuit deviates from a first operating condition and a second operating condition, wherein the second operating condition is severer than the first operating condition. When the first detector detects deviation from the first operating condition, reset is instructed to the controller. When the second detector detects deviation from the second operating condition, the controller backs up an internal state and imposes a restriction on external access to a storage region of the nonvolatile memory. Accordingly, when operation of the microcontroller deviates from specific operating conditions within an operation guarantee range and performance degradation is exhibited, an unauthorized access to the data inside the microcontroller can be suppressed. | 06-04-2009 |
20100177579 | SEMICONDUCTOR MEMORY DEVICE HAVING FAULTY CELLS - In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories. | 07-15-2010 |
20120213002 | SEMICONDUCTOR MEMORY DEVICE HAVING FAULTY CELLS - In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories. | 08-23-2012 |
20140185380 | SEMICONDUCTOR MEMORY DEVICE HAVING FAULTY CELLS - In response to a read command received by a system interface unit for accessing a plurality of blocks of data stored in said non-volatile semiconductor memory, a controller carries out selective read operations of blocks of data to two memories from the non-volatile semiconductor memory. The controller also carries out parallel operations of data transferring a first block of data, which has already been subjected to error detection and error correction operations by an error correction unit, from one of the two memories to a host system via said system interface unit and of data transferring of a second block of data to be subjected to the error detection and error correction operation, from said non-volatile semiconductor memory to the other of the two memories. | 07-03-2014 |
Patent application number | Description | Published |
20080229164 | MEMORY CARD AND MEMORY CONTROLLER - A memory card includes a non-volatile memory, a memory controller for controlling the operation of the memory card. The memory controller is capable of providing an interface with outside according to a predetermined protocol, and performs error detection and correction of the memory information at regular time intervals or at the timing of connection of electric power supply, independently of reading out the memory information according to external access request. Therefore, it is possible to improve reliability of data retention in the non-volatile memory without the host device reading out the memory information from the non-volatile memory of the memory card. | 09-18-2008 |
20090037767 | NONVOLATILE MEMORY SYSTEM - A memory system permitting a number of alternative memory blocks to be made ready in order to extend the rewritable life and thereby contributing to enhanced reliability of information storage is to be provided. The memory system is provided with a nonvolatile memory having a plurality of data blocks in predetermined physical address units and a controller for controlling the nonvolatile memory in response to an access request from outside. Each of the data blocks has areas for holding a rewrite count and error check information regarding each data area. The controller, in a read operation on the nonvolatile memory, checks for any error in the area subject to the read according to error check information and, when there is any error, if the rewrite count is greater than a predetermined value, will replace the pertinent data block with another data block or if it is not greater, correct data in the data block pertaining to the error. | 02-05-2009 |
20100054069 | MEMORY SYSTEM - The present invention provides a memory system which contributes to improvement in efficiency of a data process accompanying a memory access. A memory system has a rewritable nonvolatile memory, a buffer memory, and a controller. The controller controls, in response to an access request from an external apparatus, first data transfer between the controller and the external apparatus, second data transfer between the controller and the nonvolatile memory, and third data transfer between the controller and the buffer memory, controls transfer from the controller to the buffer memory in the third data transfer and transfer from the buffer memory to the controller in a time sharing manner, and enables the first data transfer or the second data transfer to be performed in parallel with the transfer carried out in the time sharing manner. | 03-04-2010 |
20110197108 | MEMORY CARD AND MEMORY CONTROLLER - A memory card has a plurality of non-volatile memories and a main controller for controlling the operation of the non-volatile memories. The main controller performs an access control to the non-volatile memories in response to an external access instruction, and an alternate control for alternating an access error-related storage area of the non-volatile memory with other storage area. In the access control, the speeding up of the data transfer between flash memories is achieved by causing the plurality of non-volatile memories to parallel access operate. In the alternation control, the storage areas is made alternative for each non-volatile memory in which an access error occurs. | 08-11-2011 |
20120176842 | Memory System - The present invention provides a memory system which contributes to improvement in efficiency of a data process accompanying a memory access. A memory system has a rewritable nonvolatile memory, a buffer memory, and a controller. The controller controls, in response to an access request from an external apparatus, first data transfer between the controller and the external apparatus, second data transfer between the controller and the nonvolatile memory, and third data transfer between the controller and the buffer memory, controls transfer from the controller to the buffer memory in the third data transfer and transfer from the buffer memory to the controller in a time sharing manner, and enables the first data transfer or the second data transfer to be performed in parallel with the transfer carried out in the time sharing manner. | 07-12-2012 |
20140365712 | MEMORY SYSTEM - The present invention provides a memory system which contributes to improvement in efficiency of a data process accompanying a memory access. A memory system has a rewritable nonvolatile memory, a buffer memory, and a controller. The controller controls, in response to an access request from an external apparatus, first data transfer between the controller and the external apparatus, second data transfer between the controller and the nonvolatile memory, and third data transfer between the controller and the buffer memory, controls transfer from the controller to the buffer memory in the third data transfer and transfer from the buffer memory to the controller in a time sharing manner, and enables the first data transfer or the second data transfer to be performed in parallel with the transfer carried out in the time sharing manner. | 12-11-2014 |
Patent application number | Description | Published |
20080313487 | PROCESSING DEVICE AND CLOCK CONTROL METHOD - A processing device comprises an interface and its control circuit for performing data transfer in synchronization with an external clock, an internal oscillator, and an interface and its control circuit for performing data transfer by using an internal clock generated by the internal oscillator. In the processing device, a clock control circuit that switches a system clock between the internal clock and the external clock in accordance with the interface is provided. When the system clock is switched, the switching is performed after the CPU is set in a sleep state, and after the switching is completed, the sleep state of the CPU is released to restart the operation. | 12-18-2008 |
20100034024 | Control Method For Nonvolatile Memory and Semiconductor Device - In a nonvolatile memory, the threshold is restored to a state before changing, without increasing number of writing undesirably. In a system including a nonvolatile memory, a random number generator, and a controller accessible to the nonvolatile memory, every time access to the nonvolatile memory is performed, the controller determines a refresh-targeted area, based on a random number generated by the random number generator. The controller is made to perform refresh control to re-write to the refresh-targeted area. By such refresh control, the threshold is restored to a state before changing, without increasing the number of writing undesirably. | 02-11-2010 |