Yeom, Suwon-Si
Dong-Hae Yeom, Suwon-Si KR
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20080260367 | AUTO STABILIZATION METHOD AND PHOTOGRAPHING APPARATUS USING THE SAME - An auto stabilization method and a photographing apparatus using the same are provided. The photographing apparatus having the auto stabilization function includes a voice coil motor actuator (VCMA) to move a photographing element. In the generation of hand tremor, the photographing apparatus controls compensating of the hand tremor. Because one or more dynamic characteristics according to a structure of the VCMA is considered, saturation or delay of displacement of the VCMA is avoided, and a clearer image is provided. | 10-23-2008 |
Dong-Yeol Yeom, Suwon-Si KR
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20150029692 | OPTICAL LENS MODULE AND BACKLIGHT UNIT - A backlight unit which provides light to a liquid crystal display panel of a liquid crystal display. The backlight unit includes an optical lens module including an optical lens disposed above a point light source and configured to refract light output from the point light source, and a reflective polarization layer disposed directly on the optical lens and configured to separate polarization components of the light to transmit one polarization component and reflect another polarization component. | 01-29-2015 |
Eung-Moon Yeom, Suwon-Si KR
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20080310307 | IP converged system and packet processing method therein - An IP converged system includes a VoIP ALG module and a policer module. The VoIP ALG module acquires dynamically changing RTP IP/port information of a packet by parsing a VoIP SIP message, and transmits the RTP IP/port information to the policer module. The policer module sets IP/port, which provides a real-time data service, by referring to the information from the VoIP ALG module, and discriminatively sets a packet processing condition for a non-real-time data service and a packet processing condition for the real-time data service. The VoIP ALG module and the policer module share RTP IP/port information, dynamically determined by the negotiation between VoIP gateways or VoIP terminals, in call setup/release, so that the policer can discriminately drop or mark VoIP packets by referring to the RTP IP/port information. | 12-18-2008 |
20090185558 | IP converged system and call processing method thereof - A call processing method in an Internet Protocol (IP) converged system includes: requesting an incoming call to be routed through an IP network; checking a data traffic-processing state of a traffic manager in response to the request; and rerouting the call through the IP network or rerouting the call through a Public Switched Telephone Network (PSTN) according to the checked data traffic-processing state. | 07-23-2009 |
20100002688 | QoS CONTROL SYSTEM AND METHOD OF VoIP MEDIA PACKET RECEIVED FROM BROADBAND PORT IN ROUTER/GATEWAY-INTEGRATED VoIP SYSTEM - A Quality-of-Service (QoS) control system and method of a Voice over Internet Protocol (VoIP) packet received from a broadband port in a router/gateway integrated VoIP system, which can process an incoming VoIP call by detecting in real-time an available bandwidth of the VoIP packet through interaction with a QoS module, determining whether to allow the VoIP call based on the result of the detection, and responding to the VoIP call based on the result of the determination. The QoS can be ensured according to the size of a VoIP media packet received through a broadband port. | 01-07-2010 |
Hae-Sung Yeom, Suwon-Si KR
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20090075653 | Channel scanning method and apparatus for mobile node - A channel scanning method and apparatus for a wireless network is provided for improving channel scanning efficiency. A channel scanning method of the present invention includes selecting at least one of a plurality of available channels according to a predetermined channel selection formula; broadcasting a predetermined message on the at least one available channel; detecting response messages transmitted on the available channels in response to the predetermined message; and searching for access points on the basis of information extracted from the response messages. | 03-19-2009 |
Ikjun Yeom, Suwon-Si KR
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20140172981 | PEER-TO-PEER COMMUNICATION METHOD IN CONTENT CENTRIC NETWORK ENVIRONMENT - There is provided a peer-to-peer communication method in a content centric network environment. In embodiments, the peer-to-peer communication method in a content centric network (hereinafter referred to as a “CCN”) environment includes, receiving, by a CCN router, a join message including a desired service name of a user node from the user node, transmitting, by the CCN router, the join message to a rendezvous point mapped to the service name and forming a share tree, receiving, by the CCN router, a content request message including a name of content that is provided through the service from the user node, and transmitting, by the CCN router, the content request message through an interface connected to the share tree. | 06-19-2014 |
Ik Jun Yeom, Suwon-Si KR
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20150078351 | FAST WIRELESS LOCAL AREA NETWORK COMMUNICATION METHOD AND APPARATUS USING MULTIPLE TRANSFER RATE PARTITIONING AND COOPERATIVE TRANSMISSION - A wireless local area network (WLAN) communication method and apparatus using multiple transmission speed partitioning and cooperative transmission are disclosed. The WLAN communication method includes transmitting, by access point to the nodes, transmission time slots, partitions and internal transmission priorities using transmission time slot information, partition information and internal transmission priority information, receiving uplink packet from one node, determining whether downlink data to be transmitted to the high speed or the low speed node is present, or not in the download queue, transmitting, if present, the downlink packet to the nodes, removing downlink data from the download queue for ACK, and transmitting, if not present, transmitting ACK to the nodes. | 03-19-2015 |
Jung-Hwan Yeom, Suwon-Si KR
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20120086621 | ANTENNA DEVICE FOR PORTABLE TERMINAL - An antenna device of a portable terminal is provided. The device includes a main board, a bar antenna, and a connector. The main board includes a feeding portion for feeding electricity and a grounding portion for grounding. The bar antenna is movable while being electrically connected to the feeding portion so as to protrude to an outside of the portable terminal or to be inserted into the inside of the portable terminal. The connector electrically connects the grounding portion of the main board to the bar antenna only when the bar antenna is completely inserted into the portable terminal. | 04-12-2012 |
Ki Keon Yeom, Suwon-Si KR
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20100072245 | High speed and fine substrate alignment apparatus in roll to roll system - Disclosed is a substrate alignment apparatus capable of performing coarse and fine alignments of a substrate in a progressing route to remove or reduce an alignment error between the substrate and a pattern roll. The coarse alignment may be performed by moving a frame using a stage when the alignment error is relatively large, and the fine alignment may be performed by moving subsidiary rollers of a roller unit relative to a main roller of a roller unit when the alignment error is relatively small. An example substrate alignment apparatus may include a frame and a roller unit rotatably fixed to the frame to support a substrate, wherein the roller unit includes a main roller, and at least one subsidiary roller fixed to the main roller such that the at least one subsidiary roller can move relative to the main roller to align the substrate. | 03-25-2010 |
Ki Woong Yeom, Suwon-Si KR
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20090251181 | Method and apparatus for tuning phase of clock signal - A method and apparatus for tuning a phase of a data clock signal having a different frequency than a main clock signal. The method of tuning includes coarse tuning by receiving the data clock signal, dividing the data clock signal to generate a frequency-divided clock signal having a same frequency as the main clock signal, repeatedly shifting the frequency-divided clock signal to generate multiphase frequency-divided clock signals at a predetermined phase interval, comparing a phase of each of the multiphase frequency-divided clock signals with a phase of the main clock signal, and determining a phase shift amount based on a comparison result, and fine tuning by comparing a phase of a multiphase frequency-divided clock signal corresponding to the phase shift amount with the phase of the main clock signal and adjusting the phase of the data clock signal by a predetermined phase step based on the comparison result. | 10-08-2009 |
20110158030 | METHOD AND APPARATUS FOR TUNING PHASE OF CLOCK SIGNAL - A method and apparatus for tuning a phase of a data clock signal having a different frequency than a main clock signal. The method of tuning includes coarse tuning by receiving the data clock signal, dividing the data clock signal to generate a frequency-divided clock signal having a same frequency as the main clock signal, repeatedly shifting the frequency-divided clock signal to generate multiphase frequency-divided clock signals at a predetermined phase interval, comparing a phase of each of the multiphase frequency-divided clock signals with a phase of the main clock signal, and determining a phase shift amount based on a comparison result, and fine tuning by comparing a phase of a multiphase frequency-divided clock signal corresponding to the phase shift amount with the phase of the main clock signal and adjusting the phase of the data clock signal by a predetermined phase step based on the comparison result. | 06-30-2011 |
Kyehee Yeom, Suwon-Si KR
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20140110816 | SEMICONDUCTOR DEVICES - Provided are semiconductor devices and methods of fabricating the same. In methods of forming the same, an etch stop pattern and a separate spacer can be formed on a sidewall of a bit line contact, wherein the etch stop pattern and the separate spacer each comprise material having an etch selectivity relative to an oxide. A storage node contact plug hole can be formed so that the etch stop pattern and the separate spacer form a portion of a sidewall of the storage node contact plug hole spaced apart from the bit line contact. The storage node contact plug hole can be cleaned to remove a natural oxide formed in the storage node contact plug hole. Related devices are also disclosed. | 04-24-2014 |
20140131786 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor device includes a substrate including a cell region and a peripheral region, a cell gate electrode buried in a groove crossing a cell active portion of the cell region, a cell line pattern crossing over the cell gate electrode, the cell line pattern being connected to a first source/drain region in the cell active portion at a side of the cell gate electrode, a peripheral gate pattern crossing over a peripheral active portion of the peripheral region, a planarized interlayer insulating layer on the substrate around the peripheral gate pattern, and a capping insulating layer on the planarized interlayer insulating layer and a top surface of the peripheral gate pattern, the capping insulating layer including an insulating material having an etch selectivity with respect to the planarized interlayer insulating layer. | 05-15-2014 |
Kye-Hee Yeom, Suwon-Si KR
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20090256198 | SEMICONDUCTOR DEVICES HAVING LINE TYPE ACTIVE REGIONS AND METHODS OF FABRICATING THE SAME - In a semiconductor device having line type active regions and a method of fabricating the semiconductor device, the semiconductor device includes a device isolation layer which defines the line type active regions in a in a semiconductor substrate. Gate electrodes which are parallel to each other and intersect the line type active regions are disposed over the semiconductor substrate. Here, the gate electrodes include both a device gate electrode and a recessed device isolation gate electrode. Alternatively, each of the gate electrodes is constituted of a device gate electrode and a plan type device isolation gate electrode, and a width of the plan type device isolation gate electrode greater than a width of the device gate electrode. | 10-15-2009 |
20100085800 | Semiconductor devices including buried gate electrodes and methods of forming semiconductor devices including buried gate electrodes - A semiconductor device, including a semiconductor substrate including isolations defining active regions of the semiconductor substrate, a plurality of buried gate electrodes extending below an upper surface of the semiconductor device, and a plurality of bit lines extending along a first direction over the semiconductor substrate, wherein the plurality of bit lines are connected to corresponding ones of the active regions of the semiconductor substrate, and at least a portion of the bit lines extend along a same and/or substantially same plane as an upper surface of the corresponding active region to which it is connected. | 04-08-2010 |
20100102371 | Semiconductor devices including buried gate electrodes and isolation layers and methods of forming semiconductor devices including buried gate electrodes and isolation layers using self aligned double patterning - A semiconductor device, including a semiconductor substrate including isolations defining active regions of the semiconductor substrate, and a plurality of buried gate electrodes between a pair of the isolations, wherein each of the buried gate electrodes and the isolations includes a conductive layer and a capping layer. | 04-29-2010 |
20100140676 | Semiconductor devices including buried gate electrodes including bitline shoulder attack protection and methods of forming such semiconductor devices - A semiconductor device, including a semiconductor substrate including isolations defining active regions of the semiconductor substrate, a plurality of buried gate electrodes extending below an upper surface of the active regions of the semiconductor device, a plurality of bit lines extending on the semiconductor substrate along a first direction, a plurality of insulating patterns extending on the semiconductor substrate along a second direction that crosses the first direction, and a plurality of capping patterns extending over the bit lines, wherein the insulating patterns and the capping pattern both include insulating material and at least a portion of corresponding ones of the insulating patterns and the capping patterns are in direct contact with each other. | 06-10-2010 |
20100193880 | Semiconductor device and method of forming the same - A semiconductor device, and a method of forming the same, includes forming a cell bit line pattern and a peripheral gate pattern on a semiconductor substrate. The cell bit line pattern may be formed on an inactive region adjacent to a cell active region of the semiconductor substrate. The peripheral gate pattern may be disposed on a peripheral active region of the semiconductor substrate. A cell contact plug may be formed between the cell bit line pattern and the cell active region. A peripheral contact plug may be formed on the peripheral active region on a side of the peripheral gate pattern. An insulating layer may be formed to expose top surfaces of the cell bit line pattern, the peripheral gate pattern, and the cell and peripheral contact plugs at substantially the same level. | 08-05-2010 |
20100295130 | SEMICONDUCTOR DEVICE HAVING BIT LINE EXPANDING ISLANDS - Provided is a semiconductor device having bit line expanding islands, which are formed underneath bit lines to reliably expand and connect the bit lines. The semiconductor device includes: a semiconductor layer in which an isolation region and an active region are defined; an insulating layer, which is formed on the semiconductor layer; a plurality of bit lines, which are formed on the insulating layer; and one or more bit line expanding islands, which are formed inside the insulating layer and are electrically connected to a lower portion of at least one of the plurality of bit lines | 11-25-2010 |
20110031539 | SEMICONDUCTOR DEVICES HAVING LINE TYPE ACTIVE REGIONS AND METHODS OF FABRICATING THE SAME - In a semiconductor device having line type active regions and a method of fabricating the semiconductor device, the semiconductor device includes a device isolation layer which defines the line type active regions in a in a semiconductor substrate. Gate electrodes which are parallel to each other and intersect the line type active regions are disposed over the semiconductor substrate. Here, the gate electrodes include both a device gate electrode and a recessed device isolation gate electrode. Alternatively, each of the gate electrodes is constituted of a device gate electrode and a plan type device isolation gate electrode, and a width of the plan type device isolation gate electrode greater than a width of the device gate electrode. | 02-10-2011 |
20120214297 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE INCLUDING BURIED CHANNEL ARRAY TRANSISTOR - A method of fabricating a semiconductor device includes partially removing an active region and an isolation region to form a gate buried trench, forming a gate insulating layer on an inner wall of the gate buried trench, forming a gate conductive pattern on the gate insulating layer to fill the gate buried trench, and a height of an uppermost surface of the gate conductive pattern is lower than a height of an uppermost surface of the substrate. The method also includes forming an interlayer insulating layer on the substrate and on the gate conductive pattern, the interlayer insulating layer includes an upper insulating region and a lower insulating region, the lower insulating region fills the gate buried trench, the upper insulating region is formed over the substrate, and forming a bit contact plug connected to the active region through the interlayer. | 08-23-2012 |
20140110851 | Semiconductor Device - A semiconductor device includes a plurality of bit lines that intersect an active region on a substrate and extend in a first direction, a contact pad formed on the active region between adjacent bit lines, and a plurality of spacers disposed on sidewalls of the plurality of bit lines. An upper portion of the contact pad is interposed between adjacent spacers, and a lower portion of the contact pad has a width greater than a distance between adjacent spacers. | 04-24-2014 |