Patent application number | Description | Published |
20080309530 | Quantizing circuits with variable parameters - Systems, methods, and devices are disclosed, such as a device including a floating-gate transistor, a quantizing circuit coupled to the floating-gate transistor, and a controller configured to vary a voltage of a gate of the floating-gate transistor when reading data from the floating-gate transistor. | 12-18-2008 |
20080309533 | Comparators for delta-sigma modulators - Methods, systems and devices are disclosed, such as an electronic device that includes a plurality of data locations and a delta-sigma modulator. In some embodiments, the delta-sigma modulator includes a preamplifier coupled to the data locations and a latch coupled to the preamplifier. | 12-18-2008 |
20080309534 | Quantizing circuits for semiconductor devices - An electronic device that includes an internal data storage location coupled to an electrical conductor and a quantizing circuit coupled to the internal data storage location via the electrical conductor. In some embodiments, the quantizing circuit includes an analog-to-digital converter having an input and an output, where the input is coupled to the electrical conductor and a digital filter coupled to the output of the analog-to-digital converter. | 12-18-2008 |
20080309539 | Quantizing circuits with variable reference signals - Systems, methods, and devices are disclosed, such as an integrated semiconductor device that may include a data location coupled to an electrical conductor, a delta-sigma modulator coupled to the electrical conductor, a counter coupled to an output of the delta-sigma modulator, and an interfuser coupled to an output of the counter. In some embodiments, the interfuser is configured to receive two or more counts from the counter and read data conveyed by the data location based on the two or more counts. | 12-18-2008 |
20080309540 | Integrators for delta-sigma modulators - Methods, systems and devices are disclosed. Among the disclosed devices is an electronic device that, in certain embodiments, includes a plurality of memory elements or imaging elements connected to a bit-line and a delta-sigma modulator connected to the bit-line. The delta-sigma modulator may include an integrator having a differential amplifier. | 12-18-2008 |
20080310221 | Reference current sources - Systems, methods, and devices are disclosed, including an electronic device that includes a first data location, a quantizing circuit, and a reference current source, all coupled to an electrical conductor. The reference current source may include a current mirror with a side coupled to the electrical conductor and a second data location coupled to another side of the current mirror. | 12-18-2008 |
20080310228 | Memory with correlated resistance - Methods, systems, and devices are disclosed, such as a method of operating a memory device. In certain embodiments, such a method includes writing a plurality of data values to a plurality of data locations. The plurality of data locations may be coupled to one another in a series, and the plurality of data values may be sequentially written to the plurality of data locations, starting with the data location at an end of the series and then sequentially writing to each adjacent data location. | 12-18-2008 |
20080310236 | Subtraction circuits and digital-to-analog converters for semiconductor devices - A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output and an analog input, which may be connected to the bit-line. In some embodiments, the delta-sigma modulator includes an adder with first and second inputs and an output. The first input may be connected to the analog input. The delta-sigma modulator may also include an integrator connected to the output of the adder, an analog-to-digital converter with an input connected to an output of the integrator and an output connected to the digital output, and a digital-to-analog converter with an input connected to the output of the analog-to-digital converter and an output connected to the second input of the adder. | 12-18-2008 |
20080310244 | Digital filters with memory - A memory device that, in certain embodiments, includes a memory element coupled to a bit-line and a quantizing circuit coupled to the memory element via the bit-line. In some embodiments, the quantizing circuit includes an analog-to-digital converter having an input and output and a digital filter that includes memory. The input of the analog-to-digital converter may be coupled to the bit-line, and the output of the analog-to-digital converter may be coupled to the digital filter. | 12-18-2008 |
20080310245 | Digital filters for semiconductor devices - A memory device that, in certain embodiments, includes a memory element and a digital filter. The digital filter may include a counter and a divider, where the divider is configured to divide a count from the counter by a divisor. | 12-18-2008 |
20080313510 | Systems and devices including memory with built-in self test and methods of making and using the same - Disclosed are methods, systems and devices, such as a device including a data location, a quantizing circuit coupled to the data location, and a test module coupled to the quantizing circuit. In one or more embodiments, the test module can include a linear-feedback shift register. | 12-18-2008 |
20080313525 | Error detection for multi-bit memory - Systems, methods, and devices are disclosed, including a device that includes a plurality of data locations, a quantizing circuit coupled to the plurality of data locations, and an error detection module coupled to the quantizing circuit. In some embodiments, the error detection module includes an encoder configured to encode incoming data with redundant data derived from the incoming data and a decoder configured to detect errors in stored data based on the redundant data. | 12-18-2008 |
20090212984 | QUANTIZING CIRCUITS WITH VARIABLE PARAMETERS - Systems, methods, and devices for obtaining data from a data location. The method may include generating a first value by sensing a data location under a first condition and generating a second value by sensing the data location under a second condition. The method may further include combining the first value with the second value to identify data conveyed by the data location. | 08-27-2009 |
20100117881 | K-Delta-1-Sigma Modulator - A K-Delta-1-Sigma modulator filters or integrates (Sigma) the difference (Delta) between K-feedback paths and an input signal. By using K-feedback paths the topology enables sample rates that are K times the clock frequency of any one feedback path. The sigma block can be implemented in a number of ways including an active or passive integrator or a filter with specific characteristics. When implemented as an integrator, the sigma block is common to all the feedback paths, so that the modulation noise is pushed to a portion of the spectrum where it can be reduced by filtering. The delta block can be implemented in a number of ways including analog adders or switched capacitors. | 05-13-2010 |
20100123610 | DEVICES INCLUDING ANALOG-TO-DIGITAL CONVERTERS FOR INTERNAL DATA STORAGE LOCATIONS - A device that includes an internal data storage location coupled to an electrical conductor and an analog-to-digital converter coupled to the internal data storage location via the electrical conductor. In some embodiments, the analog-to-digital converter includes a comparator having an input coupled to the electrical conductor and a switch coupled to the electrical conductor. | 05-20-2010 |
20100214855 | METHODS OF QUANTIZING SIGNALS USING VARIABLE REFERENCE SIGNALS - Methods for reading a data location coupled to an electrical conductor. A counter receives a signal from an analog-to-digital converter coupled to the electrical conductor. The counter produces two or more counts, and in some embodiments, the counts are based in part on a variable reference voltage. An interfuser may be coupled to an output of the counter. The interfuser receives the two or more counts from the counter and reads data conveyed by the data location based on the two or more counts. | 08-26-2010 |
20100254192 | MEMORY WITH CORRELATED RESISTANCE - Methods, systems, and devices are disclosed, such as a system for sequentially writing to a data locations coupled to one another in series. In certain embodiments, the system includes a plurality of data locations and a controller. The controller is configured to sequentially write data values to the plurality of data locations, starting with the data location at an end of the series and then sequentially writing to each adjacent data location. | 10-07-2010 |
20100271899 | DIGITAL FILTERS FOR SEMICONDUCTOR DEVICES - A memory device that, in certain embodiments, includes a memory element and a digital filter. The digital filter may include a counter and a divider, where the divider is configured to divide a count from the counter by a divisor. | 10-28-2010 |
20110013465 | INTEGRATORS FOR DELTA-SIGMA MODULATORS - Methods, systems and devices are disclosed. Among the disclosed devices is an electronic device that, in certain embodiments, includes a plurality of memory elements or imaging elements connected to a bit-line and a delta-sigma modulator connected to the bit-line. The delta-sigma modulator may include an integrator having a differential amplifier. | 01-20-2011 |
20110035637 | SYSTEMS AND DEVICES INCLUDING MEMORY WITH BUILT-IN SELF TEST AND METHODS OF MAKING AND USING THE SAME - Disclosed are methods, systems and devices, such as a device including a data location, a quantizing circuit coupled to the data location, and a test module coupled to the quantizing circuit. The quantizing circuit may include an analog-to-digital converter, a switch coupled to the memory element and a feedback signal path coupled to the output of the analog-to-digital converter and to the switch. | 02-10-2011 |
20110051511 | DIGITAL FILTERS WITH MEMORY - A memory device that, in certain embodiments, includes a memory element coupled to a bit-line and a quantizing circuit coupled to the memory element via the bit-line. In some embodiments, the quantizing circuit includes an analog-to-digital converter having an input and output and a digital filter that includes memory. The input of the analog-to-digital converter may be coupled to the bit-line, and the output of the analog-to-digital converter may be coupled to the digital filter. | 03-03-2011 |
20110063930 | SUBTRACTION CIRCUITS AND DIGITAL-TO-ANALOG CONVERTERS FOR SEMICONDUCTOR DEVICES - A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output and an analog input, which may be connected to the bit-line. In some embodiments, the delta-sigma modulator includes a circuit with first and second inputs and an output. The circuit is configured to combined (add or subtract) input signals. The first input may be connected to the analog input. The delta-sigma modulator may also include an integrator connected to the output of the circuit, an analog-to-digital converter with an input connected to an output of the integrator and an output connected to the digital output, and a digital-to-analog converter with an input connected to the output of the analog-to-digital converter and an output connected to the second input of the circuit. | 03-17-2011 |
20110261637 | INCREASED DRAM-ARRAY THROUGHPUT USING INACTIVE BITLINES - A memory device with increased communication bandwidth is described. In this memory device, control logic routes data signals from a memory array using inactive bitlines in response to a read command. These data signals are then placed on an adjacent unused input/output (I/O) line or routing channel, as opposed to a proximate I/O line that is in use. For example, unused bitlines located on the top and bottom of the memory array may be used to route data signals to adjacent local I/O lines. In particular, the data signals can be placed on unused local I/O lines which are associated with adjacent bitline sense amplifiers. The resulting increased communication bandwidth can overcome the constraints imposed by the limited number of local I/O lines in the memory device without appreciably increasing the chip size, power consumption, or cost. | 10-27-2011 |
20120068758 | REFERENCE CURRENT SOURCES - Systems, methods, and devices are disclosed, including an electronic device that includes a first data location, a quantizing circuit, and a reference current source, all coupled to an electrical conductor. The reference current source may include a current mirror with a side coupled to the electrical conductor and a second data location coupled to another side of the current mirror. | 03-22-2012 |
20120068872 | METHODS OF QUANTIZING SIGNALS USING VARIABLE REFERENCE SIGNALS - Methods for reading a data location coupled to an electrical conductor. A counter receives a signal from an analog-to-digital converter coupled to the electrical conductor. The counter produces two or more counts, and in some embodiments, the counts are based in part on a variable reference voltage. An interfuser may be coupled to an output of the counter. The interfuser receives the two or more counts from the counter and reads data conveyed by the data location based on the two or more counts. | 03-22-2012 |
20120098691 | QUANTIZING CIRCUITS WITH VARIABLE PARAMETERS - Systems, methods, and devices for obtaining data from a data location. The method may include generating a first value by sensing a data location under a first condition and generating a second value by sensing the data location under a second condition. The method may further include combining the first value with the second value to identify data conveyed by the data location. | 04-26-2012 |
20120119929 | INTEGRATORS FOR DELTA-SIGMA MODULATORS - Methods, systems and devices are disclosed. Among the disclosed devices is an electronic device that, in certain embodiments, includes a plurality of memory elements or imaging elements connected to a bit-line and a delta-sigma modulator connected to the bit-line. The delta-sigma modulator may include an integrator having a differential amplifier. | 05-17-2012 |
20120144269 | ERROR DETECTION FOR MULTI-BIT MEMORY - Systems, methods, and devices are disclosed, including a device that includes a plurality of data locations, a quantizing circuit coupled to the plurality of data locations, and an error detection module coupled to the quantizing circuit. In some embodiments, the error detection module includes an encoder configured to encode incoming data with redundant data derived from the incoming data and a decoder configured to detect errors in stored data based on the redundant data. | 06-07-2012 |
20120243343 | METHODS FOR SENSING MEMORY ELEMENTS IN SEMICONDUCTOR DEVICES - A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output and an analog input, which may be connected to the bit-line. In some embodiments, the delta-sigma modulator includes a circuit with first and second inputs and an output. The circuit is configured to combine (add or subtract) input signals. The first input may be connected to the analog input. The delta-sigma modulator may also include an integrator connected to the output of the circuit, an analog-to-digital converter with an input connected to an output of the integrator and an output connected to the digital output, and a digital-to-analog converter with an input connected to the output of the analog-to-digital converter and an output connected to the second input of the circuit. | 09-27-2012 |
20120248288 | DUAL WELL READ-OUT INTEGRATED CIRCUIT (ROIC) - Embodiments of the invention describe solutions directed towards having a single camera capable of capturing high speed laser return pulses for a target, as well as provide imaging information on the background of the target. This capability is enabled by having a read-out integrated circuit (ROIC) capable of extracting both types of information from a pixel of a focal plane array (FPA). | 10-04-2012 |
20130003472 | MEMORY WITH CORRELATED RESISTANCE - Methods, systems, and devices are disclosed, such as a system for sequentially writing to a data locations coupled to one another in series. In certain embodiments, the system includes a plurality of data locations and a controller. The controller is configured to sequentially write data values to the plurality of data locations, starting with the data location at an end of the series and then sequentially writing to each adjacent data location. | 01-03-2013 |
20140078839 | METHODS FOR SENSING MEMORY ELEMENTS IN SEMICONDUCTOR DEVICES - A memory device that, in certain embodiments, includes a plurality of memory elements connected to a bit-line and a delta-sigma modulator with a digital output and an analog input, which may be connected to the bit-line. In some embodiments, the delta-sigma modulator includes a circuit with first and second inputs and an output. The circuit is configured to combine (add or subtract) input signals. The first input may be connected to the analog input. The delta-sigma modulator may also include an integrator connected to the output of the circuit, an analog-to-digital converter with an input connected to an output of the integrator and an output connected to the digital output, and a digital-to-analog converter with an input connected to the output of the analog-to-digital converter and an output connected to the second input of the circuit. | 03-20-2014 |