Patent application number | Description | Published |
20080305413 | Methods of Forming Reticles - The invention includes reticle constructions and methods of forming reticle constructions. In a particular aspect, a method of forming a reticle includes provision of a reticle substrate having a defined main-field region and a defined boundary region. The substrate has a relatively transparent base and a relatively opaque material over the base. A thickness of the relatively opaque material of the main-field region is reduced relative to a thickness of the relatively opaque material of the boundary region. A reticle construction of the present invention can comprise a relatively transparent base, and a relatively opaque material over the base. The construction can have a defined main-field region and a defined boundary region, and the relatively opaque material of the main-field region can have a reduced thickness relative to the relatively opaque material of the boundary region. | 12-11-2008 |
20090239162 | Methods of Forming Reticles - The invention includes reticle constructions and methods of forming reticle constructions. In a particular aspect, a method of forming a reticle includes provision of a reticle substrate having a defined main-field region and a defined boundary region. The substrate has a relatively transparent base and a relatively opaque material over the base. A thickness of the relatively opaque material of the main-field region is reduced relative to a thickness of the relatively opaque material of the boundary region. A reticle construction of the present invention can comprise a relatively transparent base, and a relatively opaque material over the base. The construction can have a defined main-field region and a defined boundary region, and the relatively opaque material of the main-field region can have a reduced thickness relative to the relatively opaque material of the boundary region. | 09-24-2009 |
20100248093 | Reticle Constructions - The invention includes reticle constructions and methods of forming reticle constructions. In a particular aspect, a method of forming a reticle includes provision of a reticle substrate having a defined main-field region and a defined boundary region. The substrate has a relatively transparent base and a relatively opaque material over the base. A thickness of the relatively opaque material of the main-field region is reduced relative to a thickness of the relatively opaque material of the boundary region. A reticle construction of the present invention can comprise a relatively transparent base, and a relatively opaque material over the base. The construction can have a defined main-field region and a defined boundary region, and the relatively opaque material of the main-field region can have a reduced thickness relative to the relatively opaque material of the boundary region. | 09-30-2010 |
20110045389 | Method to Recover the Exposure Sensitivity of Chemically Amplified Resins from Post Coat Delay Effect - Methods of fabricating a photomask, methods of treating a chemically amplified resist-coated photomask blank, a photomask blank resulting from the methods, and systems for fabricating a photomask are provided. The method is useful for recovering the exposure sensitivity of a chemically amplified resist disposed on a photomask blank from a post-coat delay effect. | 02-24-2011 |
Patent application number | Description | Published |
20090002706 | Wafer level alignment structures using subwavelength grating polarizers - In one embodiment, a wafer alignment system, comprises a radiation source to generate radiation, a radiation directing assembly to direct at least a portion of the radiation onto a surface of a wafer, the radiation having a polarization state, an optical analyzer to collect at least a portion of the radiation reflected from the wafer, the wafer including at least a first region having a first grating pattern oriented in a first direction and at least a second region having a second grating pattern oriented in a second direction, different from the first direction. | 01-01-2009 |
20110229804 | MICROLITHOGRAPHY MASKS INCLUDING IMAGE REVERSAL ASSIST FEATURES, MICROLITHOGRAPHY SYSTEMS INCLUDING SUCH MASKS, AND METHODS OF FORMING SUCH MASKS - Microlithography masks are disclosed, such as those that include one or more image reversal assist features disposed between at least two primary mask features. The one or more image reversal assist features may be defined by a patterned relatively non-transparent material on a mask substrate. Microlithography systems include such masks. Methods of forming microlithography masks are also disclosed, such as those that include patterning a relatively non-transparent material on a mask substrate to form at least one image reversal assist feature located between at least two primary features. | 09-22-2011 |
20120045896 | Methods Of Forming Openings And Methods Of Patterning A Material - Some embodiments include methods of forming openings. For instance, a construction may have a material over a plurality of electrically conductive lines. A plurality of annular features may be formed over the material, with the annular features crossing the lines. A patterned mask may be formed over the annular features, with the patterned mask leaving segments of the annular features exposed through a window in the patterned mask. The exposed segments of the annular features may define a plurality of openings, and such openings may be transferred into the material to form openings extending to the electrically conductive lines. | 02-23-2012 |
20120244708 | Methods Of Patterning Materials - Some embodiments include methods of forming openings. For instance, a construction may have a material over a plurality of electrically conductive lines. A plurality of annular features may be formed over the material, with the annular features crossing the lines. A patterned mask may be formed over the annular features, with the patterned mask leaving segments of the annular features exposed through a window in the patterned mask. The exposed segments of the annular features may define a plurality of openings, and such openings may be transferred into the material to form openings extending to the electrically conductive lines. | 09-27-2012 |
20120278768 | SYSTEMS AND METHODS FOR STOCHASTIC MODELS OF MASK PROCESS VARIABILITY - Systems and methods are disclosed for a stochastic model of mask process variability of a photolithography process, such as for semiconductor manufacturing. In one embodiment, a stochastic error model may be based on a probability distribution of mask process error. The stochastic error model may generate a plurality of mask layouts having stochastic errors, such as random and non-uniform variations of contacts. In other embodiments, the stochastic model may be applied to critical dimension uniformity (CDU) optimization or design rule (DR) sophistication. | 11-01-2012 |
20130010274 | MASKS FOR USE IN LITHOGRAPHY INCLUDING IMAGE REVERSAL ASSIST FEATURES, LITHOGRAPHY SYSTEMS INCLUDING SUCH MASKS, AND METHODS OF FORMING SUCH MASKS - Microlithography masks are disclosed, such as those that include one or more image reversal assist features disposed between at least two primary mask features. The one or more image reversal assist features may be defined by a patterned relatively non-transparent material on a mask substrate. Microlithography systems include such masks. Methods of forming microlithography masks are also disclosed, such as those that include patterning a relatively non-transparent material on a mask substrate to form at least one image reversal assist feature located between at least two primary features. | 01-10-2013 |
20130043597 | Semiconductor Constructions and Methods of Forming Interconnects - Some embodiments include methods of forming interconnects. A first circuitry level may be formed, and a first dielectric region may be formed over such first level. A second level of circuitry may be formed over the first dielectric region. An interconnect may be formed to extend through such second level. A second dielectric region may be formed over the second level of circuitry, and a third level of circuitry may be formed over the second dielectric region. The third level of circuitry may be electrically connected to the first level of circuitry through the interconnect. Some embodiments include constructions having interconnects extending from a first level of circuitry, through an opening in a second level of circuitry, and to a third level of circuitry; with an individual interconnect including multiple separate electrically conductive posts. | 02-21-2013 |
20130164944 | Methods Of Forming Openings And Methods Of Patterning A Material - Some embodiments include methods of forming openings. For instance, a construction may have a material over a plurality of electrically conductive lines. A plurality of annular features may be formed over the material, with the annular features crossing the lines. A patterned mask may be formed over the annular features, with the patterned mask leaving segments of the annular features exposed through a window in the patterned mask. The exposed segments of the annular features may define a plurality of openings, and such openings may be transferred into the material to form openings extending to the electrically conductive lines. | 06-27-2013 |
20130277822 | INTERCONNECT STRUCTURES FOR INTEGRATED CIRCUITS AND THEIR FORMATION - An embodiment of an interconnect structure for an integrated circuit may include a first conductor coupled to circuitry, a second conductor, a dielectric between the first and second conductors, and a conductive underpass under and coupled to the first and second conductors and passing under the dielectric or a conductive overpass over and coupled to the first and second conductors and passing over the dielectric. The second conductor would be floating but for its coupling to the conductive underpass or the conductive overpass. In other embodiments, another dielectric might be included that would electrically isolate the second conductor but for its coupling to the conductive underpass or the conductive overpass. | 10-24-2013 |
20140026106 | SYSTEMS AND METHODS FOR STOCHASTIC MODELS OF MASK PROCESS VARIABILITY - Systems and methods are disclosed for a stochastic model of mask process variability of a photolithography process, such as for semiconductor manufacturing. In one embodiment, a stochastic error model may be based on a probability distribution of mask process error. The stochastic error model may generate a plurality of mask layouts having stochastic errors, such as random and non-uniform variations of contacts. In other embodiments, the stochastic model may be applied to critical dimension uniformity (CDU) optimization or design rule (DR) sophistication. | 01-23-2014 |
20140117529 | Semiconductor Constructions, Patterning Methods, and Methods of Forming Electrically Conductive Lines - Some embodiments include methods of forming electrically conductive lines. Photoresist features are formed over a substrate, with at least one of the photoresist features having a narrowed region. The photoresist features are trimmed, which punches through the narrowed region to form a gap. Spacers are formed along sidewalls of the photoresist features. Two of the spacers merge within the gap. The photoresist features are removed to leave a pattern comprising the spacers. The pattern is extended into the substrate to form a plurality of recesses within the substrate. Electrically conductive material is formed within the recesses to create the electrically conductive lines. Some embodiments include semiconductor constructions having a plurality of lines over a semiconductor substrate. Two of the lines are adjacent to one another and are substantially parallel to one another except in a region wherein said two of the lines merge into one another. | 05-01-2014 |
20140151902 | Semiconductor Constructions and Methods of Forming Interconnects - Some embodiments include methods of forming interconnects. A first circuitry level may be formed, and a first dielectric region may be formed over such first level. A second level of circuitry may be formed over the first dielectric region. An interconnect may be formed to extend through such second level. A second dielectric region may be formed over the second level of circuitry, and a third level of circuitry may be formed over the second dielectric region. The third level of circuitry may be electrically connected to the first level of circuitry through the interconnect. Some embodiments include constructions having interconnects extending from a first level of circuitry, through an opening in a second level of circuitry, and to a third level of circuitry; with an individual interconnect including multiple separate electrically conductive posts. | 06-05-2014 |