Patent application number | Description | Published |
20080304580 | TRANSMISSION SYSTEM, TRANSMITTER, RECEIVER, AND TRANSMISSION METHOD - There is provided a transmission system in which a data sequence is transmitted. The transmission system includes a transmitter that generates a transmission signal by converting pieces of data included in the data sequence into data waveforms each of which has (i) a level signal whose signal level is determined by a value of a corresponding one of the pieces of data and (ii) a timing edge indicating a timing to obtain the level signal, and transmits the generated transmission signal, and a receiver that detects the signal level of each of the data waveforms of the received transmission signal at the timing designated by the timing edge of the each data waveform, and outputs a data value corresponding to the detected signal level. | 12-11-2008 |
20080310489 | COMMUNICATION SYSTEM, RECEIVER UNIT, AND ADAPTIVE EQUALIZER - A communication system in which a signal is transferred includes a transmitter that transmits a signal, a receiver that receives a signal transmitted thereto, and an adaptive equalizer that generates a compensated signal by compensating degradation of the signal to be received by the receiver. The adaptive equalizer includes a signal compensating section that generates the compensated signal by passing therethrough the signal to be received by the receiver, a jitter measuring section that measures jitter of the compensated signal output from the signal compensating section, and an adjusting section that adjusts a characteristic of the signal compensating section so as to reduce the jitter of the compensated signal which is measured by the jitter measuring section. | 12-18-2008 |
20090103672 | TRANSMISSION SYSTEM, TRANSMITTER, RECEIVER, AND TRANSMISSION METHOD - There is provided a circuit constituted by small-sized and simple logical gates which reduces the bit errors generated in a data sequence received by a receiver. A transmission system, in which a data sequence is transferred, includes a transmitter that transmits a first transfer signal including an edge-present data waveform which has (i) a first timing edge indicating a timing to obtain data included in the data sequence and (ii) a level signal indicating a signal level corresponding to a value of the data, and a receiver that outputs the value of the data in accordance with the signal level which is detected at the timing indicated by the first timing edge of the edge-present data waveform. | 04-23-2009 |
20090189666 | JITTER INJECTION CIRCUIT, PATTERN GENERATOR, TEST APPARATUS, AND ELECTRONIC DEVICE - Provided is a jitter injection circuit that generates a jittery signal including jitter, including a plurality of delay circuits that receive a supplied reference signal in parallel and that each delay the received reference signal by a preset delay amount and a signal generating section that generates each edge of the jittery signal according to a timing of the signal output by each delay circuit. In the jitter injection circuit the delay amount of at least one delay circuit is set to be a value different from an integer multiple of an average period of the jittery signal. | 07-30-2009 |
20090189667 | JITTER INJECTION CIRCUIT, PATTERN GENERATOR, TEST APPARATUS, AND ELECTRONIC DEVICE - Provided is a jitter injection circuit that generates a jittery signal including jitter, including a plurality of delay circuits that are connected in a cascading manner and that each sequentially delay a supplied reference signal by a preset delay amount and a signal generating section that generates each edge of the jittery signal according to a timing of the signal output by each delay circuit. In the jitter injection circuit the delay amount of at least one delay circuit is set to be a value different from an integer multiple of an average period of the jittery signal. | 07-30-2009 |
20090281751 | JITTER MEASUREMENT APPARATUS, JITTER MEASUREMENT METHOD, RECORDING MEDIA, COMMUNICATION SYSTEM AND TEST APPARATUS - Provided is a jitter measurement apparatus, including a sampling section that samples a signal under measurement having a cycle T, a waveform reconfiguring section that shapes a reconfigured waveform having the cycle T by rearranging ordinal ranks of sample values sampled by the sampling section, a distribution generating section that generates a timing distribution of edges in the reconfigured waveform, and a statistical value calculating section that calculates a statistical value of the timing distribution. The sampling section may sample the signal under measurement having the cycle T a certain number of times N while the signal under measurement repeats for M cycles, where M and N are coprime. | 11-12-2009 |
20090304053 | DIGITAL MODULATOR, DIGITAL MODULATING METHOD, DIGITAL TRANSCEIVER SYSTEM, AND TESTING APPARATUS - Provided is a digital modulator, including a carrier wave output section that outputs a carrier wave, a variable delay section that delays the carrier wave, and a delay amount setting section that sets a delay amount by which the variable delay section delays the carrier wave based on transmission data being transmitted by the carrier wave. The variable delay section may include a multi-stage delay buffer circuit in which delay buffers that delay an input signal by a unit shift amount are connected in a cascade connection, the multi-stage delay buffer circuit may receive the carrier wave at a first-stage delay buffer as input, and the delay amount setting section may include a multiplexer that selects either an output from the carrier wave output section or an output from each stage of the multi-stage delay buffer circuit. | 12-10-2009 |
20100106470 | DETERMINISTIC COMPONENT IDENTIFYING APPARATUS, IDENTIFYING, PROGRAM, RECORDING MEDIUM, TEST SYSTEM AND ELECTRONIC DEVICE - Provided is a deterministic component identifying apparatus that identifies a distribution shape of a deterministic component included in a probability density function supplied thereto, comprising a standard deviation calculating section that calculates a standard deviation of the probability density function; a spectrum calculating section that calculates a spectrum of the probability density function; a null frequency detecting section that detects a null frequency of the spectrum; and a ratio calculating section that calculates a ratio between a top portion and a bottom portion of a distribution of the deterministic component, based on the standard deviation of the probability density function and the null frequency of the spectrum. | 04-29-2010 |
20100107020 | CALCULATION APPARATUS, CALCULATION METHOD, PROGRAM, RECORDING MEDIUM, TEST SYSTEM AND ELECTRONIC DEVICE - Provided is a calculating apparatus that calculates a characteristic of a target signal, comprising a designating section that receives a designation of either a bit error rate or a sampling timing; and a calculating section that calculates a range of sampling timings over which the bit error rate is less than a designated value or a bit error rate at a designated sampling timing by using a relational expression between the sampling timing and the bit error rate in a transmission model for transmitting a signal having jitter that includes a random component and a deterministic component having a prescribed probability density distribution, the relational expression achieved by substituting, as parameters, a standard deviation of a random component in jitter of the target signal and a peak-to-peak value of a deterministic component in the jitter of the target signal. | 04-29-2010 |
20120323519 | TEST APPARATUS - A pattern generator PG generates control data which specifies a threshold voltage to be compared with a signal under test input to an I/O terminal, and generates expected value data which represents an expected value for the comparison result between the signal under test and the threshold voltage. A threshold voltage generator generates the threshold voltage having a voltage level that corresponds to the control data at every setting timing indicated by a first timing signal. A level comparator compares the voltage level of the signal under test with its corresponding threshold voltage. A timing comparator latches the output of the level comparator at a strobe timing indicated by a second timing signal so as to generate a comparison signal. A timing adjustment unit adjusts the phase of the first timing signal. | 12-20-2012 |
20130147499 | TEST APPARATUS AND TEST METHOD - A pattern generator generates a pattern signal which represents a test signal to be supplied to a DUT. A driver generates a test signal having a level that corresponds to the pattern signal, and outputs the test signal thus generated to the DUT. A voltage modulator changes, in a predetermined voltage range, the voltage level of the test signal output from the driver DR. | 06-13-2013 |
20130170583 | TRANSMITTING SYSTEM, RECEIVING SYSTEM, TRANSMITTING METHOD, AND RECEIVING METHOD - Provided are a transmitting system including a pulse amplitude modulator section that pulse amplitude modulates an input signal into a set of first and second pulse amplitude modulated signals, a first frequency signal output section that outputs a first frequency signal, a first amplitude shift keying modulator section that amplitude shift keying modulates, using the first frequency signal, the first pulse amplitude modulated signal into an amplitude shift keying modulated signal, an adder section that adds together the amplitude shift keying modulated signal and the second pulse amplitude modulated signal to generate a transmission signal, and a transmitter section that transmits the transmission signal, a transmitting method, a receiving system for receiving the signal transmitted from the transmitting system and a receiving method. | 07-04-2013 |
20130249625 | SIGNAL GENERATION APPARATUS AND SIGNAL GENERATION METHOD - In order to output an accurate waveform in which quantization noise has been cancelled out, provided is a signal generating apparatus that outputs an output signal corresponding to a waveform data sequence expressing a waveform, the signal generating apparatus comprising a DA converting section that outputs an analog signal by sequentially performing digital/analog conversion on each piece of data included in the waveform data sequence, at a timing of a sampling clock; and a jitter injecting section that injects jitter decreasing a quantization noise component of the output signal, into the sampling clock supplied to the DA converting section. | 09-26-2013 |