Patent application number | Description | Published |
20120093496 | CAMERA DRIVING DEVICE - A camera driving device, including: a base frame, a magnetic rotating member, a yoke, and a coil. The magnetic rotating member is structured in one piece and includes a first and second magnetic pole that are opposite in polarity; the magnetic rotating member is formed with a base plate and a swing shaft extending from the base plate. The magnetic rotating member is coupled to the base frame, and the swing shaft is positioned at a side of base plate away from the base frame. The yoke is installed at the base frame, and the two terminus of the yoke is positioned to one side of the magnetic rotating member. The coil is wrapped on the yoke. Therein, the magnetic rotating member can rotate between a first and second position. | 04-19-2012 |
20130077950 | APERTURE CONTROLING MECHANISM FOR IMAGE RECORDING DEVICE - An image recording device includes a base plate; a blade assembly; and a driving mechanism. The base plate is formed with a guiding slot and a first axle. The blade assembly includes a first blade and a second blade stacked on the base plate and hinged to the first axle. The first blade is formed with a first pivot slot thereon, which has two first inner walls formed apart oppositely. The second blade is formed with a second pivot slot thereon, which has two second inner walls formed apart oppositely. The distance between the two second inner walls is greater than the distance between the two first inner walls. The driving mechanism includes a pin member projected through the guiding slot, the first pivot slot, and the second pivot slot. The first and second blades are driven by the pin member. Thereby, the image recording device can be miniaturized. | 03-28-2013 |
20150077623 | CAMERA ANGLE ADJUSTABLE DEVICE AND THE METHOD OF HANDLING THE ARTICLE - The instant disclosure relates to a camera angle adjustable device. The camera angle adjustable device includes a base, a camera module, a reflective mirror structure and a driver. The base has a first surface, a second surface, a front side and a back side. The camera module is disposed on one side perpendicular to the front side and the back side of the first surface. The reflective mirror structure includes a frame and a mirror body, wherein the frame is pivotally connected to the first surface, the mirror body is mounted on the frame, and the mirror body selectively corresponds to one of the front side and the back side. The driver is mounted on the second surface and connected to the reflective mirror structure in order to drive the reflective mirror structure. A method for adjustable the camera angle is also provided. | 03-19-2015 |
Patent application number | Description | Published |
20100131914 | METHOD TO DETERMINE PROCESS WINDOW - A method to determine a process window is disclosed. First, a pattern data is provided. Second, a bias set is determined. Then, a resizing procedure is performed on the pattern data in accordance with the bias set to obtain a usable final resized pattern to be a target pattern of changed area. The final resized pattern is consistent with a minimum spacing rule, a contact to poly rule and a contact to metal rule. Accordingly, the target pattern is output. | 05-27-2010 |
20120295186 | DOUBLE PATTERNING MASK SET AND METHOD OF FORMING THEREOF - A double patterning mask set includes a first mask having a first set of via patterns, and a second mask having a second set of via patterns. The first set of via patterns includes at least two via patterns arranged along a diagonal direction, each of the at least two via patterns has at least a truncated corner. The first set of via patterns and the second set of via patterns are interlacedly arranged along a horizontal direction and a vertical direction. | 11-22-2012 |
20130163850 | MASK PATTERN AND CORRECTING METHOD THEREOF - A mask pattern and a correcting method thereof are provided. The correcting method includes the following steps. An original pattern having a first original contour and a second original contour is provided. The first original contour has a first original corner. The second original contour has a second original corner, which is near the first original corner. The first and second original corners are cut to form a cut pattern. An optical proximity correction (OPC) process is applied to the cut pattern to form the mask pattern. | 06-27-2013 |
20130280645 | Mask Set for Double Exposure Process and Method of Using the Mask Set - A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth. | 10-24-2013 |
20140040837 | METHOD OF OPTICAL PROXIMITY CORRECTION ACCORDING TO COMPLEXITY OF MASK PATTERN - A method of optical proximity correction (OPC) includes the following steps. At first, a layout pattern is provided to a computer system. Subsequently, the layout pattern is classified into at least a first region and at least a second region. Then, several iterations of OPC calculations are performed to the layout pattern, and a total number of OPC calculations performed in the first region is substantially larger than a total number of OPC calculations performed in the second region. Afterwards, a corrected layout pattern is outputted through the computer system onto a mask. | 02-06-2014 |
20140131832 | METHOD FOR MANUFACTURING SEMICONDUCTOR LAYOUT PATTERN, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device includes providing a substrate having a mask layer formed thereon, providing a first photomask having a first layout pattern and a second photomask having a second layout pattern, the first layout pattern including a plurality of active area portions and at least a neck portion connecting two adjacent active area portions, transferring the first layout pattern from the first photomask to the mask layer to form a plurality of active area patterns and at least a neck pattern connecting two adjacent active area patterns in the mask layer, and transferring the second layout pattern from the second photomask to the mask layer to remove the neck pattern to form a patterned mask. The patterned mask includes the active area patterns. A slot is at least formed between the two adjacent active area patterns. | 05-15-2014 |
20140258946 | MASK SET FOR DOUBLE EXPOSURE PROCESS AND METHOD OF USING THE MASK SET - A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth. | 09-11-2014 |
20150036116 | APERTURE FOR PHOTOLITHOGRAPHY - An aperture is configured to be disposed between an illumination source and a semiconductor substrate in a photolithography system. The aperture includes a light-transmission portion with a non-planar thickness profile to compensate the discrepancy of wave-fronts of the light beams of different orders. | 02-05-2015 |
Patent application number | Description | Published |
20090262165 | SUPPLY SYSTEM AND INJECTION-HEAD STRUCTURE THEREOF - A supply system capable of providing a working fluid is provided. The supply system includes an access device, a first energizer, a second energizer, a third energizer and an output device. The access device utilized to access the working fluid includes a connecting port. The first energizer provides a first energy to energize the working fluid, thereby expelling the bubbles from the working fluid. The second energizer provides a second energy to energize the working fluid received in the access device, thereby expelling the working fluid through the connecting port of the access device. The output device is connected to the access device, thereby receiving and outputting the working fluid. The third energizer provides a third energy to heat the working fluid passing through the access device and the output device. | 10-22-2009 |
20120206538 | SUPPLY SYSTEM AND INJECTION-HEAD STRUCTURE THEREOF - A supply system capable of providing a working fluid is provided. The supply system includes an access device, a first energizer, a second energizer, a third energizer and an output device. The access device utilized to access the working fluid includes a connecting port. The first energizer provides a first energy to energize the working fluid, thereby expelling the bubbles from the working fluid. The second energizer provides a second energy to energize the working fluid received in the access device, thereby expelling the working fluid through the connecting port of the access device. The output device is connected to the access device, thereby receiving and outputting the working fluid. The third energizer provides a third energy to heat the working fluid passing through the access device and the output device. | 08-16-2012 |
Patent application number | Description | Published |
20100071405 | TWO-STAGE EXPANSION COOLING SYSTEM AND EVAPORATOR THEREOF - An evaporator, applicable to a two-stage expansion cooling system, is used for receiving a high-pressure liquid working fluid. The evaporator includes a thermal-conductive block having a channel system. The channel system includes a high-pressure channel, a low-pressure channel, and a second stage expansion channel. The second stage expansion channel has an input end and an output end. The input end is communicated with the high-pressure channel. The output end is communicated with the low-pressure channel, and has a cross-sectional area smaller than that of the low-pressure channel. The high-pressure liquid working fluid flows into the thermal-conductive block from the high-pressure channel, and then enters the second stage expansion channel through the input end. A part of the high-pressure liquid working fluid flowing out of the output end expands into a saturated low-pressure liquid working fluid and enters the low-pressure channel. | 03-25-2010 |
20100126209 | COLD PLATE AND REFRIGERATION SYSTEM - A cold plate including a cold wall, a first cavity, a first pipe, a second cavity, an expansion unit and a second pipe is provided. The first cavity covers on the cold wall to form a first fluid space, and the first pipe is connected with the first cavity. The second cavity is disposed inside the first cavity and covers on the cold wall to form a second fluid space. The expansion unit is disposed between the second cavity and the cold wall to interconnect the first fluid space and the second fluid space. The second pipe is disposed inside the first pipe and connected with the second cavity. Besides, a refrigeration system including the cold plate mentioned above is also provided. | 05-27-2010 |
20120292004 | HEAT EXCHANGER - A heat exchanger includes: an inlet header tube including opposite first and second ends and an inner space formed between the first and second ends; an outlet header tube parallel to the inlet header tube; a plurality of heat exchange tubes transversely extending between and fluidly connected to the inlet and outlet header tubes, each of the heat exchange tubes having a connecting end connected to the inlet header tube; and a baffle tube inserted into the inner space of the inlet header tube. The baffle tube has an open end proximate to the first end, a closed end proximate to the second end, and a plurality of orifices disposed between the open and closed ends to fluidly intercommunicate the inner space of the inlet header tube and the baffle tube. Each of the orifices is disposed in alignment with the connecting end of one of the heat exchange tubes. | 11-22-2012 |
20130112377 | HEAT-DISSIPATING DEVICE AND HEAT-DISSIPATING SYSTEM - A heat-dissipating device and a heat-dissipating system are provided. The heat-dissipating system includes a driver, a heat-exchanger and a heat-dissipating device. The heat-exchanger is communicated to the driver and includes a body, a hydrophobic membrane and a cover. The body has an inlet, an outlet and a channel. Both ends of the channel exposed on a body's surface are respectively communicated to the inlet and the outlet, the inlet and outlet are communicated respectively to the driver and heat-exchanger. The membrane is disposed on the body's surface and covers the channel. The cover combines with the body and has a chamber and an exhaust port. The membrane separates the channel from the chamber communicated to the exhaust port communicated to the heat-exchanger. The driver drives a working fluid to the heat-dissipating device, and the fluid further goes to the heat-exchanger from the heat-dissipating device and then back to the driver. | 05-09-2013 |
20140138075 | HEAT EXCHANGER AND SEMICONDUCTOR MODULE - A heat exchanger suitable for cooling a heat source is provided, wherein a bypass channel formed in the heat exchanger has a width greater than a width of other channels to reduce a flow resistance of a fluid and a pumping power for driving a system. That is, under the same pumping power loss, more fluid is driven to achieve a better heat dissipation effect. By applying the heat exchanger, electronic devices are bonded to a top of the heat exchanger through a supporting substrate. In this way, heat generated when the electronic devices are is transferred to the heat exchanger through the supporting substrate and dissipated to the outside via the heat exchanger. Since the distance of heat transfer is decreased, the thermal resistance generated by an interface between the devices is reduced to improve heat transfer efficiency and heat dissipation effect. | 05-22-2014 |
Patent application number | Description | Published |
20110290456 | MICRO COOLING FAN - A micro cooling fan includes a housing, a fan wheel, and a main circuit board. The main circuit board has a stator and a driving circuit. The stator is electrically connected to the driving circuit. The stator is disposed on a first inner surface, and the driving circuit is disposed on a first outer surface, so that the housing and the driving circuit of the micro fan motor form an integral structure. The first outer surface is opposite to the first inner surface, or the first outer surface is located on a side surface of the housing. Therefore, by disposing the driving circuit on the first outer surface, the wind resistance of the fan blades is reduced, and the air volume of the micro cooling fan is increased accordingly, so that the cooling effect of the micro cooling fan is improved. | 12-01-2011 |
20120275909 | MICRO COOLING FAN - A micro cooling fan comprises a housing and a main circuit board. The housing has an accommodation space, a first inner surface, and a gap. The gap is in communication with the accommodation space, and two opposite side edges of the gap have a groove respectively. The main circuit board comprises a first circuit board and a second circuit board. The first circuit board has a stator, the second circuit board has a driving circuit, and the stator is electrically connected to the driving circuit. The first circuit board is disposed on the first inner surface, and the second circuit board is embedded into the grooves and blocks the gap. | 11-01-2012 |
20130120096 | MULTILAYERED MINIATURE COIL COMPONENT - A multilayered miniature coil component, comprising a plurality of coil layers and insulating layers, the plurality of coil layers and insulating layers being alternately overlapped on each other. Each of the plurality of coil layers includes a plurality of coils and wires, each of the coils has a first and a second end, and a plurality of first conductive portions is disposed on each of the coil layers, at least one second conductive portion is disposed on at least one of the coil layers, and each of the plurality of insulating layers has a plurality of conductive through holes disposed correspondingly to the first conductive portions and the second conductive portions, thus through the plurality of wires, the first and the second conductive portions and the conductive through holes, the plurality of coils in each of the coil layers are composed as a circuit loop | 05-16-2013 |
Patent application number | Description | Published |
20110289260 | METHOD FOR PERFORMING BLOCK MANAGEMENT USING DYNAMIC THRESHOLD, AND ASSOCIATED MEMORY DEVICE AND CONTROLLER THEREOF - A method for performing block management is provided. The method is applied to a controller of a Flash memory, where the Flash memory includes a plurality of blocks. The method includes: adjusting a dynamic threshold according to at least one condition; and comparing a valid/invalid page count of a specific block of the plurality of blocks with the dynamic threshold to determine whether to erase the specific block. An associated memory device and a controller thereof are also provided, where the memory device includes the Flash memory and the controller. In particular, the controller includes a read only memory (ROM) arranged to store a program code, and further includes a microprocessor arranged to execute the program code to control access to the Flash memory and manage the plurality of blocks, where under control of the microprocessor, the controller operates according to the method. | 11-24-2011 |
20120233427 | Data Storage Device and Data Management Method Thereof - An embodiment of the invention provides a data storage device and data management method thereof. The data storage device is coupled to a host, and includes a storage media having data sectors for storing data and a controller. The controller is coupled to the storage media for sequentially receiving one or more read commands and corresponding one or more logical addresses thereto, reads a plurality of first data sectors from the storage media according to the read commands and the corresponding logical addresses, outputs data of the first data sectors to the host, calculates a valid duration required for the one or more read commands, calculates an average data throughput according to the number of the first data sectors and the valid duration, and determines whether the average data throughput exceeds a predetermined threshold. When the average data throughput exceeds the predetermined threshold, the controller performs a blocking procedure to prevent the storage media from being accessed. | 09-13-2012 |
Patent application number | Description | Published |
20120070684 | THERMAL CONDUCTIVITY SUBSTRATE AND MANUFACTURING METHOD THEREOF - A thermal conductivity substrate including a metal substrate, a metal layer, an insulating layer, a plurality of conductive structures, a first conductive layer and a second conductive layer is provided. The metal layer is disposed on the metal substrate and entirely covers the metal substrate. The insulating layer is disposed on the metal layer. The conductive structures are embedded in the insulating layer and connected to a portion of the metal layer. The first conductive layer is disposed on the insulating layer. The second conductive layer is disposed on the first conductive layer and the conductive structures. The second conductive layer is electrically connected to a portion of the metal layer through the conductive structures. The second conductive layer and the conductive structures are integrally formed. | 03-22-2012 |
20120175044 | MANUFACTURING METHOD OF THERMAL CONDUCTIVITY SUBSTRATE - A thermal conductivity substrate including a metal substrate, a metal layer, an insulating layer, a plurality of conductive structures, a first conductive layer and a second conductive layer is provided. The metal layer is disposed on the metal substrate and entirely covers the metal substrate. The insulating layer is disposed on the metal layer. The conductive structures are embedded in the insulating layer and connected to a portion of the metal layer. The first conductive layer is disposed on the insulating layer. The second conductive layer is disposed on the first conductive layer and the conductive structures. The second conductive layer is electrically connected to a portion of the metal layer through the conductive structures. The second conductive layer and the conductive structures are integrally formed. | 07-12-2012 |
20130329386 | PACKAGE CARRIER AND MANUFACTURING METHOD THEREOF - A manufacturing method of a package carrier is provided. A supporting plate is provided, wherein a metal layer is already disposed on the supporting plate. A patterned dry film layer is formed on the metal layer. A portion of the metal layer is exposed by the patterned dry film layer. The patterned dry film layer is used as an electroplating mask to electroplate a surface treatment layer on the portion of the metal layer exposed by the patterned dry film layer. The patterned dry film layer is removed so as to expose the portion of the metal layer. The surface treatment layer is used as an etching mask to etch the portion of the metal layer not covered by the surface treatment layer so as to form a patterned metal layer. | 12-12-2013 |
20140144677 | PACKAGE CARRIER - A package carrier includes a substrate, first and second insulation layers, first and second patterned circuit layers, at least one first and second conductive through holes, a heat dissipation channel, an adhesive layer and a heat conducting element. The first and second patterned circuit layers are respectively disposed on the first and second insulation layers which are respectively disposed on upper and lower surfaces of the substrate. The heat dissipation channel at least passes through the first insulation layer, the first and second patterned circuit layers, and the substrate. The first and second conductive through holes electrically connect with the substrate, the first and second patterned circuit layers. At least two opposite side surfaces of the heat conducting element each includes at least one convex portion or at least one concave portion. The heat conducting element is mounted in the heat dissipation channel via the adhesive layer. | 05-29-2014 |
Patent application number | Description | Published |
20090319968 | DESIGN AND VERIFICATION OF 3D INTEGRATED CIRCUITS - A method of designing a 3D integrated circuit (3D IC) including providing a first layout corresponding to a first device of a 3D IC and a second layout corresponding to a second device of a 3D IC is provided. A verification, such as LVS or DRC, may be performed not only on each device separately, but may also be performed to ensure proper connectivity between devices. The verification may be performed on a single layout file (e.g., GDS II file) including the interface layer of the first and second die. Dummy feature pattern may be determined for the 3D IC using a layout including the interface layers of the first and second devices. | 12-24-2009 |
20090326873 | INTEGRATED CIRCUIT DESIGN IN OPTICAL SHRINK TECHNOLOGY NODE - Disclosed is a system, method, and computer-readable medium for designing a circuit and/or IC chip to be provided using an optical shrink technology node. Initial design data may be provided in a first technology node and through the use of embedding scaling factors in one or more EDA tools of the design flow, a design (e.g., mask data) can be generated for the circuit in an optical shrink technology node. Examples of EDA tools in which embedded scaling factors may be provided are simulation models and extraction tools including LPE decks and RC extraction technology files. | 12-31-2009 |
20130154128 | Automatic Place and Route Method for Electromigration Tolerant Power Distribution - The present disclosure relates to an electromigration tolerant power distribution network generated by an automatic place and route (APR) methodology. In some embodiments, an automatic place and route tool constructs a local power network having multi-level power rails. The multi-level power rails have interleaved segments of vertically adjacent metal layers, wherein each interleaved segment is shorter than a predetermined characteristic length corresponding to a Blech length. By limiting the length of the interleaved metallization segments, electromigration within the multi-level power rails is alleviated, allowing for the maximum current density requirement (J | 06-20-2013 |
20130174106 | STITCH AND TRIM METHODS FOR DOUBLE PATTERNING COMPLIANT STANDARD CELL DESIGN - A method for creating double patterning compliant integrated circuit layouts is disclosed. The method allows patterns to be assigned to different masks and stitched together during lithography. The method also allows portions of the pattern to be removed after the process. | 07-04-2013 |
20150035551 | CELL CHARACTERIZATION WITH MILLER CAPACITANCE - A method for cell characterization with Miller capacitance includes characterizing input capacitance of an input of a first stage in a cell by considering a first current transition at the input of the first stage up to a first stop time. The first stop time occurs during the first current transition exhibits a substantial tail portion contributed by the later of a first input voltage transition and a first output voltage transition reaching a corresponding steady state voltage. The first input voltage transition is associated with the input of the first stage. The first output voltage transition is associated with an output of the first stage coupled to the input through a capacitor. | 02-05-2015 |
Patent application number | Description | Published |
20090167279 | DC Power Converter and Mode-Switching Method - A DC converter and a mode-switching method used in an electronic apparatus are included. The electronic apparatus includes a subsystem circuit. The DC power converter comprises a first voltage converting circuit electrically connected to the subsystem circuit, receiving a system voltage and a first reference voltage, and converting the system voltage to a first output voltage based on the first reference voltage; and a second voltage converting circuit electrically connected to the subsystem circuit and receiving the system voltage and a second reference voltage, and converting the system voltage to a second output voltage to the same output end of the first voltage converting circuit based on the second reference voltage; wherein the second voltage converting circuit outputs the second output voltage to the subsystem circuit when the first output voltage at the output end is smaller than a threshold. | 07-02-2009 |
20090167280 | Voltage Generating Circuit - A voltage generating circuit for generating a plurality of associated voltages includes a constant current source for generating a constant current; a plurality of resistors connected in series to the constant current source in series for generating a plurality of associated reference voltages; and a first controlled switch connected to a first resistor in parallel, wherein the plurality of associated reference voltages are changed by optionally conducting the first controlled switch to control the flow of the constant current through the first resistor. | 07-02-2009 |
20120098441 | LED Driving System and Driving Method Thereof - A light emitting diode (LED) driving system drives a plurality of LED strings. A plurality of current sources are respectively connected to the plurality of LED strings. A multi-phase control signal generator generates a plurality of multi-phase control signals that respectively maintain turn on or turn off states of the current sources so as to selectively conduct the corresponding LED strings. | 04-26-2012 |
20120105024 | Feedback Regulating Circuit - A feedback regulating circuit provides a regulated voltage to a multi-output circuit that outputs a plurality of output voltages. The feedback regulating circuit includes a voltage control unit, coupled to the plurality of output voltages, for generating a first voltage according to the plurality of output voltages and outputting a voltage control signal according to the first voltage; and a reference voltage generator, coupled to the voltage control unit, for receiving the voltage control signal and generating a reference voltage according to the voltage control signal, with the reference voltage being fed back to the multi-output circuit to regulate voltage to a high degree of accuracy. | 05-03-2012 |
20130113415 | METHOD AND APPARATUS FOR PERFORMING SYSTEM POWER MANAGEMENT - A method and an apparatus for performing charging port detection control are provided, where the method is applied to an electronic device, a communication port of the electronic device has a functionality of obtaining power from an external power source for the electronic device, and a power path switching unit of the electronic device is arranged to control electrical connection between a system within the electronic device and a battery of the electronic device. The method may include the steps of: performing charging port detection; and control operation(s) according to the charging port detection. For example, the method may include: controlling the power path switching unit to have different configuration according to the charging port detection in order to charge the battery with different charging profiles; and detecting the system voltage level during charging for switching from the constant current mode to the constant voltage mode. | 05-09-2013 |
Patent application number | Description | Published |
20100190380 | Waterproof electric plug or receptacle for LED light string - Waterproof electric plug or receptacle for LED light string is provided. In one embodiment, the plug includes a housing comprising two prongs, two fuses, an internal space, rear passages, compartments between the space and the passages, a wall for separating the space and the compartments; an electrical assembly comprising a PCB electrically to the prongs via the fuses, and rear conductive posts in the compartments; a power cord passing the passages and having two sleeves secured to the posts, and a shell mounted around the housing. Waterproof adhesive is applied on the wall, the compartments, and front and rear ends of the PCB. | 07-29-2010 |
20100197157 | Socket, plug, and adaptor combination with waterproof arrangement - A socket, plug, and adaptor combination includes a housing having a forward sliding door; an inverted L-shaped circuit assembly in the housing having a conductor mounting section in the vertical part; a transformer being concealed in the horizontal part of the circuit assembly in a waterproof way and adapted to electrically connect to a power cord; two electrical connection assemblies each disposed in the conductor mounting section and having a prong; a conductive assembly comprising two separate fuses disposed in the conductor mounting section, each fuse being electrically interconnected between the prong and the transformer; a cover releasably secured onto the circuit assembly and having two sockets distal the prongs; and a covering plate disposed between the transformer and the cover. The combination is applicable to be used as a charger for outdoor LED type Christmas light strings. | 08-05-2010 |
20110109242 | Bulb set structure - A bulb set structure comprises a plug having two guiding pieces to connect with a power source and to assemble with a LED bulb set and a fitter, an orifice to output alternating current, and a power converting unit having one end to electrically connect with the guiding pieces, and having another end to connect with wires of the LED bulb set and the fitter by using the joining segment to convert the alternating current into direct current, and a circuit board is used to rectify the alternating current to output direct current to emit LED bulb set and to transmit the alternating current to the fitter. | 05-12-2011 |
Patent application number | Description | Published |
20090301555 | SOLAR CELL, SOLAR MODULE AND SYSTEM AND FABRICATION METHOD THEREOF - A solar cell having an improved structure of rear surface includes a p-type doped region, a dense metal layer, a loose metal layer, at least one bus bar opening, and solderable material on or within the bus bar opening. The solderable material contacts with the dense aluminum layer. The improved structure in rear surface increases the light converting efficiency, and provides a good adhesion between copper ribbon and solar cell layer thereby providing cost advantages and reducing the complexity in manufacturing. A solar module and solar system composed of such solar cell are also disclosed. | 12-10-2009 |
20090305457 | SOLAR CELL, SOLAR MODULE AND SYSTEM AND FABRICATION METHOD THEREOF - A solar cell having an improved structure of rear surface includes a p-type doped region, a dense metal layer, a loose metal layer, at least one bus bar opening, and solderable material on or within the bus bar opening. The solderable material contacts with the dense aluminum layer. The improved structure in rear surface increases the light converting efficiency, and provides a good adhesion between copper ribbon and solar cell layer thereby providing cost advantages and reducing the complexity in manufacturing. A solar module and solar system composed of such solar cell are also disclosed. | 12-10-2009 |
20100212735 | SOLAR CELL AND METHOD FOR FABRICATING THE SAME - This invention discloses a high-efficiency solar cell structure which enables high throughput manufacturing process thereof. The solar cell is accomplished by forming a plurality of first emitter regions in a front surface of a substrate, a plurality of second emitter regions in the front surface, and a plurality of fingers. Each of the fingers is formed over a least a portion of the second emitter region and a portion of the first emitter region. The first emitter regions and the second emitter regions have a depth not less than 0.2 μm. | 08-26-2010 |
20140318612 | MANUFACTURING METHOD OF SILICON SOLAR CELL AND SILICON SOLAR CELL - A manufacturing method of a silicon solar cell and the silicon solar cell thereof are provided. A silicon substrate formed with a doped layer on a light receiving surface thereof is provided. First and second dielectric layers are respectively formed on the light receiving surface and the rear surface of the silicon substrate. A patterned second dielectric layer with an opening and a groove in the silicon substrate are formed by partially removing the second dielectric layer and the silicon substrate. First and second electrode compositions are respectively formed on the light receiving surface and the rear surface, and the second electrode composition is filled into the groove. After performing a high temperature process to co-firing the silicon substrate and the first and second electrode compositions, a first electrode and a second electrode are respectively formed on the light receiving surface and the rear surface. | 10-30-2014 |
Patent application number | Description | Published |
20080280448 | METHOD FOR MANUFACTURING GATE OXIDE LAYER WITH DIFFERENT THICKNESSES - A method of manufacturing gate oxide layers with different thicknesses is disclosed. The method includes that a substrate is provided first. The substrate has a high voltage device region and a low voltage device region. Then, a high voltage gate oxide layer is formed on the substrate. Afterwards, a first wet etching process is performed to remove a portion of the high voltage gate oxide layer in the low voltage device region. Then, a second wet etching process is performed to remove the remaining high voltage gate oxide layer in the low voltage device region. The etching rate of the second wet etching process is smaller than that of the first wet etching process. Next, a low voltage gate oxide layer is formed on the substrate in the low voltage device region. | 11-13-2008 |
20090108348 | SEMICONDUCTOR DEVICE - A semiconductor device is provided. An isolation structure is formed in a substrate to define a first and a second active region, and a channel active region therebetween. A field implant region is formed below a portion of the isolation structure around the first, second, and channel active regions. A channel active region includes two first sides defining a channel width. The distance from each first side to a second side of a neighboring field implant region is d | 04-30-2009 |
20090224336 | SEMICONDUCTOR DEVICE - A semiconductor device including a plurality of doped regions, a metal layer and a polysilicon layer is provided. The doped regions are disposed in a substrate. The metal layer includes a plurality of metal line patterns. The polysilicon layer disposed between the substrate and the metal layer includes a gate pattern and at least one guard ring pattern. The at least one guard ring pattern connects to the gate pattern and surrounds at least one of the metal line patterns. One of the metal line patterns connects to the gate pattern. The others of the metal line patterns connect to one of the doped regions in the substrate. | 09-10-2009 |
Patent application number | Description | Published |
20110140989 | Dual-Band Antenna Unit - A dual-band antenna unit, comprising: a first radiation unit; a second radiation unit; a first signal feed-in unit electrically connected to the first radiation unit; and a second signal feed-in unit, electrically connected to the second radiation unit; wherein the first radiation unit, the second radiation unit, the first signal feed-in unit and the second signal feed-in unit are disposed in the dual-band antenna unit. Therefore, the number of antennas can be reduced to achieve lower cost while remaining the signal transmission quality. | 06-16-2011 |
20120001820 | WIRELESS COMMUNICATION APPARATUS AND PLANAR ANTENNA THEREOF - A wireless communication apparatus and a planar antenna thereof are provided. The wireless communication apparatus comprises a connecting port, a printed circuit board, and a planar antenna. The printed circuit board is connected to the connecting port, and the planar antenna is formed on the printed circuit board. The planar antenna comprises a radiation portion, a shorting portion, and a feeding portion. The feeding portion is connected to the radiation portion and the shorting portion, and the radiation portion and the shorting portion are in a bent shape so that the radiation portion, the shorting portion and the feeding portion are distributed in a rectangular region. | 01-05-2012 |
20140159985 | CURRENT BREAKER AND WIRELESS COMMUNICATION DEVICE HAVING THE SAME - A current breaker comprises a multi-layer printed circuit board (PCB), a ground plane, a metal component and a conductive via hole. The ground plane is disposed in a first metal layer of the multi-layer PCB and comprises a slot forming inductive impedance. The slot comprises an extended portion. The metal component is disposed in a second metal layer of the multi-layer PCB. Capacitive impedance is formed between the metal component and the ground plane. The projection of the metal component on the ground plane and the extended portion of the slot partially overlap. The conductive via hole penetrates the multi-layer PCB to connect metal component with the ground plane. The first and the second metal layers are any two metal layers of the multi-layer PCB. The inductive impedance formed by the slot and the capacitive impedance formed between the metal component and the ground plane create a parallel LC equivalent circuit. | 06-12-2014 |
Patent application number | Description | Published |
20090014787 | Multi-Layer Semiconductor Structure and Manufacturing Method Thereof - A power MOSFET structure comprises at least one first gate in the cell area and at least one second gate at the peripheral that are both in a semiconductor substrate. The first and second gates are electrically connected, and the second gate is connected to a contact so as to electrically connect to a bond pad for transmitting gate control signals. The semiconductor substrate comprises a first semiconductor layer, a second semiconductor layer and a third semiconductor layer in downward sequence. The first and third semiconductor layers are of a first conductive type, e.g., n-type, and the second semiconductor layer is of a second conductive type, e.g., p-type. The first and third semiconductor layers serve as the source and the drain, respectively. | 01-15-2009 |
20090061583 | METHOD FOR PREPARING DYNAMIC RANDOM ACCESS MEMORY STRUCTURE - A method for preparing a dynamic random access memory structure, comprising steps of forming a bottom conductive region in a substrate, removing a predetermined portion of the substrate to form a plurality of pillars having a bottom end lower than a bottom surface of the bottom conductive region, forming a first oxide layer on the substrate and below the bottom conductive region in the pillar, forming a conductive block between two adjacent pillars to electrically connect the two bottom conductive regions in the two adjacent pillars, forming a second oxide layer covering the conductive block, forming a gate oxide layer on a sidewall of the pillar, forming a gate structure on a surface of the gate oxide layer; and forming an upper conductive region on a top portion of the pillar. | 03-05-2009 |
20140369574 | FINGER SENSING STRUCTURE FOR CAPACITIVE FINGERPRINT RECOGNITION IC - A finger sensing structure for a capacitive fingerprint recognition IC is provided here. The structure comprises a finger sensing metal layer with fish bone shape. When fingers approach or touch the surface of the capacitive fingerprint recognition IC, capacitive sense is induced between the fingers and the metal patterned layer to wake up the IC. Before the fingers approach or touch the IC, the IC is hibernated; once the fingers are detected, the IC is woken up. The metal patterned layer can reduce energy consumption of the IC especially for portable fingerprint recognition IC. | 12-18-2014 |
20150071511 | FINGER DETECTION DEVICE AND METHOD OF FINGERPRINT RECOGNITION INTEGRATED CIRCUIT - A finger detection device and method of a fingerprint recognition IC is disclosed. The device comprises sensing electrodes, a capacitive sensing layer, a signal processing circuit, a multiplexer module and a signal register. The sensing electrodes are defined as a fingerprint sensing zone. The capacitive sensing layer covers the sensing electrodes. The signal processing circuit is arranged below and electrically connected with the sensing electrodes. The multiplexer module defines a finger detection zone. The finger detection zone includes at least one of the sensing electrodes. The signal register is electrically connected with the signal processing circuit, receiving a detection signal generated by the finger detection zone and comparing the detection signal with a preset value. The finger detection device uses only a portion of the sensing electrodes to detect a finger approaching/contacting it to determine triggering or sleeping of the fingerprint recognition IC and thus reduces power consumption. | 03-12-2015 |
Patent application number | Description | Published |
20120162831 | ESD PROTECTION CIRCUIT FOR NEGATIVE-POWERED INTEGRATED CIRCUIT - For a negative-powered IC, an ESD protection circuit includes a negative voltage clamping circuit configured to provide a path for discharging ESD transient currents associated with different negative power supplies of the IC. | 06-28-2012 |
20120162832 | ESD PROTECTION CIRCUIT FOR MULTI-POWERED INTEGRATED CIRCUIT - For a multi-powered IC, an ESD protection circuit includes multiple voltage clamping circuits, each configured to provide a path for discharging an ESD transient current associated with a corresponding power supply. | 06-28-2012 |
20120182654 | ESD PROTECTION CIRCUIT - ESD protection circuit is provided, which includes a detection circuit, a trigger circuit and a clamp circuit. The detection circuit includes two stacked capacitors reflecting occurrence of ESD events. The trigger circuit includes three stacked transistors controlling triggering of the clamp circuit according to operation of the detection circuit. The clamp circuit includes two stacked transistors conducting ESD path when triggered. | 07-19-2012 |
20120223759 | RECEIVER CIRCUIT - A receiver circuit is provided which receives an external signal of high voltage and provides a corresponding internal signal of low voltage. The receiver circuit includes a voltage limiter, a level down shifter and an inverter of low operation voltage. The level down shifter has a front node and a back node, and includes a transistor with a gate and a source respectively coupled to the voltage limiter and the inverter at the front node and the back node. The voltage limiter limits level of the external signal transmitted to the front node, the level down shifter shifts down a signal of the front node by a cross voltage to generate a signal of the back node, and the inverter inverts the signal of the back node to generate the internal signal. | 09-06-2012 |
20120223767 | TWO-STAGE POST DRIVER CIRCUIT - A two-stage post driver circuit includes a controlling circuit, a pull-up unit and a pull-down unit. A first N-type transistor of the pull-down unit and a first P-type transistor of the pull-up unit are both connected to an output pad. The controlling circuit is used for controlling the first N-type transistor and the first P-type transistor. Consequently, when the pull-up unit or the pull-down unit is turned on, the voltage difference between the drain terminal and the source terminal of the first N-type transistor or the first P-type transistor is lower than a voltage stress. | 09-06-2012 |
20140103965 | TWO-STAGE POST DRIVER CIRCUIT - A two-stage post driver circuit includes a controlling circuit, a pull-up unit and a pull-down unit. A first N-type transistor of the pull-down unit and a first P-type transistor of the pull-up unit are both connected to an output pad. The controlling circuit is used for controlling the first N-type transistor and the first P-type transistor. Consequently, when the pull-up unit or the pull-down unit is turned on, the voltage difference between the drain terminal and the source terminal of the first N-type transistor or the first P-type transistor is lower than a voltage stress. | 04-17-2014 |
20140103966 | METHOD OF CONTROLLING TWO-STAGE POST DRIVER CIRCUIT - A two-stage post driver circuit includes a controlling circuit, a pull-up unit and a pull-down unit. A first N-type transistor of the pull-down unit and a first P-type transistor of the pull-up unit are both connected to an output pad. The controlling circuit is used for controlling the first N-type transistor and the first P-type transistor. Consequently, when the pull-up unit or the pull-down unit is turned on, the voltage difference between the drain terminal and the source terminal of the first N-type transistor or the first P-type transistor is lower than a voltage stress. | 04-17-2014 |
Patent application number | Description | Published |
20120256302 | METHOD FOR PRODUCING A THIN FILM TRANSISTOR AND A DEVICE OF THE SAME - A method for producing a thin film transistor and including the following steps for preparing a glass substrate; having a positive photosensitive coating on the glass substrate; providing a transparent mold plate, having a plurality of ladder opaque protrusions in accordance with a predetermined pattern having different depth; controlling the transparent mold plate downwardly to press into the positive photosensitive coating and non-contacting to the glass substrate; exposing a part of the positive photosensitive coating via an explosion by a UV light; remaining the other part of the positive photosensitive coating, which is shielded by the protrusions and shaped corresponding to the predetermined pattern; separating the transparent mold plate from the glass substrate, and removing the other parts of the photosensitive coating unshielded via a chemical solvent. Thereby, after the positive photosensitive coating is pressed, cured, and cleaned the thin film transistor is formed. | 10-11-2012 |
20130201611 | MOUNTING SYSTEMS FOR DISPLAY DEVICES - Display apparatuses and mounting devices are disclosed. The display apparatuses may include a display panel for displaying visual information and a mounting device coupled with the display panel and movably coupled with a supporting base. The mounting device may comprise a panel-mount interface coupled with the display panel and a receiving device capable of being configured to be at least partially embedded into the supporting base. The panel-mount interface may be coupled with the receiving device through a coupling device comprising a joining piece and at least one of a plurality of receiving holes or at least one sliding groove. The joining piece may be movable among the plurality of the receiving holes or within the at least one sliding groove. | 08-08-2013 |
20140349091 | THIN-FILM DEVICE - A thin-film device may include a carrier, a release layer, a stacking structure, and a flexible substrate. The release layer may be overlaid on the carrier, and the stacking structure is overlaid on the release layer. The stacking structure may include a first protective layer and a second protective layer, wherein the refractive index of the first protective layer exceeds that of the second protective layer. The flexible substrate may be overlaid on the release layer. | 11-27-2014 |
Patent application number | Description | Published |
20090213980 | MULTI-MODULUS DIVIDER WITH EXTENDED AND CONTINUOUS DIVISION RANGE - A multi-modulus divider and a method for performing frequency dividing by utilizing a multi-modulus divider are disclosed. The multi-modulus divider comprises a multi-modulus dividing circuit, a pulse generating circuit, and a modulus signal generating circuit. The multi-modulus dividing circuit comprises several serially connected divider cells, of which a predetermined one may be bypassed. The multi-modulus dividing circuit generates an output frequency according to an input frequency and a divisor. A range of the divisor comprises a plurality of numerical intervals. The pulse generating circuit generates a pulse signal. The modulus signal generating circuit generates a determination result by determining which numerical interval the divisor belongs to, and inputs, according to the determination result, the pulse signal into the predetermined divider cell to be one of references which the predetermined divider cell refers to when outputting a modulus signal. The predetermined divider cell corresponds to the determination result. | 08-27-2009 |
20140029690 | LOCAL OSCILLATION GENERATOR AND ASSOCIATED COMMUNICATION SYSTEM AND METHOD FOR LOCAL OSCILLATION GENERATION - A local oscillation generator includes an oscillation circuit, a frequency multiplication circuit, a mixer, and a frequency divider. The oscillation circuit provides a fundamental oscillation signal. The frequency multiplication circuit provides a first oscillation signal according to the fundamental oscillation signal. The mixer provides a mixed oscillation signal according to mixing of the fundamental oscillation signal and the first oscillation signal. The frequency divider frequency divides the mixed oscillation signal so that the local oscillation generator accordingly provides a local oscillation signal. | 01-30-2014 |
20140184282 | FREQUENCY MULTIPLIER AND SIGNAL FREQUENCY-MULTIPLYING METHOD - A frequency multiplier includes a first impedance module, a second impedance module, a first path and a second path. When the first path is conducted, the first impedance module generates a first output signal and the second impedance module generates a second output signal. When the second path is conducted, the first impedance module generates a third output signal and the second impedance module generates a fourth output signal. The first and second paths are not conducted simultaneously. A frequency of a first combination signal generated from the first and third output signals and a frequency of a second combination signal generated from the second and fourth output signals are N times of a frequency of the input signal, where N is a positive rational number. | 07-03-2014 |
Patent application number | Description | Published |
20110159316 | MAGNETORESISTIVE DEVICE WITH PERPENDICULAR MAGNETIZATION - A magnetoresistive device with perpendicular magnetization includes a magnetic reference layer, a first magnetic multi-layer film, a tunneling barrier layer, a second magnetic multi-layer film, and a magnetic free layer. The magnetic reference layer has a first magnetization direction, perpendicular to the magnetic reference layer. The first magnetic multi-layer film, having non-magnetic material layer, is disposed in contact on the magnetic reference layer. The tunneling barrier layer is disposed in contact on the first magnetic multi-layer film. The second magnetic multi-layer film, having non-magnetic material layer, is disposed in contact on the tunneling barrier layer. The magnetic free layer is disposed in contact on the second magnetic multi-layer film, having a second magnetization direction capable of being switched to be parallel or anti-parallel to the first magnetization direction. | 06-30-2011 |
20110241139 | MAGNETIC RANDOM ACCESS MEMORY - A magnetic random access memory (MRAM) has a perpendicular magnetization direction. The MRAM includes a first magnetic layer, a second magnetic layer, a first polarization enhancement layer, a second polarization enhancement layer, a barrier layer, a spacer, and a free assisting layer. A pinned layer formed by the first magnetic layer and the first polarization enhancement layer has a first magnetization direction and a first perpendicular magnetic anisotropy. A free layer formed by the second magnetic layer and the second polarization enhancement layer has a second magnetization direction and a second perpendicular magnetic anisotropy. The barrier layer is disposed between the first polarization enhancement layer and the second polarization enhancement layer. The spacer is disposed on the second magnetic layer. The free assisting layer is disposed on the spacer and has an in-plane magnetic anisotropy. The spacer and the barrier layer are on opposite sides of the free layer. | 10-06-2011 |
20130168788 | TUNNELING MAGNETO-RESISTOR REFERENCE UNIT AND MAGNETIC FIELD SENSING CIRCUIT USING THE SAME - A tunneling magneto-resistor reference unit for sensing a magnetic field includes a first MTJ (magnetic tunneling junction) device and a second MTJ device connected in parallel. The first MTJ device has a first pinned layer having a first pinned magnetization at a pinned direction, and a first free layer having a first free magnetization parallel to the pinned direction in a zero magnetic field. The second MTJ device has a second pinned layer having a second pinned magnetization at the pinned direction, and a second free layer having a second free magnetization anti-parallel to the pinned direction in a zero magnetic field. Major axes of the first and second MTJ devices have an angle of 45 degrees to a direction of an external magnetic field when sensed. | 07-04-2013 |
20130207209 | TOP-PINNED MAGNETIC TUNNEL JUNCTION DEVICE WITH PERPENDICULAR MAGNETIZATION - A top-pinned magnetic tunnel junction device with perpendicular magnetization, including a bottom electrode, a non-ferromagnetic spacer, a free layer, a tunneling barrier, a synthetic antiferromagnetic reference layer and a top electrode, is provided. The non-ferromagnetic spacer is located on the bottom electrode. The free layer is located on the non-ferromagnetic spacer. The tunnel insulator is located on the free layer. The synthetic antiferromagnetic reference layer is located on the tunneling barrier. The synthetic antiferromagnetic reference layer includes a top reference layer located on the tunneling barrier, a middle reference layer located on the bottom reference layer and a bottom reference layer located on the tunneling barrier. The magnetization of the top reference layer is larger than that of the bottom reference layer. The top electrode is located on the synthetic antiferromagnetic reference layer. | 08-15-2013 |
20140145277 | MAGNETIC DEVICE - A magnetic device includes a substrate, a sensing block and a repair layer. The substrate has a registration layer and a barrier layer disposed on the registration layer. The sensing block is patterned to distribute on the barrier layer. The repair layer is disposed substantially on the barrier layer, wherein the barrier layer is configured to have a tunneling effect when a bias voltage exists between the sensing block and the registration layer. | 05-29-2014 |
20140361391 | MAGNETIC TUNNEL JUNCTION DEVICE WITH PERPENDICULAR MAGNETIZATION AND METHOD OF FABRICATING THE SAME - A magnetic tunnel junction device with perpendicular magnetization including a reference layer, a tunneling dielectric layer, a free layer and a capping layer is provided. The tunneling dielectric layer covers on the reference layer. The free layer covers on the tunneling dielectric layer. The capping layer is consisted of magnesium, aluminum and oxygen, and disposed on the free layer. | 12-11-2014 |
20150076634 | MAGNETIC DEVICE WITH A SUBSTRATE, A SENSING BLOCK AND A REPAIR LAYER - A magnetic device includes a substrate, a sensing block and a repair layer. The substrate has a bottom electrode, a registration layer and a barrier layer disposed on the registration layer. The sensing block is patterned to distribute on the barrier layer. The repair layer is disposed substantially on the barrier layer, wherein the barrier layer is configured to have a tunneling effect when a bias voltage exists between the sensing block and the registration layer. | 03-19-2015 |
Patent application number | Description | Published |
20090191794 | POLISHING METHOD, POLISHING PAD, AND POLISHING SYSTEM - A polishing method, a polishing pad, and a polishing system are described. The polishing pad with a plurality of grooves is provided. The width of each groove is W and the pitch between two adjacent grooves is P. An oscillatory movement distance of a workpiece on the polishing pad is set. The oscillatory movement distance enables any particular point on the workpiece to cross the same number of grooves, when a direction between the particular point and the center of the workpiece is perpendicular to a tangential direction of the grooves. The workpiece is then polished with the oscillatory movement distance, so as to achieve a better polishing uniformity for the surface of the workpiece. | 07-30-2009 |
20100009601 | POLISHING PAD, POLISHING METHOD AND METHOD OF FORMING POLISHING PAD - A polishing pad, a polishing method and a method of forming a polishing pad are provided. The polishing pad includes a polishing layer and a plurality of arc grooves. The arc grooves are disposed in the polishing layer. Each of the arc grooves has two ends, and at least one end thereof has an inclined wall. The angle between the inclined wall of each groove and the surface plane of the polishing layer is less than 90 degree. | 01-14-2010 |
20110014853 | POLISHING METHOD, POLISHING PAD AND POLISHING SYSTEM - A polishing method, a polishing pad and a polishing system are provided. In the invention, the polishing pad is used to polish a polishing article. The polishing pad includes a polishing layer and a surface pattern disposed in the polishing layer. The polishing layer includes a polishing surface, a rotating central region, and a peripheral region. The surface pattern includes many grooves distributed from near the rotating central region and extending outward to near the peripheral region. The grooves include many groove cross sections along a circumferential direction of a same radius. Each of the groove cross sections has a left sidewall and a right sidewall. An included angle is formed by the polishing surface and one of a group of the left sidewalls and a group of the right sidewalls. The included angle is an obtuse angle. | 01-20-2011 |
20120244785 | POLISHING METHOD AND POLISHING SYSTEM - A polishing method and a polishing system are provided. By means of adjusting a rotational center of a polishing article corresponding to positions of a polishing pad or polishing pads, a polishing rate of the polishing article surface has a better uniformity, resulted from compensation of polishing rates at the rotational center of the polishing article. | 09-27-2012 |
20130017766 | POLISHING PAD, POLISHING METHOD AND POLISHING SYSTEMAANM Wang; Yu-PiaoAACI Hsinchu CountyAACO TWAAGP Wang; Yu-Piao Hsinchu County TW - A polishing pad used in conjunction with a carrier ring to polish a substrate and has a motion direction when polishing is provided. The carrier ring has at least one carrier groove, and the substrate has a substrate radius. The polishing pad has a polishing layer and a surface pattern. The surface pattern has traversing grooves, and an angle between the tangent line of each traversing groove and the tangent line of the motion direction is not equal to 0 degree. Each traversing groove respectively has a traversing groove trajectory corresponding to the motion direction, and the traversing groove trajectory of the traversing groove has a trajectory width smaller than the substrate radius. At leading region of the carrier ring corresponding to the motion direction, the traversing grooves have at least one carrier compatible groove which aligns with the at least one carrier groove of the carrier ring. | 01-17-2013 |