Patent application number | Description | Published |
20090187807 | METHOD FOR OPTIMIZING BLOCK CODING PARAMETERS, A COMMUNICATIONS CONTROLLER EMPLOYING THE METHOD AND A COMMUNICATIONS NODE AND LINK EMPLOYING THE CONTROLLER - A method of determining optimal FEC configuration parameters, a communications controller, a communications link and a communications node is disclosed. In one embodiment, the communications controller, includes: (1) a processor, (2) a communications system information collector configured to receive operational information from a communications system having a block encoder, a block decoder and a decision feedback equalizer, (3) a code determiner configured to employ the operational information to select, from a set of candidate codes, a random error correction code or a burst error correction code that has a least error correction capability and satisfies a target performance specification for the communications system and (4) a parameter selector configured to select configuration parameters associated with the selected random error correction code or the selected burst error correction code and send the selected configuration parameters to the block encoder and the block decoder. | 07-23-2009 |
20090238318 | MECHANISM FOR CONSTRUCTING AN OVERSAMPLED WAVEFORM FOR A SET OF SIGNALS RECEIVED BY A RECEIVER - A mechanism is provided for constructing an oversampled waveform for a set of incoming signals received by a receiver. In one implementation, the oversampled waveform is constructed by way of cooperation between the receiver and a waveform construction mechanism (WCM). The receiver receives the incoming signals, samples a subset of the incoming signals at a time, stores the subsets of sample values into a set of registers, and subsequently provides the subsets of sample values to the WCM. The WCM in turn sorts through the subsets of sample values, organizes them into proper orders, and “stitches” them together to construct the oversampled waveform for the set of incoming signals. With proper cooperation between the receiver and the WCM, and with proper processing logic on the WCM, it is possible to construct the oversampled waveform for the incoming signals without requiring large amounts of resources on the receiver. | 09-24-2009 |
20090316727 | Real-Time Optimization of TX FIR Filter for High-Speed Data Communication - A feedback module is defined to receive as input a set of data sample signals and a set of reference sample signals. Each of the data and reference sample signals is generated by sampling a differential signal having been transmitted through a FIR filter. The feedback module is defined to operate a respective post cursor counter for each post cursor of the FIR filter and update the post cursor counters based on the received sets of data and reference sample signals. Also, the feedback module is defined to generate a tap weight adjustment signal for a given tap weight of the FIR filter when a magnitude of a post cursor counter corresponding to the given tap weight is greater than or equal to a threshold value. An adaptation module is defined to adapt a reference voltage used to generate the reference sample signals to a condition of the differential signal. | 12-24-2009 |
20110261900 | MECHANISM FOR CONSTRUCTING AN OVERSAMPLED WAVEFORM FOR A SET OF SIGNALS RECEIVED BY A RECEIVER - A mechanism is provided for constructing an oversampled waveform for a set of incoming signals received by a receiver. In one implementation, the oversampled waveform is constructed by way of cooperation between the receiver and a waveform construction mechanism (WCM). The receiver receives the incoming signals, samples a subset of the incoming signals at a time, stores the subsets of sample values into a set of registers, and subsequently provides the subsets of sample values to the WCM. The WCM in turn sorts through the subsets of sample values, organizes them into proper orders, and “stitches” them together to construct the oversampled waveform for the set of incoming signals. With proper cooperation between the receiver and the WCM, and with proper processing logic on the WCM, it is possible to construct the oversampled waveform for the incoming signals without requiring large amounts of resources on the receiver. | 10-27-2011 |
20120068890 | HIGH SPEED DIGITAL INTERCONNECT AND METHOD - In some developing interconnect technologies, such as chip-to-chip optical interconnect or metal waveguide interconnects, misalignment can be a serious issue. Here, however, a interconnect that uses an on-chip directional antenna (which operates in the sub-millimeter range) to form a radio frequency (RF) interconnect through a dielectric waveguide is provided. This system allows for misalignment while providing the increased communication bandwidth. | 03-22-2012 |
20120068891 | CHIP TO DIELECTRIC WAVEGUIDE INTERFACE FOR SUB-MILLIMETER WAVE COMMUNICATIONS LINK - In some developing interconnect technologies, such as chip-to-chip optical interconnect or metal waveguide interconnects, misalignment can be a serious issue. Here, however, a interconnect that uses an on-chip directional antenna (which operates in the sub-millimeter range) to form a radio frequency (RF) interconnect through a dielectric waveguide is provided. This system allows for misalignment while providing the increased communication bandwidth. | 03-22-2012 |
20130058329 | WIRELESS ROUTER SYSTEM - Conventional routers employ a wired backplane that employs “long reach” serializer/deserializer (SerDes) links, but this type of architecture is complicated, costly, and uses a considerable amount of power. To address some of these issues, a new wireless backplane architecture is provided here. This wireless backplane employs direct millimeter wave links between line cards that replaces the convention, wired switching fabric. | 03-07-2013 |
20130058330 | WIRELESS BRIDGE IC - Conventional routers employ a wired backplane that employs “long reach” serializer/deserializer (SerDes) links, but this type of architecture is complicated, costly, and uses a considerable amount of power. To address some of these issues, a new wireless backplane architecture is provided here. This wireless backplane employs direct millimeter wave links between line cards that replaces the convention, wired switching fabric. | 03-07-2013 |
20130101000 | METHOD AND APPARATUS FOR PERFORMING SPECULATIVE DECISION FEEDBACK EQUALIZATION - A method for equalizing a received signal is provided. The signal is filtered and transmitted over a channel using an encoding scheme, where the encoding scheme has transmit symbols. This transmitted signal is then shaped such that the filtering and equalization adjust a set of taps in an equalization window so that the taps from the set are substantially equal to one another. Inter-symbol interference is then compensated for in the equalized signal using a speculative DFE with significantly reduced comparator levels. | 04-25-2013 |
20130106641 | CARRIER FREQUENCY OFFSET COMPENSATION IN BEAMFORMING SYSTEMS | 05-02-2013 |
20130300627 | TERMINATIONLESS POWER SPLITTER/COMBINER - An apparatus is provided. First and second hybrid couplers are provided with each having a first port, a second port, a third port, a fourth port and with each being substantially curvilinear. The fourth ports of the first and second hybrid couplers are first and second isolation port that are mutually coupled. The first port of the first hybrid coupler is configured to carry a first portion of a differential signal, and the first port of the second hybrid coupler is configured to carry a second portion of the differential signal. | 11-14-2013 |
20140072024 | CARRIER RECOVERY IN AMPLITUDE AND PHASE MODULATED SYSTEMS - A method is provided. A multi-amplitude signal is received and downconverted so as to generate I and Q signals using a local oscillator signal. The I and Q signals are equalized, and the equalized I and Q signals are digitized. First and second gains are adjusted with the second and first digital signals, respectively, and applied to the equalized I and Q signals, respectively. The difference between the first and second amplified signals is determined, and an error signal is generated from the difference between the first and second amplified signals. The local oscillator signal is then adjusted with the error signal. | 03-13-2014 |
20140139297 | BALUN WITH INTEGRATED DECOUPLING AS GROUND SHIELD - An apparatus is provided. Transmission line cells are formed in a first region. A first metallization layer is formed over the transmission line cells within a portion of the first region. At least a portion of the first metallization layer is electrically coupled to the plurality of transmission line cells. A second metallization layer is formed over the first metallization layer with an interconnect portion, and overlay portion, and a first balun. The interconnect portion at least partially extends into the first region, and the overlay portion is within the first region. The first balun winding is electrically coupled to the overlay portion and partially extends into a second region. The first region partially surrounds the second region. A third metallization layer is formed over the second metallization layer having a second balun winding within the second region, where the second winding is generally coaxial with the first balun winding. | 05-22-2014 |
20140140380 | INITIALIZATION SEQUENCE FOR BI-DIRECTIONAL COMMUNICATIONS IN A CARRIER-BASED SYSTEM - A method is provided. An initial bit sequence is received by a receiver. A local oscillator is locked initially to a local reference and subsequently to the received signal using the initial bit sequence, and automatic gain control (AGC) is performed once the local oscillator is locked to the local reference. A Costas loop is then activated so as to achieve carrier frequency offset (CFO) lock, and sign inversion is detected. The receiver then synchronized with an end-of-training pattern. | 05-22-2014 |
20140198550 | FREQUENCY MULTIPLIER - An apparatus is provided. A differential pair of transistors is configured to receive a first differential signal having a first frequency, and a transformer, having a primary side and a secondary side is provided. The primary side of the transformer is coupled to the differential pair of transistors, and the secondary side of the transformer is configured to output a second differential signal having a second frequency, where the second frequency is greater than the first frequency. A first transistor is coupled to the first supply rail, the primary side of the transformer, and the differential pair of transistors, where the first transistor is of a first conduction type. A second transistor is coupled to the second supply rail, the primary side of the transformer, and the differential pair of transistors, where the second transistor is of a second conduction type. | 07-17-2014 |
20150091642 | METHOD AND CIRCUITRY FOR MULTI-STAGE AMPLIFICATION - In an amplifier, a first stage receives a differential input voltage, which is formed by first and second input voltages, and outputs a first differential current in response thereto on first and second lines having respective first and second line voltages. A second stage receives the first and second line voltages and outputs a second differential current in response thereto on third and fourth lines having respective third and fourth line voltages. A transformer includes first and second coils. A first terminal of the first coil is coupled through a first resistor to the first line. A second terminal of the first coil is coupled through a second resistor to the second line. A first terminal of the second coil is coupled through a third resistor to the third line. A second terminal of the second coil is coupled through a fourth resistor to the fourth line. | 04-02-2015 |