Patent application number | Description | Published |
20080293203 | Semiconductor device having a fin structure and method of manufacturing the same - A semiconductor device may include a fin structure having source/drain regions and channel fins connected between source/drain patterns. A gate insulation layer may be provided on the channel fins. A gate electrode may include lower gate patterns and an upper gate pattern. The lower gate patterns may extend in a vertical direction and contact the gate insulation layer. The upper gate pattern may extend in a second horizontal direction substantially perpendicular to the first horizontal direction. The upper gate pattern may be connected to upper portions of the lower gate patterns. | 11-27-2008 |
20080303085 | SEMICONDUCTOR DEVICE INCLUDING ACTIVE PATTERN WITH CHANNEL RECESS, AND METHOD OF FABRICATING THE SAME - A semiconductor device including an active pattern having a channel recess portion, and a method of fabricating the same, are disclosed. In one embodiment, the semiconductor device includes an active pattern including first active regions and a second active region interposed between the first active regions. The active pattern protrudes above a surface of a semiconductor substrate and includes a channel recess portion above the second active region and between the first active regions. A device isolation layer surrounds the active pattern and has a groove exposing side walls of the recessed second active region. A distance between opposing side walls of the first active regions exposed by the channel recess portion is greater than a distance between side walls of the groove. A gate pattern is located in the channel recess portion and extends along the groove. | 12-11-2008 |
20080315282 | Semiconductor Devices Including Transistors Having Three Dimensional Channels - Semiconductor devices including a gate electrode crossing over a semiconductor fin on a semiconductor substrate are provided. A gate insulating layer is provided between the gate electrode and the semiconductor fin. A channel region having a three-dimensional structure defined at the semiconductor fin under the gate electrode is also provided. Doped region is provided in the semiconductor fin at either side of the gate electrode and an interlayer insulating layer is provided on a surface of the semiconductor substrate. A connector region is coupled to the doped region and provided in an opening, which penetrates the interlayer insulating layer. A recess region is provided in the doped region and is coupled to the connector region. The connector region contacts an inner surface of the recess region. Related methods of fabricating semiconductor devices are also provided herein. | 12-25-2008 |
20090170271 | TRANSISTOR AND METHOD OF FORMING THE SAME - According to some embodiments of the invention, a fin type transistor includes an active structure integrally formed with a silicon substrate. The active structure includes grooves that form blocking regions under source/drain regions. A gate structure is formed to cross the upper face of the active structure and to cover the exposed side surfaces of the lateral portions of the active structure. An effective channel length of a fin type transistor may be sufficiently ensured so that a short channel effect of the transistor may be prevented and the fin type transistor may have a high breakdown voltage. | 07-02-2009 |
20090186471 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE FOR REDUCING THERMAL BURDEN ON IMPURITY REGIONS OF PERIPHERAL CIRCUIT REGION - A method of fabricating a semiconductor device for reducing a thermal burden on impurity regions of a peripheral circuit region includes preparing a substrate including a cell active region in a cell array region and peripheral active regions in a peripheral circuit region. A cell gate pattern and peripheral gate patterns may be formed on the cell active region and the peripheral active regions. First cell impurity regions may be formed in the cell active region. A first insulating layer and a sacrificial insulating layer may be formed to surround the cell gate pattern and the peripheral gate patterns. Cell conductive pads may be formed in the first insulating layer to electrically connect the first cell impurity regions. The sacrificial insulating layer may be removed adjacent to the peripheral gate patterns. First and second peripheral impurity regions may be sequentially formed in the peripheral active regions adjacent to the peripheral gate patterns. | 07-23-2009 |
20090189217 | Semiconductor Memory Devices Including a Vertical Channel Transistor - Semiconductor memory devices include a semiconductor substrate and a plurality of semiconductor material pillars in a spaced relationship on the semiconductor substrate. Respective surrounding gate electrodes surround ones of the pillars. A first source/drain region is in the semiconductor substrate between adjacent ones of the pillars and a second source/drain region is in an upper portion of at least one of the adjacent pillars. A buried bit line is in the first source/drain region and electrically coupled to the first source/drain region and a storage node electrode is on the upper portion of the at least one of the adjacent pillars and electrically contacting with the second source/drain region. | 07-30-2009 |
20110095350 | VERTICAL TYPE INTEGRATED CIRCUIT DEVICES, MEMORY DEVICES, AND METHODS OF FABRICATING THE SAME - A vertical type integrated circuit device includes a substrate and a pillar vertically protruding from the substrate. The pillar includes a lower impurity region and an upper impurity region therein and a vertical channel region therebetween. A portion of the pillar including the lower impurity region therein includes a mesa laterally extending therefrom. The device further includes a first conductive line extending on a first sidewall of the pillar and electrically contacting the lower impurity region, and a second conductive line extending on a second sidewall of the pillar adjacent the vertical channel region. The second conductive line extends in a direction perpendicular to the first conductive line and is spaced apart from the mesa. Related devices and methods of fabrication are also discussed. | 04-28-2011 |
20110171800 | METHOD OF FORMING SEMICONDUCTOR DEVICES WITH BURIED GATE ELECTRODES AND DEVICES FORMED BY THE SAME - A polycrystalline semiconductor layer is formed on a cell active region and a peripheral active region of a substrate. A buried gate electrode is formed in the substrate in the cell active region at a level below the polycrystalline semiconductor layer after forming the polycrystalline semiconductor layer. A gate electrode is formed on the substrate in the peripheral active region from the polysilicon semiconductor layer after forming the buried gate electrode. | 07-14-2011 |
20110210421 | TRENCH-TYPE CAPACITOR, SEMICONDUCTOR DEVICE HAVING THE SAME, AND SEMICONDUCTOR MODULE HAVING THE SEMICONDUCTOR DEVICE - Provided is a trench-type capacitor. To form the capacitor, first and second active regions are disposed in a semiconductor substrate. Node patterns are disposed in the first active region. Each node pattern may have a conductive pattern and an insulating pattern, which are sequentially stacked. Impurity diffusion regions are disposed in the vicinity of the node patterns. Substrate connection patterns in electrical contact with the first and second active regions are disposed. Node connection patterns in electrical contact with the node patterns are disposed in the vicinity of the first and second active regions. In addition, a semiconductor device having the trench-type capacitor and a semiconductor module having the semiconductor device is provided. | 09-01-2011 |
20120017517 | ELECTRICAL DOOR - LOCKING DEVICE - An electrical door-locking device includes screws which are rotatable in a forwards and backwards direction, and are placed in line on one side of a door frame in the direction in which the electrical door main body slides; locking hooks located adjacent to the screws; and a sliding unit equipped with a rotatably-provided locking lever having a latch for latching onto the locking hooks when the electrical door main body is closed and is equipped with a locking-lever-pressing part for pressing the locking lever such that the latch of the locking lever unlatches from the locking hooks, and one end of which is rotatably linked to the screws and the other end of which is linked to the electrical door main body. | 01-26-2012 |
20120139021 | SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME - A semiconductor memory device includes a transistor having a channel region buried in a substrate and source/drain regions formed to provide low contact resistance. A field isolation structure is formed in the substrate to define active structures. The field isolation structure includes a gap-fill pattern, a first material layer surrounding the gap-fill pattern, and a second material layer surrounding at least a portion of the first material layer. Each active structure includes a first active pattern having a top surface located beneath the level of the top surface of the field isolation structure, and a second active pattern disposed on the first active pattern and whose top is located above the level of the top surface of the field isolation structure. | 06-07-2012 |
20120273791 | METHOD OF FORMING SEMICONDUCTOR DEVICES WITH BURIED GATE ELECTRODES AND DEVICES FORMED BY THE SAME - A polycrystalline semiconductor layer is formed on a cell active region and a peripheral active region of a substrate. A buried gate electrode is formed in the substrate in the cell active region at a level below the polycrystalline semiconductor layer after forming the polycrystalline semiconductor layer. A gate electrode is formed on the substrate in the peripheral active region from the polysilicon semiconductor layer after forming the buried gate electrode. | 11-01-2012 |
20140376203 | DISPLAY APPARATUS - A display apparatus according to the embodiment of the present invention includes a display body outputting an image signal; a stand supporting the display body and disposed on an installing surface; and a swivel member disposed in a bottom part of the stand and rotating the stand at a certain angle in a status where the stand is disposed on the installing surface, wherein the swivel member, includes a plurality of rotatable rolling members mounted in the bottom part of the stand, and the plurality of rolling members have the same revolution center. | 12-25-2014 |
20150103163 | APPARATUS, METHOD, AND PROCESSOR FOR MEASURING CHANGE IN DISTANCE BETWEEN A CAMERA AND AN OBJECT - Provided is an apparatus for measuring a distance change, the apparatus including an information acquisition unit, an object determination unit, a feature point determination unit, an optical flow calculator, a matching point determination unit, an object length change calculator that calculates a length change ratio between an object of a first frame image and an object of a second frame image by using a feature point and a matching point, and a distance change calculator that calculates a change from a distance between a camera and the object from when the camera acquires the first frame image and when the camera acquires the second frame image using the calculated length change ratio. | 04-16-2015 |
20150340459 | METHOD OF FORMING PATTERNS OF SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a substrate; forming a plurality of first patterns on the substrate, the plurality of first patterns spaced apart from each other in the first direction and extending in a second direction, each first pattern having two opposite end portions in the second direction, and each first pattern having at least one different end portion location in the second direction from a corresponding end portion location of at least one adjacent first pattern; and using the plurality first patterns to form a plurality of respective conductive lines in a plurality of gaps formed in the substrate, the gaps corresponding to and formed to have the same shapes as the plurality of first patterns when viewed from a plan view. | 11-26-2015 |
20150371685 | Methods of Forming Semiconductor Devices to Include Single Body Interconnection Patterns Using Fine Patterning Techniques, and Semiconductor Device So Formed - A method of forming fine patterns for a semiconductor device includes providing a substrate with a first region and a second region, forming a conductive layer on the substrate, the conductive layer including a plate portion covering the first region and first protruding portions extending from the plate portion in a first direction and covering a portion of the second region, forming first mask patterns on the conductive layer, the first mask patterns extending in the first direction and being spaced apart from each other in a second direction crossing the first direction, forming a second mask pattern on the second region to cover the first protruding portions, and patterning the conductive layer using the first and second mask patterns as an etch mask to form conductive patterns. In plan view, each of the first protruding portions is overlapped with a corresponding one of the first mask patterns. | 12-24-2015 |
Patent application number | Description | Published |
20100125697 | COMPUTING DEVICE HAVING STORAGE, APPARATUS AND METHOD OF MANAGING STORAGE, AND FILE SYSTEM RECORDED RECORDING MEDIUM - A storage management apparatus and a file system for a storage device are provided. The storage management apparatus allocates a portion of storage for writing a file to the storage, including a table storing unit storing an allocation unit table that includes information of a unit of allocation of the storage according to a file extension of a file to be written. A storage management unit manages the storage based on the allocation unit table. | 05-20-2010 |
20100299513 | MEMORY APPARATUS AND METHOD THEREFOR - A memory apparatus and an operation of the memory apparatus which allow quick booting are provided. The memory apparatus includes a volatile memory, a non-volatile memory, and a memory control unit to control input/output of data stored in the volatile memory and the non-volatile memory. The memory control unit restores data, according to a control command input from outside of the memory apparatus, from the non-volatile memory to the volatile memory in an on-demand fashion during booting. | 11-25-2010 |
20120072657 | SYSTEM AND METHOD TO WRITE DATA USING PHASE-CHANGE RAM - A data recording system includes a file system configured to manage block-based input/output of data, a phase-change random access memory (PRAM) configured to write first data among the data in units of sub blocks, and a block abstract layer configured to receive a write command of the first data to a first particular block in the PRAM from the file system and log changed data information to a second particular block in the PRAM in units of sub blocks, and a method to provide the same. | 03-22-2012 |
20120209893 | FILE SYSTEM OPERATING METHOD AND DEVICES USING THE SAME - A method of operating a file system in a host configured to store write data in a data storage device including a first region and a second region is disclosed, and includes; receiving a write data request for write data associated with a file, classifying the write data as hot data or cold data using file meta data for the file, and if the write data is classified as hot data, storing the write data in the first region, and otherwise if the write data is classified as cold data storing the write data in the second region. | 08-16-2012 |
20140095458 | STORAGE DEVICE FOR STORING DIRECTORY ENTRIES, DIRECTORY ENTRY LOOKUP APPARATUS AND METHOD, AND STORAGE MEDIUM STORING DIRECTORY ENTRY LOOKUP PROGRAM - A storage device, a directory entry lookup method for the storage device, and a host running the method can provide a quick directory entry lookup. The host includes an interface for exchanging data with the storage device which stores a multi-level hash table comprising directory entries of each directory, and a file system module receiving a file lookup command designating a target directory and a target filename, calculating a hash value which reflects the target filename and a lookup level, and searching for a directory entry which comprises the target filename in a bucket corresponding to the hash value from among buckets at the lookup level which are included in a multi-level hash table of the target directory. If the search for the directory entry fails, the file system module increases the lookup level and again calculates the hash value and searches for the directory entry for the target filename. | 04-03-2014 |
20140095556 | COMPUTING SYSTEM, HOST SYSTEM AND METHOD FOR MANAGING DATA - A computing system includes a storage device in which file data is stored through data blocks and metadata is stored through a node block, and a file system configured to manage the file data and the metadata stored in the storage device. The node block includes data pointers respectively pointing to the data blocks, and one or more extents each indicative of data block groups which include data blocks having continuous physical addresses among the data blocks | 04-03-2014 |
Patent application number | Description | Published |
20120311241 | SCHEDULER FOR MEMORY - A scheduler controls execution in a memory of operation requests received in an input request set (IRS) by providing a corresponding output request set (ORS). The scheduler includes zone standby units having a one-to-one relationship with corresponding zones such that each zone standby unit stores an operation request. The scheduler also includes an output processing unit that determines a processing sequence for the operation requests stored in the zone standby units to provide the ORS. | 12-06-2012 |
20130080686 | DATA MANAGEMENT METHOD FOR NONVOLATILE MEMORY - A method of managing data in a system comprising a nonvolatile memory comprises storing a root object of application data, and at least one sub object referenced by the root object in the nonvolatile memory, and mapping virtual addresses of the root object and sub object to physical addresses of the nonvolatile memory respectively, in a page unit. The root object stored in the nonvolatile memory comprises a pointer that references the sub object stored in the nonvolatile memory. | 03-28-2013 |
20130208537 | MEMORY DEVICE USING FLAG CELLS AND SYSTEM USING THE MEMORY DEVICE - A memory device may include a normal cell which is configured to be programmed to a first resistance and stabilized as a resistance of the normal cell drifts from the first resistance to a second resistance; a flag cell which is configured to be programmed to a third resistance smaller than the first resistance and stabilized as a resistance of the flag cell drifts from the third resistance to a fourth resistance smaller than the second resistance; and a decision circuit which is configured to decide whether the flag cell has been stabilized in order to determine whether the normal cell has been stabilized. | 08-15-2013 |
20140095437 | COMPUTING SYSTEM AND RELATED DATA MANAGEMENT METHOD THEREOF - A method of performing data management in a computing system comprises performing a checkpointing operation comprising storing checkpoint of the computing system, writing a plurality of nodes in a plurality of node blocks in a sequential write method after the checkpointing operation, each of the plurality of nodes comprising position information of a next node block, and during a subsequent recovery operation, selecting a node for recovery by scanning of the plurality of node blocks using the position information. | 04-03-2014 |
20140095552 | COMPUTING SYSTEM AND DATA MANAGEMENT METHOD THEREOF - A data management method of a computing system includes dividing a storage device into a first area and a second area, storing data and nodes related to the data in the second area, and storing a node address table in the first area. The node address table includes node identifiers corresponding to the nodes and physical addresses corresponding to the node identifiers. | 04-03-2014 |
20140095555 | FILE MANAGEMENT DEVICE AND METHOD FOR STORAGE SYSTEM - A file management device for a storage system includes a virtual file system (VFS) having a read-ahead (RA) management unit that stores RA management information and generates a first read request, and a file system that receives first read data in response to the first read request and second read data in response to a previously received read request, compares the first and second read data to generate varying information related to the RA management information, and provides the varying information to the VFS, wherein the VFS updates the RA management information in response to the varying information. | 04-03-2014 |
20140095558 | COMPUTING SYSTEM AND METHOD OF MANAGING DATA THEREOF - A computing system includes a virtual file system and a file system. The virtual file system is configured to provide a first data request to read first file data. The file system is configured to receive the first data request, to read first metadata and second metadata from a storage device in response to the first data request, and then to read first file data corresponding to the first metadata and second file data corresponding to the second metadata from the storage device. | 04-03-2014 |
20140095771 | HOST DEVICE, COMPUTING SYSTEM AND METHOD FOR FLUSHING A CACHE - A computing system includes a storage device, and a host device configured to flush a plurality of pages to the storage device. The host device includes a write-back (WB) cache configured to store the pages, and a file system module configured to flush pages having first characteristics to the storage device from among the pages stored in the WB cache, and then flush pages having second characteristics which are different from the first characteristics to the storage device from among the pages stored in the WB cache. | 04-03-2014 |
20140095772 | COMPUTING SYSTEM AND METHOD OF MANAGING DATA IN THE COMPUTING SYSTEM - A computing system a storage device and a file system. The storage device includes a storage area having flash memory. The file system is configured to divide the storage area into multiple zones, multiple sections and multiple blocks, and to write a log in each block. The file system includes a block allocation module. The block allocation module is configured to allocate a target block, in which a log is to be written, by a continuous block allocation method according to which a block having a continuous address with a most recently selected block is set as the target block. The block allocation module is further configured to find a free section from the multiple sections when it is not possible to allocate the target block by the continuous block allocation method, and to set a block in the found free section as the target block. | 04-03-2014 |
20140095803 | MEMORY SYSTEM CONFIGURED TO PERFORM SEGMENT CLEANING AND RELATED METHOD OF OPERATION - A host configured to interact with a storage device comprises a write-back (WB) cache configured to write data to the storage device, a cache managing module configured to manage the WB cache, and a file system module configured to determine whether live blocks in victim segments among a plurality of segments stored in the storage device are stored in the WB cache, to read the live blocks from the storage device as a consequence of determining that the live blocks are not stored in the WB cache, to load the read live blocks to the WB cache, and to request the cache managing module to set dirty flags for the stored live blocks. | 04-03-2014 |
20150074360 | SCHEDULER FOR MEMORY - A scheduler controls execution in a memory of operation requests received in an input request set (IRS) by providing a corresponding output request set (ORS). The scheduler includes zone standby units having a one-to-one relationship with corresponding zones such that each zone standby unit stores an operation request. The scheduler also includes an output processing unit that determines a processing sequence for the operation requests stored in the zone standby units to provide the ORS. | 03-12-2015 |