Ming Yi
Ming Yi Chang, Taichung City TW
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20090100985 | MUSICAL INSTRUMENT STAND ASSEMBLY WITH FOLDABLE PEDAL - A musical instrument stand assembly with a foldable pedal includes a main stand body, and the main stand body includes a main rod, and the bottom of the main rod includes two support rods each with a recession, and the recession includes a first circular serration; two side frames, and a sidewall of each side frame includes a protrusion and a second circular serration at the protrusion, and each side frame is installed by engaging each protrusion with the recession of each support rod, such that the first and second circular serrations are engaged with each other. With the design of rotably engaging the two side frames and the two support rods, the main stand body of the musical instrument has the function of adjusting its inclination with respect to a vertical position, and the effect of conveniently folding the pedal of the musical instrument. | 04-23-2009 |
20090302177 | Instrument Stand with Variable Supporting Positions - An instrument stand with variable ground contact positions of its supporting pods is disclosed. It has a standing post mounted with two positioning rings. One of them is fixed, and the other can slide relative to the former. The positioning rings have several supporting bases and several connecting elements that fix with the supporting bases after angle adjustment. The supporting pods are locked on the two positioning rings. Each supporting pod is controlled by the relative motion of the two positioning rings to expand and collapse. The ground contact positions of the supporting pods of the invention are thus variable. | 12-10-2009 |
20100276928 | Tube Tightening Structure of Music Instruments - A tube tightening structure of a music instrument is disclosed. A plastic body is provided inside a metal hollow shell. The body has a through hole for the insertion of a tube. The body has an extension part that has a tightening part. A threaded element is connected with a rotating element outside the shell. The rotation of the rotating element displaces the threaded element, so that the tightening part tightly holds the tube in the through hole of the body. | 11-04-2010 |
20110133043 | ANTI-SKID SLEEVE FOR MUSICAL INSTRUMENT STAND - An anti-skid sleeve for a musical instrument stand comprises a body, having a containing portion formed on the top end of the body for insertion of the musical instrument stand and concavely provided on one side face of the body with a receiving portion extending toward the bottom end of the body, and two side walls formed respectively at two opposite sides of the receiving portion; a non-slip stud, having one end pivotally disposed between the two side walls of the receiving portion by a pivot assembly such that the other end of the non-slip stud may be pivotally moved between a first position in the receiving portion and a second position outside the receiving portion, and the pivot assembly able to clamp the two side walls of the receiving portion for fixing the position of the non-slip stud. | 06-09-2011 |
20120155949 | Joint Instrument Support Assembly - A joint instrument support assembly has a rotating elbow with two ear parts. A groove is formed between the two ear parts. One ear part communicates with the groove via a circular hole. Each ear part has a circular wall facing toward the groove. A rotating block is disposed in the rotating elbow. A rod goes through the rotating block. A limiting element locks on the rod and positions in the axle hole to rotate with respect to the rotating block. A sliding block with a through hole and an outer thread part is disposed in an accommodating room. A pad is mounted on the outer thread part and strides across the outer edges of the two circular walls. A fastening element locks onto the outer thread part outside the pad. | 06-21-2012 |
Ming Yi Chiang, New Taipei Hsien TW
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20150227167 | BACK COVER ASSEMBLY OF ELECTRONIC MOBILE DEVICE CAPABLE OF CONTROLLING LIGHT EMISSION EFFECT - A back cover assembly of an electronic mobile device capable of controlling light emission effect comprises a back cover combinable to an electronic mobile device; the back cover including a flash hole positioned to be corresponding to a light emitting device of the electronic mobile device; the flash hole causing light emitting from the electronic mobile device to emit outwards; and at least one light guide strip on a light guide area or on a periphery of the back cover for guiding light to the whole light guide area The light guide strip includes a flash contact section which serves to contact the light emitting from the flashlight from the electronic mobile device. The flash contact section is separable from other portion of the light guide strip. A light control unit serves for controlling separation or combination of the flash contact section with other portion of the light guide strip. | 08-13-2015 |
Ming Yi Huang, Taipei TW
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20120260474 | Side Release Buckle and Lock Member for Same - The lock member includes: a plate-like base portion positioned on a top side of the socket; a holder retaining the base portion to the socket; an operating portion connected to the base portion and movable in a direction intersecting the base portion by an external operation; and a lock portion restricting disengagement of the engaged portions and the engaging portions. The lock portion is positioned in the socket and connected to the operating portion via a joint inserted in the cutout. Without the external operation, the lock portion is present in movement paths where the engaging portions move to be disengaged from the engaged portions. When the operating portion is moved by the external operation, the lock portion is moved away from the movement paths. | 10-18-2012 |
Ming Yi Liao, Miao-Li County TW
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20140185322 | LIGHT GUIDING PLATE, BACKLIGHT MODULE AND DISPLAY DEVICE USING THE SAME - A light guiding plate includes a light guiding main body, a first light guiding unit and a second light guiding unit. The light guiding main body has a first surface, a second surface opposite to the first surface and a light inlet face connecting between the first and second surfaces. The first light guiding unit includes first and second light guiding structures disposed on the first surface. The first and second light guiding structures are parallel aligned, each second light guiding structure has a plurality of first light guiding bodies that is individually separating and connecting the immediately abreast first light structures, and the arrangement density of the plurality of first light guiding bodies decreases toward the light inlet face. The second light guiding unit includes a plurality of third light guiding structures disposed on the second surface. The third light guiding structures are parallel arranged. | 07-03-2014 |
Ming Yi Wang, Chupei City TW
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20090308154 | Fuel Cartridge Structure with Sensor Apparatus - The present invention relates to a fuel cartridge structure with sensor apparatus, comprising a main fuel solution tank provided with a casing with accommodation space, the accommodation space being used for storing the fuel solution; and a sensor apparatus mainly having two sensor components, the two sensor components being disposed on exterior surface or in the structure of the casing of the main fuel solution tank for achieving the objective of measurement. | 12-17-2009 |
Ming Yi Yang, Yunlin County TW
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20110025442 | COMMON MODE FILTER AND METHOD FOR MANUFACTURING THE SAME - A common mode filter comprises an insulating substrate, a lower coil leading layer, a coil main body multilayer, and an upper coil leading layer. The upper coil leading layer comprises at least one upper lead, at least one upper terminal, and at least one upper contact, and the lower coil leading layer comprises at least one lower lead, at least one lower terminal, and at least one lower contact. The two ends of the upper lead are respectively connected to the upper terminal and the upper contact, and the upper lead surrounds the upper contact. The two ends of the lower lead are respectively connected to the lower terminal and the lower contact, and the lower lead surrounds the lower contact. The upper coil leading layer and the lower coil leading layer sandwich the coil main body multi-layer, and the lower coil leading layer is disposed on the insulating substrate. | 02-03-2011 |
Ming Yi Yeh, New Taipei City TW
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20120187078 | MANUFACTURING METHOD OF RIGID AND FLEXIBLE COMPOSITE PRINTED CIRCUIT BOARD - In a manufacturing method of a printed circuit board, a rigid substrate having a rigid-board metal layer is provided, an open slot is formed on the rigid substrate, and a flexible substrate is installed in the open slot, and the flexible substrate and the rigid substrate are securely bonded, and an increased-layer circuit layer is formed after electric circuits are manufactured on the rigid-board and flexible-board metal layers, and stacked on the rigid substrate and on an adjacent block where the flexible substrate is coupled to the rigid substrate, and an electric circuit is manufactured, and the increased-layer circuit layer is provided for electrically connecting and conducting the rigid and flexible substrates to overcome the issue of alignment errors. | 07-26-2012 |
Ming-Yi Chen, Shenzhen City CN
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20130159688 | ELECTRONIC DEVICE AND METHOD OF SETTING REMOVAL POLICY OF USB DEVICE - A method for setting removal policy of a USB device includes: obtaining device information of a USB device connected to a USB port when the electronic device is started up and on a BIOS process; comparing the obtained device information with device information stored in a storage unit to determine whether the obtained device information matches one of the device information stored in the storage unit, thus producing a comparison result; and setting removal policy of the USB device connected to the USB port according to the comparison result. | 06-20-2013 |
20130174250 | ELECTRONIC DEVICE AND METHOD FOR RESTRICTING ACCESS TO THE ELECTRONIC DEVICE UTILIZING BIOS PASSWORD - A method for restricting access to an electronic device using basic input output system (BIOS) password comprises: generating a first window on a display to receive a first user input in response to a password pre-setting input via an input module; formatting the first user input into American Standard Code for Information Interchange (ASCII); and writing the ASCII into a BIOS chip as the preset password. The electronic device is also provided. | 07-04-2013 |
Ming-Yi Chen, Shenzhen CN
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20140208052 | ELECTRONIC DEVICE AND METHOD FOR PROTECTING MEMORY THEREOF - An electronic device includes a memory, an addressing unit, a status determination unit, and a control unit. The memory unit stores a memory status parameter. The addressing unit is configured for addressing an address of the memory status parameter of the memory. The status determination unit is configured for determining a status of the memory according to a value at the addressed address. The status of the memory can be a read-only status or a writable status. The control unit is configured for modifying the value at the address of the memory status parameter to make the memory be in the read-only status when the memory is in the writable status | 07-24-2014 |
20140215117 | ELECTRONIC DEVICE AND METHOD FOR CONTROLLING STATUS OF PCI INTERFACES - An electronic device includes a main board. The main board includes a number of PCI interfaces, an addressing unit, a determination unit, and a control unit. The addressing unit is configured for addressing addresses of each of the PCI interfaces of the main board from an address bus of the electronic device. The determination unit is configured for determining whether any PCI interfaces are not connected to corresponding PCI devices according to a value at the addressed addresses. The control unit is configured to turn off the PCI interfaces that are not connected to corresponding PCI devices. A method for controlling status of the PCI interfaces is also provided. | 07-31-2014 |
Ming-Yi Chu, Hsinchu TW
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20160077960 | ADAPTIVE COMPRESSION DATA STORING METHOD FOR NON-VOLATILE MEMORIES AND SYSTEM USING THE SAME - An adaptive compression data storing method for non-volatile memories and a system using the method are disclosed. The system includes a host interface unit, a data compressor, a padding unit, a buffer, a combining unit, and a mapping table unit. By combining some compressed data in one page, the present invention can settle the problem that space for storing a compressed data that can not be utilized. Further, lifetime of non-volatile memories can be extended. | 03-17-2016 |
Ming-Yi Hsieh, Pingtung TW
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20100171175 | Structure For High Voltage/High Current MOS Circuits - A semiconductor structure for high voltage/high current MOS circuits is provided, including a deep N-well (NMD), a P-well (PW) disposed within NWD, a plurality of field oxide regions (FOX), a plurality of doping regions, including both N+ regions and P+ regions, disposed within NWD and PW, a gate (G) connected to a doping region, a bulk pad (B) connected to a doping regions, a source pad (S) connected to a doping regions and a drain pad (D) connected to a doping region. The top view of the present invention shows that the regions are of non-specific shapes and overlaid in a radial manner, with doping region connected to B being encompassed by doping region connected to S, which in turn encompassed by G, encompassed by FOX, encompassed by doping region connected to D. As long as the regions are overlaid in a manner that one region surrounds another region so that the electric current flows from S towards D in a radiating manner, the geometry and the layout of the semiconductor structure of the present invention can be varied. | 07-08-2010 |
Ming-Yi Huang, Taoyuan Hsien TW
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20140071540 | OPTICAL SPLITTING DEVICE - An optical splitting device includes a body and an optical condensing member. The optical condensing member is disposed on the body, and includes a first light incident surface and a second light incident surface. The second light incident surface is discontinuously adjacent to the first light incident surface. | 03-13-2014 |
20150349893 | OPTICAL TRANSCEIVER - An optical transceiver includes a positioning element, a fiber connecting segment, a base and a housing. The positioning element has a first positioning part. The fiber connecting segment tightly fits to the positioning element. The housing supports at least one optical transceiving element and is connected to the positioning element. The base has a second positioning part and is configured for supporting the positioning element and the fiber connecting segment. The first positioning part and the second positioning part define the position of the fiber connecting segment. | 12-03-2015 |
Ming-Yi Huang, Hsin-Chu TW
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20150214394 | OPTO-ELECTRICAL CONVERSION STRUCTURE - An opto-electrical conversion structure includes a substrate, a first semiconductor structure, and a second semiconductor structure. The substrate has a first surface and a second surface opposite to each other. The first surface has a plurality of micro-structures and a plurality of nano-structures. The nano-structures are distributed on the surface of the micro-structures, and have heights of about 500 nm to about 900 nm. The first semiconductor structure is disposed on the first surface of the substrate. The second semiconductor structure is disposed on the second surface of the substrate. | 07-30-2015 |
Ming-Yi Huang, Taoyuan County TW
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20140294400 | OPTICAL MODULE AND OPTICAL TRANSCEIVER MODULE - An optical module includes a first light-guide element, an optical element, a first optical fiber, and a beam splitter. The first light-guide element includes a first surface and a second surface. The optical element corresponds to the first surface. The first optical fiber is contacted with the second surface. The beam splitter is attached to the first surface, the beam splitter partially reflects and partially transmits a light beam striking thereon. A refractive index of the beam splitter is different from a refractive index of the first light-guide element. | 10-02-2014 |
Ming-Yi Lai, Changhua City TW
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20110226427 | Method of Recovering Aqueous N-methylmorpholine-N-Oxide Solution Used in Production of Lyocell Fiber - A method of recovering an aqueous N-methylmorpholine-N-oxide (NMMO) solution used in production of Lyocell fiber includes: decoloring the aqueous NMMO solution by mixing the same with activated carbon using an agitation blower and by alternately energizing and de-energizing the agitation blower to contact the activated carbon with the aqueous NMMO solution thoroughly in an energy-efficient manner; filtering the aqueous NMMO solution which has been decolored through coarse filtration followed by ultrafiltration to remove the activated carbon and impurities from the aqueous NMMO solution; and concentrating the aqueous NMMO solution which has been filtered using one of a mechanical vapor recompression evaporator and a triple effect evaporator to remove water from the aqueous NMMO solution. | 09-22-2011 |
Ming-Yi Lai, Changhua TW
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20130313750 | Process for Producing an Antistatic Yarn - A process for producing an antistatic yarn includes the steps of: (a) providing antistatic composite filaments having carbon black dispersed therein; (b) advancing the antistatic composite filaments to a first heating zone at a first advancing speed which ranges from 230 m/min to 330 m/min; (c) drawing the antistatic composite filaments from the first heating zone to a false twist zone at a second advancing speed such that a draw ratio of the second advancing speed to the first advancing speed ranges from 1.5 to 1.75, thereby obtaining false twisted filaments; and (d) heat-setting the false twisted filaments so as to obtain a permanent antistatic crimped yarn. | 11-28-2013 |
Ming-Yi Lee, Xin Zhu Shi TW
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20140133736 | SYSTEM AND METHOD FOR DEFECT ANALYSIS OF A SUBSTRATE - The present disclosure provides a method including providing a first image and a second image. The first image is of a substrate having a defect and the second image is of a reference substrate. A difference between the first image and the second image is determined. A simulation model is used to generate a simulation curve corresponding to the difference and the substrate dispositioned based on the simulation curve. In another embodiment, the scan of a substrate is used to generate a statistical process control chart. | 05-15-2014 |
20150146968 | SYSTEM AND METHOD FOR DEFECT ANALYSIS OF A SUBSTRATE - The present disclosure provides a method including providing a first image and a second image. The first image is of a substrate having a defect and the second image is of a reference substrate. A difference between the first image and the second image is determined. A simulation model is used to generate a simulation curve corresponding to the difference and the substrate dispositioned based on the simulation curve. In another embodiment, the scan of a substrate is used to generate a statistical process control chart. | 05-28-2015 |
Ming-Yi Lee, Zhudong Township TW
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20120206953 | MEMORY EDGE CELL - A circuit comprises a first PMOS transistor, a second PMOS transistor, a first NMOS transistor, a second NMOS transistor, a third NMOS transistor, and a fourth NMOS transistor. The PMOS transistors and the NMOS transistors are configured to provide a first voltage reference node having a first reference voltage and a second voltage reference node having a second reference voltage. The first reference voltage and the second reference voltage serve as a first reference voltage and a second reference voltage for a memory cell, respectively. | 08-16-2012 |
20130286708 | MEMORY EDGE CELL - A column of a memory includes a first edge cell and at least one memory cell. The first edge cell is located at a first edge of the column and includes a first edge cell reference node and a second edge cell reference node. Each of the at least one memory cells includes a first memory reference node. The first edge cell reference node is coupled to respective first memory reference nodes of the at least one memory cell. The second edge cell reference node serves as second memory reference nodes of the at least one memory cell. Front-end layers of the first edge cell are the same as front-end layers of a memory cell of the at least one memory cell. | 10-31-2013 |
20140185394 | Memory with Bit Cell Header Transistor - A memory includes a plurality of bit cells. Each bit cell includes a bit line and a storage cell coupled to the bit line. A header PMOS transistor is coupled to the storage cell in each bit cell. The header PMOS transistor is at least partially turned off during a write operation by a header control signal. | 07-03-2014 |
20150357279 | LAYOUT DESIGN FOR MANUFACTURING A MEMORY CELL - A layout design usable for manufacturing a memory cell includes a first and second active area layout pattern associated with forming a first and second active area, an isolation region outside the first and second active area, a first polysilicon layout pattern associated with forming a first polysilicon structure, a second polysilicon layout pattern associated with forming a second polysilicon structure, a first interconnection layout pattern associated with forming a first interconnection structure, and a second interconnection layout pattern associated with forming a second interconnection structure. The first active area does not overlap the second active area. The first polysilicon layout pattern overlaps the first active area layout pattern. The second polysilicon layout pattern overlaps the first active area layout pattern and the second active area layout pattern. The first interconnection layout pattern overlaps the second active area layout pattern. The second interconnection layout pattern overlaps the isolation region. | 12-10-2015 |
Ming-Yi Lee, Taipei City TW
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20080302992 | STOP VALVE WITH FILTER - The interior of the stop valve is partitioned into an upper chamber where the valve mechanism is installed and a lower chamber where a filter is provided. The two chambers are conducted via a through hole of the partition and are connected to two lateral tubular sockets of the stop valve, respectively. The stop valve can further contain a locking mechanism to securely connect a pipe to the stop valve. The locking mechanism mainly contains a tubular element that can be screwed into a tubular socket and a rubber ring washer at the interface between the pipe and a chamber of the stop valve. | 12-11-2008 |
20080303278 | DEVICE FOR PIPE COUPLING - To couple a giving end of a first pipe and an receiving end of a second pipe, the device contains a rubber ring, a tubular screw, a C-shaped ring, and a rubber washer. The C-shaped ring is embedded in a groove of the giving end of the first pipe which is threaded through the rubber ring, the tubular screw and the rubber washer and is plugged into the receiving end of second pipe. Inside the tubular screw, the diameter is gradually shrunk to form a born-shaped space with a slant wall. When the tubular screw is screwed into the receiving end of the second pipe, the slant wall forces the C-shaped ring, and thereby the giving end of the first pipe, to gradually advance. In the mean time, the bottom of the tubular screw presses the rubber washer tightly against the second pipe to effectively prevent leakage. | 12-11-2008 |
20100041900 | Isolation of lactam compound from adlay bran and its use on anti-proliferative cancer cells - The invention relates to the active lactam compounds with inhibitory effect (anti-proliferative effect) on cancer cells, which are isolated from adlay ( | 02-18-2010 |
20120038149 | RELEASABLE NUT-FREE C-CLIP SECURED PIPE FITTING - A releasable nut-free C-clip secured pipe fitting includes a pipe to be jointed, a C-clip, a sealing ring, and a pipe fitting. The pipe has a jointed end forming a circumferential groove for receiving the C-clip. The C-clip is a ring like member having an opening, which allows for expansion and contraction of the C-clip so as to allow the C-clip to be disposed in a converging surface formed on an inside wall of the pipe fitting. The sealing ring is received in a sealing ring groove defined in the inside wall of the pipe fitting. The pipe fitting has a tube end forming a holding bore having an inside diameter smaller than a diameter of the converging surface. The tube end of the pipe fitting forms openings through which a tool can extend into the pipe fitting to contract the C-clip for releasing the C-clip and the pipe. | 02-16-2012 |
Ming-Yi Lin, Hsin-Chu TW
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20140231964 | Multiple Layer Substrate - A substrate for an integrated circuit includes a device wafer having a raw carrier concentration and an epitaxial layer disposed over the device wafer. The epitaxial layer has a first carrier concentration. The first carrier concentration is higher than the raw carrier concentration. | 08-21-2014 |
20140252512 | Methods And Apparatus For MEMS Structure Release - Methods and apparatus for MEMS release are disclosed. A method is described including providing a substrate including at least one MEMS device supported by a sacrificial layer; performing an etch in solution to remove the sacrificial layer from at least one MEMS device; immersing the substrate including the at least one MEMS device in an organic solvent; and while the substrate is immersed in the organic solvent, removing water from the organic solvent until the water remaining in the organic solvent is less than a predetermined threshold. An apparatus is disclosed for performing the methods. Additional alternative methods are disclosed. | 09-11-2014 |
20150308743 | Methods And Apparatus For MEMS Structure Release - An apparatus may include a vessel adapted to contain an organic solvent and a dehydration apparatus coupled with the vessel. The dehydration apparatus may be adapted to remove water from the organic solvent. The apparatus may further include a water content monitor coupled to the dehydration apparatus and the vessel, in which the water content monitor is adapted to determine a water content of the organic solvent. The apparatus may further include a wafer handler adapted to transfer at least one semiconductor wafer including a MEMS device into the vessel. | 10-29-2015 |
20150311070 | Multiple Layer Substrate - A substrate for an integrated circuit includes a device wafer having a raw carrier concentration and an epitaxial layer disposed over the device wafer. The epitaxial layer has a first carrier concentration. The first carrier concentration is higher than the raw carrier concentration. | 10-29-2015 |
Ming-Yi Lin, Hsinchu City TW
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20120289040 | FABRICATION METHODS OF INTEGRATED SEMICONDUCTOR STRUCTURE - An integrated circuit device and method for manufacturing an integrated circuit device is disclosed. The integrated circuit device comprises a core device and an input/output circuit. Each of the core device and input/output circuit includes a PMOS structure and an NMOS structure. Each of the PMOS includes a p-type metallic work function layer over a high-k dielectric layer, and each of the NMOS structure includes an n-type metallic work function layer over a high-k dielectric layer. There is an oxide layer under the high-k dielectric layer in the input/output circuit. | 11-15-2012 |
20140001607 | PASSIVATION SCHEME | 01-02-2014 |
20140008723 | LATERAL INSULATED GATE BIPOLAR TRANSISTOR STRUCTURE WITH LOW PARASITIC BJT GAIN AND STABLE THRESHOLD VOLTAGE - A metal-oxide-semiconductor laterally diffused device (HV LDMOS), particularly a lateral insulated gate bipolar junction transistor (LIGBT), and a method of making it are provided in this disclosure. The device includes a silicon-on-insulator (SOI) substrate having a drift region, two oppositely doped well regions in the drift region, two insulating structures over and embedded in the drift region and second well region, a gate structure, and a source region in the second well region over a third well region embedded in the second well region. The third well region is disposed between the gate structure and the second insulating structure. | 01-09-2014 |
20150054143 | PASSIVATION STRUCTURE AND METHOD OF MAKING THE SAME - A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer. | 02-26-2015 |
20150243552 | SEMICONDUCTOR ARRANGEMENT AND FORMATION THEREOF - A semiconductor arrangement and method of formation are provided. The semiconductor arrangement includes a metal connect over and connected to a first active region, over and connected to a second active region and over a shallow trench isolation (STI) region thereby connecting the first active region to the second active region. A metal contact is over and connected to a gate in the STI region. The metal connect is formed in a first opening and the metal contact is formed in a second opening, where the first opening and the second opening are formed concurrently using a single mask. The semiconductor arrangement formed using a single mask is less expensive to fabricate and requires fewer etching operations than a semiconductor arrangement formed using multiple masks. | 08-27-2015 |
20150278428 | CELL BOUNDARY LAYOUT - Some embodiments relate to a method of hierarchical layout design, comprising forming a layout of an integrated circuit (IC) according to a design rule that specifies a minimum design rule distance between a neighboring layout features within the IC. Forming the layout comprises forming first and second standard cells having first and second layout features, respectively, that about one-another so that a distance between the first and second layout features is less than the minimum design rule distance. The method further comprises configuring design rule checking (DRC) to ignore this fail. Instead, the layout is modified with an automated layout tool by merging the first and second layout features, or by removing a portion of the first or second layout feature to increase the distance between the first and second layout features to be greater than or equal to the minimum distance. | 10-01-2015 |
20150286765 | CUT MASK DESIGN LAYERS TO PROVIDE COMPACT CELL HEIGHT - Some embodiments relate to a method of designing an integrated circuit layout. In this method, a plurality of design shapes are provided on different design layers over an active area within a graphical representation of the layout. A connection extends perpendicularly between a first design shape formed on a first design layer and a second design shape formed on the first design layer. First and second cut mask shapes on first and second cut mask design layers, respectively, are generated. The first cut shape removes portions of the first design layer and the second cut shape removes portions of the second design layer. | 10-08-2015 |
20150303276 | METHOD OF FABRICATING A LATERAL INSULATED GATE BIPOLAR TRANSISTOR - A method of fabricating a transistor includes doping non-overlapping first, second, and third wells in a silicon layer of a substrate. The substrate, second and third wells have a first type of conductivity and the first well and silicon layer have a second type of conductivity. First and second insulating layers are thermally grown over the second well between the first well and the third well, and over the third well, respectively. A gate stack is formed over the first insulating layer and the third well. A first source region having the second type of conductivity is formed in the third well. A gate spacer is formed, a fourth well having the first type of conductivity is doped in the third well between the second insulating layer and the gate spacer, a second source region is formed over the fourth well, and a drain is formed in the first well. | 10-22-2015 |
20160086868 | PASSIVATION STRUCTURE AND METHOD OF MAKING THE SAME - A passivation structure includes a bottom dielectric layer. The passivation structure further includes a doped dielectric layer over the bottom dielectric layer. The doped dielectric layer includes a first doped layer and a second doped layer. The passivation structure further includes a top dielectric layer over the doped dielectric layer. | 03-24-2016 |
Ming-Yi Lin, New Taipei City TW
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20130079941 | NETWORK-BASED POWER SUPPLY EFFICIENCY MANAGEMENT SYSTEM AND A METHOD THEREOF - The present invention relates to a network-based power supply efficiency management system and a method thereof, and more particularly, to a method for managing a power supply efficiency by comparing a predefined scenario on a server side with a real environment condition, and then issuing a usage control command to a managed unit via a network connection. | 03-28-2013 |
20140097682 | CENTRALIZED DC POWER SUPPLY CONTROL SYSTEM AND METHOD OF ECONOMICALLY CONTROLLING POWER CONSUMPTION - An economical centralized DC power consumption control system is used to separate electric power into an AC circuit for high-power-consumption electric appliances such as TV set, refrigerator, washing machine, and air conditioner and a DC circuit for low-power-consumption electric appliances such as lamp, electric fan, notebook computer, tablet computer, mobile phone, and digital camera. The DC circuit is equipped with multiple high-powered power supplies, each of which transforms commercial power to DC power, provides electricity to various low-power-consumption electric appliances, and directly links the electric appliances for supply of electric energy without individual rectifiers/transformers. | 04-10-2014 |
Ming-Yi Lin, Taipei TW
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20120139511 | POWER ADAPTER HAVING MULTI-DC POWER CONNECTORS - The present invention discloses a power adapter has a power converter, a power output cable, a first DC power connector and multiple second DC power connectors. The power converter has a casing, a power converting circuit mounted in the casing, and an AC power inlet and DC power outlet electronically connected to the power converting circuit. The power output cable has a DC output and selective connector having two DC power pinholes and multiple selective pinholes surrounding the two DC power pinholes. The first DC power connector has two DC voltage pins and is selectively connected to the DC output and selective connector. Each of the second DC power connectors has a body, a DC plug formed on the body, two DC voltage pins formed on the body and one jumper pin formed on the body and corresponding to the selective pinholes of the power output cable to change voltage of the DC power output from the power converting circuit. | 06-07-2012 |
Ming-Yi Lin, Hsinchu TW
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20130146911 | LIGHT EMITTING DIODE PACKAGE AND LENS MODULE USED THEREIN - An LED package includes an LED die and a lens module. The lens module covers the LED die. Light emitted from the LED die travels through the lens module. The lens module includes a concave lens and a convex lens with a smaller radial dimension than that of the concave lens. The concave lens covers the LED die. The convex lens is attached on a center of a surface of the concave lens away from the LED die. Optical axes of the concave lens and the convex lens are both collinear with a central axis of the LED die. Light from the LED die is diverged by the lens module to a peripheral side of the LED package. | 06-13-2013 |
Ming-Yi Lin, Kaohsiung City TW
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20150224673 | SLICING DEVICE - A slicing device suitable for slicing a workpiece is provided. The slicing device includes at least two rollers and a wire. A slicing passage for the workpiece to pass through is formed between the two rollers. The two rollers are winded by the wire to form a plurality of rings disposed in intervals parallel to each other. When the two rollers rotate to move the rings, the workpiece enters the slicing passage and presses on a portion of the rings spanning the two rollers so that the workpiece is sliced. Each roller has a circular cross-section, and the diameter of the circular cross-section varies along the length direction of each roller, so as to adjust the sizes of the rings. | 08-13-2015 |
Ming-Yi Liu, Hsinchu County TW
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20130214419 | SEMICONDUCTOR PACKAGING METHOD AND STRUCTURE THEREOF - A semiconductor packaging method includes providing a substrate having a plurality of connection pads; mounting a chip on the substrate, wherein the chip comprises a plurality of copper-containing bumps directly coupled to the connection pads, and each of the copper-containing bumps comprises a ring surface; forming an anti-dissociation gel between the substrate and the chip, wherein the anti-dissociation gel comprises a plurality of anti-dissociation substances, and the ring surfaces of the copper-containing bumps are covered by the anti-dissociation substances. | 08-22-2013 |
Ming-Yi Wu, Miaoli City TW
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20100156734 | Chip-type antenna for receiving FM broadcasting signal and a manufacturing method thereof - A chip-type antenna for receiving FM broadcasting signal includes a ceramic substrate, a ferrite layer formed on a top surface of the ceramic substrate, and a radiation structure. The ceramic substrate and the ferrite layer form an antenna substrate. The radiation structure is formed on the antenna substrate. The chip-type antenna for receiving FM broadcasting signal utilizes the high dielectric constant of the ceramic substrate and the electric characteristic of the ferrite layer to reduce the dimension of the antenna. | 06-24-2010 |
Ming-Yi Yang, Ping-Tung TW
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20080285328 | Phase Change Memory - A phase change memory is provided. The method includes forming contact plugs in a first dielectric layer. A second dielectric layer is formed overlying the first dielectric layer and a trench formed therein exposing portions of the contact plugs. A metal layer is formed over surfaces of the trench. One or more heaters are formed from the metal layer such that each heater is formed along one or more sidewalls and a portion of the bottom of the trench, wherein the portion of the heater along the sidewalls does not include a corner region of adjacent sidewalls. The trench is filled with a third dielectric layer, and a fourth dielectric layer is formed over the third dielectric layer. Trenches are formed in the fourth dielectric layer and filled with a phase change material. An electrode is formed over the phase change material. | 11-20-2008 |
20100140580 | Phase Change Memory - A phase change memory is provided. The method includes forming contact plugs in a first dielectric layer. A second dielectric layer is formed overlying the first dielectric layer and a trench formed therein exposing portions of the contact plugs. A metal layer is formed over surfaces of the trench. One or more heaters are formed from the metal layer such that each heater is formed along one or more sidewalls of the trench, wherein the portion of the heater along the sidewalls does not include a corner region of adjacent sidewalls. The trench is filled with a third dielectric layer, and a fourth dielectric layer is formed over the third dielectric layer. Trenches are formed in the fourth dielectric layer and filled with a phase change material. An electrode is formed over the phase change material. | 06-10-2010 |
Ming-Yi Yu, Taipei TW
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20150241889 | REFERENCE VOLTAGE GENERATING DEVICE AND METHOD - A reference voltage generating device including a reference voltage source, a charge supplying source, a first switch, a second switch, a charge storage unit and a logic unit is provided. First terminals of the first and second switches are respectively coupled to the output terminal of the reference voltage source and the charge supplying source. When a power on reset signal is received, the first switch is turned off and the second switch is turned on, such that the charge supplying source quickly charges the charge storage unit. When the output voltage is greater than or equal to the reference voltage, the first switch is turned on and the second switch is turned off, such that the reference voltage source maintains the output voltage to the reference voltage. | 08-27-2015 |