Rivers, CA
Alec Rivers, Los Angeles, CA US
Patent application number | Description | Published |
---|---|---|
20120075284 | Computer Method and Apparatus for Rotating 2D Cartoons Using 2.5D Cartoon Models - Disclosed herein are methods, apparatus, and computer program programs that use 2D drawings of a cartoon in different views to automatically construct rotated views of the subject cartoon. Embodiments involve a novel structure, the 2.5D cartoon model, which can generate plausible renderings of the cartoon in any view. Two or more input drawings can be leveraged to construct a 2.5D cartoon model that supports full 3D rotation. Unlike a 3D model, however, renderings produced by a 2.5D cartoon model retain the 2D nature and hand-drawn appearance of the input drawings, and support a wide range of 2D stylizations and shapes that would be impossible with a 3D model. | 03-29-2012 |
Alec Rothmyer Rivers, Los Angeles, CA US
Patent application number | Description | Published |
---|---|---|
20150094836 | SYSTEMS AND METHODS FOR PERFORMING A TASK ON A MATERIAL, OR LOCATING THE POSITION OF A DEVICE RELATIVE TO THE SURFACE OF THE MATERIAL - Systems and methods of the present disclosure relate generally to facilitate performing a task on a surface such as woodworking or printing. More specifically, in some embodiments, the present disclosure relates to mapping the surface of the material and determining the precise location of a tool in reference to the surface of a material. Some embodiments relate to obtaining and relating a design with the map of the material or displaying the current position of the tool on a display device. In some embodiments, the present disclosure facilitates adjusting, moving or auto-correcting the tool along a predetermined path such as, e.g., a cutting or drawing path. In some embodiments, the reference location may correspond to a design or plan obtained from obtained via an online design store | 04-02-2015 |
Billy Ray Rivers, Highland, CA US
Patent application number | Description | Published |
---|---|---|
20110101049 | Tricked out bumpers - A bumper-equipped spare-tire carrier to be mounted on the rear bumper of an automobile, the Tricked Out Bumpers provide carry-space for the spare tire in an elegant and stylish manner, and can be moved forward and back by remote control, appealing strongly to low-rider and other auto enthusiasts. Fabricated of the highest-quality components and available to fit the more popular sizes of tires, the Tricked Out Bumpers will find a wide and receptive market among America's auto owners and aficionados. | 05-05-2011 |
Doyle Rivers, El Dorado Hills, CA US
Patent application number | Description | Published |
---|---|---|
20130336040 | ALTERNATE CONTROL SETTINGS - An integrated circuit, that may be a part of an electronic system, may include a first set of storage cells to store settings and a second set of storage cells to store alternate settings. At least one control cell may also be included in the integrated circuit. The at least one control cell may indicate whether to use the settings stored in the first set of storage cells, or the alternate settings stored in the second set of storage cells, to control one or more operating parameters of the integrated circuit. Methods for using the alternate setting are also described. | 12-19-2013 |
20140016406 | ISOLATING, AT LEAST IN PART, LOCAL ROW OR COLUMN CIRCUITRY OF MEMORY CELL BEFORE ESTABLISHING VOLTAGE DIFFERENTIAL TO PERMIT READING OF CELL - An embodiment may include local row and column circuitry that are local to a memory cell of a memory device. Either the local row circuitry or the local column circuitry may be electrically isolated, at least in part, from at least one remaining portion of the memory device during the establishing of a voltage differential between the local row circuitry and the local column circuitry that is to permit the memory cell to be read during a read of the memory cell. The read may occur subsequent to the establishing of the voltage differential. Many variations, modifications, and alternatives are possible without departing from this embodiment. | 01-16-2014 |
20140258804 | REDUCED UNCORRECTABLE MEMORY ERRORS - Uncorrectable memory errors may be reduced by determining a logical array address for a set of memory arrays and transforming the logical array address to at least two unique array addresses based, at least in part, on logical locations of at least two memory arrays within the set of memory arrays. The at least two memory arrays are then accessed using the at least two unique array addresses, respectively. | 09-11-2014 |
20140269045 | CELL PROGRAMMING VERIFICATION - Technology for verifying cell programming for a phase change memory array is disclosed. In an example, a method may include sending a reset pulse to a phase change memory cell. The method may further include sensing a threshold voltage of the phase change memory cell in response to applying first and second verify voltages across the phase change memory cell, where the second verify voltage is lower than the first verify voltage. The method may also include determining whether the threshold voltage of the phase change memory cell was below the first or second verify voltages. | 09-18-2014 |
20140362657 | FLEXIBLE IDENTIFICATION TECHNIQUE - A shared-signaling multi-device memory system is capable of changing between addressing modes without the multi-device memory being required to undergo a power cycle. First and second registers of a memory device are set to both contain first address-identification information in response a first address-assignment command that is received a power cycle. The first register is set to contain second address-identification information in response a second address-assignment command that is received subsequently to the first address assignment command. Depending on the value of the second address-identification information, the memory device is configured in an individual-device-addressing mode or a parallel addressing mode without a power cycle. The first register can be reset to the first address-identification information contained in the second register in response to an address-restore command without a power cycle. A corresponding method is also disclosed. | 12-11-2014 |
20160093375 | REFERENCE ARCHITECTURE IN A CROSS-POINT MEMORY - The present disclosure relates to reference and sense architecture in a cross-point memory. An apparatus may include a memory controller configured to select a target memory cell for a memory access operation. The memory controller includes word line (WL) switch circuitry configured to select a global WL (GWL) and a local WL (LWL) associated with the target memory cell; bit line (BL) switch circuitry configured to select a global BL (GBL) and a local BL (LBL) associated with the target memory cell; and sense circuitry including a first sense circuitry capacitance and a second sense circuitry capacitance, the sense circuitry configured to precharge the selected GWL, the LWL and the first sense circuitry capacitance to a WL bias voltage WLVDM, produce a reference voltage (V | 03-31-2016 |
Doyle W. Rivers, Rancho Cordova, CA US
Patent application number | Description | Published |
---|---|---|
20120311406 | DATA PROTECTION ACROSS MULTIPLE MEMORY BLOCKS - Data protection across multiple memory blocks can include writing a first portion of a codeword in a first location of a first memory block and writing a second portion of the codeword in a second location of a second memory block. The second location can be different than the first location with respect to the second and the first memory blocks. | 12-06-2012 |
20140325316 | DATA PROTECTION ACROSS MULTIPLE MEMORY BLOCKS - Data protection across multiple memory blocks can include writing a first portion of a codeword in a first location of a first memory block and writing a second portion of the codeword in a second location of a second memory block. The second location can be different than the first location with respect to the second and the first memory blocks. | 10-30-2014 |
Eldon Lee Rivers, San Francisco, CA US
Patent application number | Description | Published |
---|---|---|
20160080716 | Graphics Blending for High Dynamic Range Video - A method and system for merging graphics and high dynamic range video data is disclosed. In a video receiver, if needed, video and graphics are translated first into the IPT-PQ color space. A display management process uses metadata to map the input video data and the graphics from their own color volume space into a target blending color volume space by taking into consideration the color volume space of the target display. | 03-17-2016 |
Hongwen M. Rivers, San Diego, CA US
Patent application number | Description | Published |
---|---|---|
20120022002 | SUSTAINED RELEASE siRNA FOR OCULAR DRUG DELIVERY - The present invention provides an ocular implant comprising siRNA complexed with a transfection agent selected from the group consisting of cationic lipids and short cell penetration peptides, wherein said complex is associated with a biocompatible polymer. Said biocompatible polymer comprises a polymeric matrix configured to release said complex into the eye of a patient at therapeutic levels for a time sufficient to treat an ocular condition or disease. | 01-26-2012 |
20120022137 | METHOD OF CONTROLLING INITIAL DRUG RELEASE OF siRNA FROM SUSTAINED-RELEASE IMPLANTS - The present invention provides an intraocular implant comprising siRNA combined with a excipient effective to retard the initial release of the siRNA from an implant, wherein said siRNA and excipient is associated with a biocompatible polymer (e.g., a polymeric matrix), configured to release said siRNA into the eye of a patient at therapeutic levels for a time sufficient to treat an ocular condition or disease. | 01-26-2012 |
20150087696 | METHOD OF CONTROLLING INITIAL DRUG RELEASE OF siRNA FROM SUSTAINED-RELEASE IMPLANTS - The present invention provides an intraocular implant comprising siRNA combined with a excipient effective to retard the initial release of the siRNA from an implant, wherein said siRNA and excipient is associated with a biocompatible polymer (e.g., a polymeric matrix), configured to release said siRNA into the eye of a patient at therapeutic levels for a time sufficient to treat an ocular condition or disease. | 03-26-2015 |
20150141348 | SUSTAINED RELEASE siRNA FOR OCULAR DRUG DELIVERY - The present invention provides an ocular implant comprising siRNA complexed with a transfection agent selected from the group consisting of cationic lipids and short cell penetration peptides, wherein said complex is associated with a biocompatible polymer. Said biocompatible polymer comprises a polymeric matrix configured to release said complex into the eye of a patient at therapeutic levels for a time sufficient to treat an ocular condition or disease. | 05-21-2015 |
Hongwen M. Rivers, San Marcos, CA US
Patent application number | Description | Published |
---|---|---|
20130123194 | AUTOCLAVABLE SUSPENSIONS OF CYCLOSPORIN A FORM 2 - Disclosed herein are autoclavable formulations of cyclosporin A Form 2, methods of making such formulations, and methods of treating diseases of the eye with such formulations. | 05-16-2013 |
20130189369 | TIME RELEASED BIODEGRADABLE OR BIOERODIBLE MICROSPHERES OR MICROPARTICLES SUSPENDED IN A SOLIDIFYING DEPOT-FORMING INJECTABLE DRUG FORMULATION - A composite drug delivery material may be injected into an eye of a human being or mammal to provide sustained delivery of the drug. A composite drug delivery material may include a plurality of microparticles dispersed in a media composition. The microparticles may contain a drug and a coating comprising a bioerodible material or a biodegradable material, and the media composition includes the drug dispersed in a depot-forming material. The media composition may gel or solidify upon injection into the eye. | 07-25-2013 |
20150141484 | Methods, Compositions and Drug Delivery Systems for Intraocular Delivery of siRNA Molecules - Biocompatible intraocular drug delivery systems in the form of an implant for intraocular administration of siRNA molecules. The drug delivery systems may be placed in an eye to treat or reduce the occurrence of one or more ocular conditions, such as retinal damage, including glaucoma and proliferative vitreoretinopathy among others. | 05-21-2015 |
Hongwen Ma Rivers, San Diego, CA US
Patent application number | Description | Published |
---|---|---|
20100311808 | METHODS, COMPOSITIONS AND DRUG DELIVERY SYSTEMS FOR INTRAOCULAR DELIVERY OF siRNA MOLECULES - Biocompatible intraocular drug delivery systems in the form of an implant for intraocular administration of siRNA molecules. The drug delivery systems may be placed in an eye to treat or reduce the occurrence of one or more ocular conditions, such as retinal damage, including glaucoma and proliferative vitreoretinopathy among others. | 12-09-2010 |
James Rivers, Saratoga, CA US
Patent application number | Description | Published |
---|---|---|
20100322241 | ROLE AWARE NETWORK SECURITY ENFORCEMENT - Generating a binding between a source address and one or more roles of a user accessing the network and distributing the binding to a filter node. The source address is currently assigned to the device. The binding may be generated by one or more nodes on an ingress path used during authentication of the user. The binding may be distributed to the filter node on demand or without any request from the filter node. Responsive to a determination that the user is associated with a new source address, a new binding is generated to associate a new source address with the one or more roles for the user. The new binding is distributed to the filter node. Another aspect is a method of enforcing a role based security policy at a filter node, using bindings of source addresses to roles. | 12-23-2010 |
20120207160 | SUBNET SCOPED MULTICAST/BROADCAST PACKET DISTRIBUTION MECHANISM OVER A ROUTED NETWORK - In one embodiment, a subnet-scoped multicast packet is received on an interface of a forwarding device that is connected to a host device of a subnet of a forwarding domain. The received subnet-scoped multicast packet is transmitted from one or more other interfaces of the forwarding device that are connected to one or more other host devices of the subnet. The received subnet-scoped multicast packet is also encapsulated with an additional header. The encapsulated subnet-scoped multicast packet is forwarded from the forwarding device to an intermediate router which routes the encapsulated subnet-scoped multicast packet to one or more other forwarding devices configured to decapsulate the encapsulated subnet-scoped multicast packet and transmit the decapsulated subnet-scoped multicast packet to one or more connected host devices of an additional portion of the subnet. | 08-16-2012 |
20140192806 | SUBNET SCOPED MULTICAST/BROADCAST PACKET DISTRIBUTION OVER A ROUTED NETWORK - In one embodiment, a subnet-scoped multicast packet is received on an interface of a forwarding device that is connected to a host device of a subnet of a forwarding domain. The received subnet-scoped multicast packet is transmitted from one or more other interfaces of the forwarding device that are connected to one or more other host devices of the subnet. The received subnet-scoped multicast packet is also encapsulated with an additional header. The encapsulated subnet-scoped multicast packet is forwarded from the forwarding device to an intermediate router which routes the encapsulated subnet-scoped multicast packet to one or more other forwarding devices configured to decapsulate the encapsulated subnet-scoped multicast packet and transmit the decapsulated subnet-scoped multicast packet to one or more connected host devices of an additional portion of the subnet. | 07-10-2014 |
James P. Rivers, Sunnyvale, CA US
Patent application number | Description | Published |
---|---|---|
20110047302 | PROGRAMMED I/O ETHERNET ADAPTER WITH EARLY INTERRUPTS FOR ACCELERATING DATA TRANSFER - In a Local Area Network (LAN) system, an Ethernet adapter exchanges data with a host through programmed I/O (PIO) and FIFO buffers. The receive PIO employs a DMA ring buffer backup so incoming packets can be copied directly into host memory when the PIO FIFO buffer is full. The adapter may be programmed to generate early receive interrupts when only a portion of a packet has been received from the network, so as to decrease latency. The adapter may also be programmed to generate a second early interrupt so that the copying of a large packet to the host may overlap reception of the packet end. The adapter to begin packet transmission before the packet is completely transferred from the host to the adapter, which further reduces latency. The minimal latency of the adapter allows it to employ receive and transmit FIFO buffers which are small enough to be contained within RAM internal to an Application Specific Integrated Circuit (ASIC) containing the transceiver, ethernet controller, FIFO control circuitry and the host interface as well. | 02-24-2011 |
James Paul Rivers, Saratoga, CA US
Patent application number | Description | Published |
---|---|---|
20080301759 | APPARATUS AND METHOD FOR APPLYING NETWORK POLICY AT VIRTUAL INTERFACES - Methods and apparatus are disclosed for applying network policy to communications originating at operating system virtual interfaces. In an example embodiment, a network device is networked with a switch. The network device may include a first operating system interface, a virtualization adapter, and an input output port. In an example embodiment, the virtualization adapter receives a first frame from the first operating system interface. The virtualization adapter may tag the first frame to indicate an association between the first frame and the first operating system interface. The first frame may then be transmitted with a second frame being associated with a second operating system interface, to the switch via the input output port. In an example embodiment, the switch is configured to receive the frame, examine a tag and then to enforce a network policy upon the first frame, based on the tag. | 12-04-2008 |
20090037977 | APPARATUS AND METHOD FOR APPLYING NETWORK POLICY AT A NETWORK DEVICE - This document discusses, among other things, applying network policy at a network device. In an example embodiment fibre channel hard zoning information may be received that indicates whether a fibre channel frame is permitted to be communicated between two fibre channel ports. Some example embodiments include identifying a media access control addresses associated with the fibre channel ports. An example embodiment may include generating one or more access control entries based on the fibre channel identifications of the fibre channel ports and the zoning information. The access control entries may be distributes to an Ethernet port to be inserted into an existing access control list and used to enforce a zoning policy upon fibre channel over Ethernet frames. | 02-05-2009 |
20090238070 | METHOD AND SYSTEM TO ADJUST CN CONTROL LOOP PARAMETERS AT A CONGESTION POINT - A method and system to adjust Congestion Notification control loop parameters at a congestion point are provided. The system comprises a monitor to sample a state of a congestion point the congestion point being to receive messages from a reaction point; a history generator to generate an updated reaction to congestion history by consolidating the state of the congestion point with a current reaction to congestion history, the current reaction to congestion history being associated with a current feedback message; a message generator to generate an updated feedback message based on the updated reaction to congestion history; a message update module to replace the current feedback message with the updated feedback message; and a communications module to communicate the updated feedback message to the reaction point. | 09-24-2009 |
20100157803 | METHOD AND SYSTEM TO MANAGE NETWORK TRAFFIC CONGESTION IN NETWORKS WITH LINK LAYER FLOW CONTROL - A method and system to manage network traffic congestion in networks with link layer flow control is provided. The system comprises a physical queue monitor configured to monitor a state of a physical queue at a network device, a link layer flow control activator configured to activate link layer flow control based on the state of the physical queue, a proxy queue control module, a proxy queue monitor to monitor the state of the proxy queue, and a transport layer flow control activator. The proxy queue control module may be configured to update a state of a proxy queue based on the state of the physical queue. The proxy queue monitor may be configured to monitor the state of the proxy queue. The transport layer flow control activator may be configured to activate transport layer flow control based on the state of the proxy queue. | 06-24-2010 |
20100232419 | PROVIDING FIBRE CHANNEL SERVICES AND FORWARDING FIBRE CHANNEL OVER ETHERNET FRAMES - In one embodiment, an apparatus may include a first interface configured to be communicatively coupled, via a network, to a second interface and a fibre channel services module. The first interface may be configured to receive a fibre channel service from the fibre channel services module, establish communication with the second interface, and communicate a fibre-channel-over-Ethernet (FCoE) frame to the second interface, via a forwarder that forwards the FCoE frame without employing a fibre channel switching element. Other embodiments are described and claimed. | 09-16-2010 |
20130086266 | APPARATUS AND METHOD FOR APPLYING NETWORK POLICY AT A NETWORK DEVICE - This document discusses, among other things, applying network policy at a network device. In an example embodiment fibre channel hard zoning information may be received that indicates whether a fibre channel frame is permitted to be communicated between two fibre channel ports. Some example embodiments include identifying a media access control addresses associated with the fibre channel ports. An example embodiment may include generating one or more access control entries based on the fibre channel identifications of the fibre channel ports and the zoning information. The access control entries may be distributes to an Ethernet port to be inserted into an existing access control list and used to enforce a zoning policy upon fibre channel over Ethernet frames. | 04-04-2013 |
20140214761 | Systems and Methods for Accelerating Networking Functionality - Methods and systems for synchronizing network configuration state tables between an operating system kernel and an attached ASIC switch device are disclosed. An instruction to update a target network configuration state table in either an operating system kernel or an attached ASIC switch device is received. Data from the target network configuration state table and data from a corresponding network configuration state table are retrieved. Values of data in the two tables are compared and an instruction is sent to update the target network configuration state table with one or more values from the corresponding network configuration state table. | 07-31-2014 |
John Paul Rivers, Saratoga, CA US
Patent application number | Description | Published |
---|---|---|
20140376402 | METHODS AND SYSTEMS FOR AUTOMATIC GENERATION OF ROUTING CONFIGURATION FILES - Described herein are methods and systems for automatically generating routing configuration files based on a network topology and a collection of routing configuration templates. Such automatically generated routing configuration files may be suitable for a network running one or more of the RIP, EIGRP, OSPF, IS-IS and BGP routing protocols. The network topology may be specified in a graph description language, such as DOT, and/or a graph modeling language, such as GraphML. The routing configuration templates include certain routing protocol commands or sequence of commands that are frequently repeated in the configuration of a network device. Based on the network topology, the routing configuration templates are instantiated in a certain fashion, and any placeholders therein are replaced with information specific to the network topology. | 12-25-2014 |
J.r. Rivers, Saratoga, CA US
Patent application number | Description | Published |
---|---|---|
20080313724 | N-PORT ID VIRTUALIZATION (NPIV) PROXY MODULE, NPIV PROXY SWITCHING SYSTEM AND METHODS - Embodiments of an N-Port ID virtualization (NPIV) proxy module, NPIV proxy switching system, and methods are generally described herein. Other embodiments may be described and claimed. In some embodiments, login requests are distributed over a plurality of available N-ports to allow servers to be functionally coupled to F-ports of a plurality of fiber-channel (FC) switches. Fiber-channel identifiers (FCIDs) are assigned to the servers in response to the logon requests to provide single end-host operations for each of the servers. | 12-18-2008 |
Michael G. Rivers, Vacaville, CA US
Patent application number | Description | Published |
---|---|---|
20150235214 | User Authentication and Authorization - Systems, methods and apparatuses for authenticating a user and/or authorizing use of a reusable payment device associated with the user. In some examples, user identifying information, such as a checking account number, driver's license number, username, or the like, may be received. Based on this received information, a reusable payment device number associated with a reusable payment device of the user may be determined. This information may then be encrypted. Further, additional authenticating information may be received. For instance, a user personal identification number (PIN) may be received. The PIN may also be encrypted. The encrypted PIN and encrypted reusable payment device number may be analyzed to determine whether they are associated with the same reusable payment device. If so, a user may be authenticated. | 08-20-2015 |
Miguel A. Rivers, Orange, CA US
Patent application number | Description | Published |
---|---|---|
20130331590 | Apparatus and Method for Manufacturing Permanently Confined Micelle Array Nanoparticles - A cylindrical reactor has walls and a base, forming a chamber in which permanently manufactured micelle array nanoparticles may be manufactured. The reactor has a disk impeller inside the chamber which serves to mix reagents in the chamber and a collar which facilitates the mixing process. The reactor is effective to input an amount of energy to the mixed reagents such that particle coagulation is prevented but formation of PCMA nanoparticles is permitted. A method for manufacturing PCMA nanoparticles is disclosed. Reagents, beginning with prepared core particles, are stepwise added to a reactor and mixed. A high sheer mixing unit is used to input an amount of energy to the mixed reagents such that particle coagulation is prevented but formation of PCMA nanoparticles is permitted. | 12-12-2013 |
Montgomery C. Rivers, Irvine, CA US
Patent application number | Description | Published |
---|---|---|
20120032286 | THREE DIMENSIONAL FOLDED MEMS TECHNOLOGY FOR MULTI-AXIS SENSOR SYSTEMS - An apparatus is fabricated with a plurality of semiconductor-device substrates and/or MEMS substrates with micromachined sensors, circuits, transducers, and/or MEMS devices fabricated on the plurality of substrates. A plurality of flexible hinges couple the plurality of substrates into a substantially flat two dimensional foldable assembly. Electrical interconnects coupled to the sensors, circuits, transducers, and/or MEMS devices extend other ones of the plurality of substrates. The foldable assembly of substrates is assembled or folded into a three dimensional polyhedral structure with the plurality of substrates configured in three dimensions to form defined relative orientations in space with respect to each other. The invention includes a wafer scale method of fabricating the apparatus. | 02-09-2012 |
Patrick Rivers, Oakland, CA US
Patent application number | Description | Published |
---|---|---|
20140315245 | EXPRESSION OF BIOLOGICALLY ACTIVE PROTEINS IN A BACTERIAL CELL-FREE SYNTHESIS SYSTEM USING BACTERIAL CELLS TRANSFORMED TO EXHIBIT ELEVATED LEVELS OF CHAPERONE EXPRESSION - The present disclosure describes methods and systems for improving the expression of a properly folded, biologically active protein of interest in a cell free synthesis system. The methods and systems use a bacterial cell free extract having an active oxidative phosphorylation system, and include an exogenous protein chaperone. The exogenous protein chaperone can be expressed by the bacteria used to prepare the cell free extract. The exogenous protein chaperone can be a protein disulfide isomerase and/or a peptidyl-prolyl cis-trans isomerase. The inventors discovered that the combination of a protein disulfide isomerase and a peptidyl-prolyl cis-trans isomerase produces a synergistic increase in the amount of properly folded, biologically active protein of interest. | 10-23-2014 |
Wakesha Rivers, Buena Park, CA US
Patent application number | Description | Published |
---|---|---|
20150366744 | Scalp Scratching Assembly - A scalp scratching assembly for penetrating a hair accoutrement without disturbing the hair accoutrement includes a shaft that has an adjustable length. At least one pad is coupled to an end of the shaft. The at least one pad is textured. The at least one pad may abrade a user's scalp. The at least one pad is insertable through the hair accoutrement. The hair accoutrement remains stationary while the shaft is moved. The at least one pad scratches the user's scalp. | 12-24-2015 |