Patent application number | Description | Published |
20090289601 | METHOD AND APPARATUS FOR SYSTEM ACQUISITION WHILE MAINTAINING A DEFINED BATTERY LIFE SPAN - A method and an apparatus for system acquisition at a wireless device while maintaining a predetermined battery life span, include determining a level of remaining battery power upon entering an out of service state. A duty cycle, comprising a search time and sleep time, of acquisition attempts is determined such that the level of remaining battery power lasts for the defined battery life span. The duty cycle is determined by adjusting at least one of the search time and the sleep time, depending on how long the remaining battery power is required to last. | 11-26-2009 |
20090290625 | THERMAL MANAGEMENT FOR DATA MODULES - A data module operable in a wireless communication system is provided. The data module comprises a plurality of circuit components, one or more temperature sensors, and a thermal management unit. The temperature sensors are configured to determine the temperature of a corresponding circuit component. The thermal management unit is configured to determine one or more thermal characteristics of the data module based on the temperature determinations, and to generate one or more power control point signals indicating whether to adjust corresponding operating characteristics of a target component based on the determined thermal characteristics. | 11-26-2009 |
20090291683 | METHOD AND APPARATUS FOR CHANNEL SCANNING THAT IMPROVES ACQUISITION PROBABILITY AND POWER CONSUMPTION - A method and apparatus for channel acquisition using a mobile station include obtaining geographic information of at least one wireless communication systems using one or more systems, respectively. The one or more channels are prioritized on a preferred roaming list based on the geographic information, and it is determined whether any of the prioritized one or more channels on the preferred roaming list are also on a most recently used (MRU) list. The mobile station attempts to acquire at least one of the prioritized one or more channels that is also on the MRU list. | 11-26-2009 |
20140115363 | MODAL WORKLOAD SCHEDULING IN A HETEROGENEOUS MULTI-PROCESSOR SYSTEM ON A CHIP - Various embodiments of methods and systems for mode-based reallocation of workloads in a portable computing device (“PCD”) that contains a heterogeneous, multi-processor system on a chip (“SoC”) are disclosed. Because individual processing components in a heterogeneous, multi-processor SoC may exhibit different performance capabilities or strengths, and because more than one of the processing components may be capable of processing a given block of code, mode-based reallocation systems and methodologies can be leveraged to optimize quality of service (“QoS”) by allocating workloads in real time, or near real time, to the processing components most capable of processing the block of code in a manner that meets the performance goals of an operational mode. Operational modes may be determined by the recognition of one or more mode-decision conditions in the PCD. | 04-24-2014 |
20140122689 | DYNAMIC ADJUSTMENT OF AN INTERRUPT LATENCY THRESHOLD AND A RESOURCE SUPPORTING A PROCESSOR IN A PORTABLE COMPUTING DEVICE - A portable computing device includes a modem and an application processor communicatively coupled by a data bus. The modem communicates a target data throughput in accordance with an identified data call. In response, the application processor determines whether an adjustment of an interrupt latency threshold is warranted to support the target data throughput identified by the modem. Otherwise, the application processor executes no such adjustment. In addition, the modem requests a desired performance of an application processor resource. In response, the application processor adjusts a control input of the application processor controlled resource. A change in a present data transfer session triggers the modem to communicate a revised target data throughput and/or a revised request for a desired performance of an application processor resource. | 05-01-2014 |
Patent application number | Description | Published |
20080280610 | METHODS AND APPARATUS FOR OUT OF SERVICE PROCESSING WITH VARIED BEHAVIORS - Methods and apparatus for out of service processing with varied behaviors. In an aspect, a method is provided for service acquisition. The method includes determining one or more conditions, wherein each condition is associated with at least one weight, detecting whether an out-of-service event has occurred, and if an out-of-service event is detected: identifying selected conditions and associated weights, and processing the associated weights to determine service acquisition “on” and “off” times. In an aspect, an apparatus includes condition logic configured to determine one or more conditions, wherein each condition is associated with at least one weight, and processing logic configured to detect whether an out-of-service event has occurred, and if an out-of-service event is detected, to identify selected conditions and associated weights, and process the associated weights to determine service acquisition “on” and “off” times. | 11-13-2008 |
20100091643 | METHODS AND APPARATUS FOR ROBUST SLOTTED MODE OPERATION IN FADING WIRELESS ENVIRONMENTS - Methods, devices and computer program products are disclosed that allow for wireless communication devices to operate more robustly in the slotted mode of operation in the event of network system loss. Specifically, present aspects require the wireless device to move to or remain in the slotted mode of operation as opposed to immediately entering into a system determination/acquisition mode upon failing to acquire an active set pilot during a slotted wake-up. By moving to the slotted mode of operation or providing for additional slotted-wake-ups, a number of attempts at acquiring the active set pilot can be performed before declaring the system as lost, thereby allowing for fading channel conditions to prevail without the need to re-acquire the lost system or otherwise acquire another system. Since the performance of the slotted mode is less power intensive than acquiring or re-acquiring a system, a substantial power savings is realized. | 04-15-2010 |
20100178919 | OPTIMUM TECHNOLOGY SELECTION - Systems and methodologies are described that facilitate optimum technology selection within multi-modal configurations. A multi-mode mobile device can select and/or utilize a particular technology, system and/or configuration to provide optimal quality of service (QOS) in terms of various characteristics. For instance, an optimum technology can be selected and employed for a service request based upon performance, cost, power consumption, interference levels, and the like. The multi-modal mobile device can obtain characteristics of a plurality of technologies during idle states. The characteristics can be analyzed in order to generate a QOS table that provides relative rankings of the plurality of technologies in terms of service request type and the obtained characteristics. The QOS table can be utilized to select an optimum technology upon initiation of a service request. | 07-15-2010 |
20100234021 | Scanning Channels While a Device is Out of Service - A channel scanning order is dynamically created, modified, selectively ignored, or combinations thereof based on historical data, motion information, context information, alert message systems, network reselection, or combinations thereof. If a less preferred network has served a mobile device longer than a threshold amount of time, acquisition of the less preferred network is attempted before attempting acquisition of a more preferred network. | 09-16-2010 |
20100246420 | Enhanced Channel Detection - An apparatus for detecting the presence of a frequency channel is provided. The apparatus comprises an energy detection unit configured to measure receive energy over a first bandwidth and a second energy detection unit configured to measure receive energy over a second bandwidth. The apparatus further comprises a processor configured to compare the measured receive energy over the first bandwidth to a first energy threshold, to compare the measured receive energy over the second bandwidth to a second energy threshold, and to detect the presence of the frequency channel when the measured receive energies over the first and second bandwidths are above the first and second energy thresholds, respectively. | 09-30-2010 |
20110072295 | APPARATUS AND METHODS FOR OPTIMIZING POWER CONSUMPTION IN A WIRELESS DEVICE - Apparatus and methods are disclosed for power optimization in a wireless device. The apparatus and methods effect monitoring the amount of data stored in a data buffer that buffers data input to and data output from a processor. Dependent on the amount of data stored in the buffers parameters of a control function, such as a Dynamic Clock and Voltage Scaling (DCVS) function are modified based on the amount of data stored in the data buffer. By modifying or pre-empting the parameters of the control function, which controls at least processor frequency, the processor can process applications more dynamically over default parameter settings, especially in situations where one or more real-time activities having strict time constraints for completion are being handled by the processor as evinced by increased buffer depth. As a result, power usage is further optimized as the control function is more responsive to processing conditions. | 03-24-2011 |
20140256375 | Detecting Electromagnetic Energy for Alarm or Log Using Mobile Phone Devices - A mobile phone is configured to employ existing antennae or other exiting input electronics to receive electromagnetic waves, for detection of energy magnitudes. The mobile phone has wireless receiver electronics to receive, through the antennae, communication signals in a plurality of different communication bands that correspond to the plurality of different frequency ranges. Energy levels of electromagnetic waves received through the plurality of antennae are detected. A record is made of energy levels in the plurality of different frequency ranges. An alarm is provided upon a detected energy level crossing a predefined threshold value. | 09-11-2014 |
20150046604 | FLEXIBLE HARDWARE MODULE ASSIGNMENT FOR ENHANCED PERFORMANCE - A system is disclosed for mapping operating-system-identified addresses for substantially-identical hardware modules into performance-parameter-based addresses for the hardware modules. The mapping is accomplished by configuring a flexible I/O interface responsive to a characterization of at least one performance parameter for each hardware module. | 02-12-2015 |
Patent application number | Description | Published |
20090030008 | PIPERAZINE DERIVATIVES AND THEIR USE AS THERAPEUTIC AGENTS - Methods of treating an SCD-mediated disease or condition in a mammal, preferably a human, are disclosed, wherein the methods comprise administering to a mammal in need thereof a compound of formula (I): | 01-29-2009 |
20090131447 | COMBINATION THERAPY - This invention is directed to the use of SCD-1 inhibitors of the formula (I): where x, y, V, W, G, J, L, M, R2, R3, R5, R5a, R6, R6a, R7, R7a, R8 and R8a are defined herein, in combination with other drug therapies to treat adverse weight gain. | 05-21-2009 |
20100048584 | PYRIDYL DERIVATIVES AND THEIR USE AS THERAPEUTIC AGENTS - Methods of treating an SCD-mediated disease or condition in a mammal, preferably a human, are disclosed, wherein the methods comprise administering to a mammal in need thereof a compound of formula (I): | 02-25-2010 |
20100197913 | NON-NUCLEOTIDE COMPOSITION FOR INHIBITING PLATELET AGGREGATION - This invention is directed to a method of preventing or treating diseases or conditions associated with platelet aggregation. The method is also directed to a method of treating thrombosis or related disorders. The method comprises administering to a subject a pharmaceutical composition comprising an effective amount of a non-nucleotide compound, preferably a P2Y | 08-05-2010 |
Patent application number | Description | Published |
20090143078 | TECHNIQUES TO MANAGE A RADIO BASED ON LOCATION INFORMATION - Techniques to manage a radio based on location information are described. A mobile computing device may include a radio module, a location detector operative to determine a location for the mobile computing device, and a processor to couple to the radio module and the resource database. The processor may be operative to execute a resource management module to access a resource profile having resource information for one or more cellular radiotelephone network resources accessible from the location, and control operations for a radio module based on the resource profile. Other embodiments are described and claimed. | 06-04-2009 |
20090164813 | TECHNIQUES TO MANAGE POWER BASED ON MOTION DETECTION - Techniques to manage power based on motion detection are described. For example, a mobile computing device may include a radio module having a communications failure event detector operative to detect a communications failure event, a motion detector operative to detect motion, and a processor coupled to the radio module and the motion detector. The processor operative to execute a scan control module to determine the mobile computing device is moving or stationary, and control scanning operations by the radio module in accordance with the determination. Other embodiments are described and claimed. | 06-25-2009 |
20110111708 | TECHNIQUES TO CONTROL A SHARED ANTENNA ARCHITECTURE FOR MULTIPLE CO-LOCATED RADIO MODULES - Techniques to control a shared antenna architecture for multiple co-located radio modules is disclosed. For example, a method may comprise receiving power state information for a set of transceivers, receiving activity information for the set of transceivers, and generating control signals for simultaneous operations or mutually-exclusive operations for a shared antenna structure connecting the set of transceivers to an antenna based on the power state information and activity information. Other embodiments are disclosed and claimed. | 05-12-2011 |
20120162214 | Three-Dimensional Tracking of a User Control Device in a Volume - Tracking objects presented within a stereo three-dimensional (3D) scene. The user control device may include one or more visually indicated points for at least one tracking sensor to track. The user control device may also include other position determining devices, for example, an accelerometer and/or gyroscope. Precise 3D coordinates of the stylus may be determined based on location information from the tracking sensor(s) and additional information from the other position determining devices. A stereo 3D scene may be updated to reflect the determined coordinates | 06-28-2012 |
20120162384 | Three-Dimensional Collaboration - Remote collaboration of a subject and a graphics object in a same view of a 3D scene. In one embodiment, one or more cameras of a collaboration system may be configured to capture images of a subject and track the subject (e.g., head of a user, other physical object). The images may be processed and provided to another collaboration system along with a determined viewpoint of the user. The other collaboration system may be configured to render and display the captured images and a graphics object in the same view of a 3D scene. | 06-28-2012 |
20130128011 | HEAD TRACKING EYEWEAR SYSTEM - In some embodiments, a system for tracking with reference to a three-dimensional display system may include a display device, an image processor, a surface including at least three emitters, at least two sensors, a processor. The display device may image, during use, a first stereo three-dimensional image. The surface may be positionable, during use, with reference to the display device. At least two of the sensors may detect, during use, light received from at least three of the emitters as light blobs. The processor may correlate, during use, the assessed referenced position of the detected light blobs such that a first position/orientation of the surface is assessed. The image processor may generate, during use, the first stereo three-dimensional image using the assessed first position/orientation of the surface with reference to the display. The image processor may generate, during use, a second stereo three-dimensional image using an assessed second position/orientation of the surface with reference to the display. | 05-23-2013 |
20150123891 | METHODS FOR AUTOMATICALLY ASSESSING USER HANDEDNESS IN COMPUTER SYSTEMS AND THE UTILIZATION OF SUCH INFORMATION - In some embodiments, a system and/or method may assess handedness of a user of a system in an automated manner. The method may include displaying a 3D image on a display. The 3D image may include at least one object. The method may include tracking a position and an orientation of an input device in open space in relation to the 3D image. The method may include assessing a handedness of a user based on the position and the orientation of the input device with respect to at least one of the objects. In some embodiments, the method may include configuring at least a portion of the 3D image based upon the assessed handedness. The at least a portion of the 3D image may include interactive menus. In some embodiments, the method may include configuring at least a portion of an interactive hardware associated with the system based upon the assessed handedness. | 05-07-2015 |
20150138189 | SYSTEM AND METHODS FOR CLOUD BASED 3D DESIGN AND COLLABORATION - In some embodiments, a system and/or method may include accessing three-dimensional (3D) imaging software on a remote server. The method may include accessing over a network a 3D imaging software package on a remote server using a first system. The method may include assessing, using the remote server, a capability of the first system to execute the 3D imaging software package. The method may include displaying an output of the 3D imaging software using the first system based upon the assessed capabilities of the first system. In some embodiments, the method may include executing a first portion of the 3D imaging software using the remote server based upon the assessed capabilities of the first system. In some embodiments, the method may include executing a second portion of the 3D imaging software using the first system based upon the assessed capabilities of the first system. | 05-21-2015 |
Patent application number | Description | Published |
20100111164 | Method and System for Data Management in a Video Decoder - A method and system for minimizing bus traffic in a video decoder is disclosed. A method and system for processing a portion of a reference picture includes designating the reference picture, selecting a display picture within the reference picture, transmitting a display picture size, and sending a display picture offset. A method and system for compressing IDCT coefficients corresponding to a macroblock, the macroblock having a plurality of blocks, includes locating each non-zero IDCT coefficient corresponding to one of the plurality of blocks, assigning an index to the non-zero IDCT coefficient, the index designating a location within the one of the plurality of blocks, packing the non-zero IDCT coefficient in little endian format, and specifying a terminator bit corresponding to the non-zero coefficient, the terminator bit indicating the end of all non-zero IDCT coefficients for the one of the plurality of blocks. A method and system for selectively controlling each hardware device within a video decoder includes obtaining a video stream, performing VLC decoding, encoding a plurality of instructions to control each hardware device within the video decoder, decoding each one of the plurality of instructions, and optionally performing an IDCT in response to each one of the plurality of instructions. | 05-06-2010 |
20140010313 | Method and System for Data Management in a Video Decoder - A method and system for minimizing bus traffic in a video decoder is disclosed. A method and system for processing a portion of a reference picture includes designating the reference picture, selecting a display picture within the reference picture, transmitting a display picture size, and sending a display picture offset. A method and system for compressing IDCT coefficients corresponding to a macroblock, the macroblock having a plurality of blocks, includes locating each non-zero IDCT coefficient corresponding to one of the plurality of blocks, assigning an index to the non-zero IDCT coefficient, the index designating a location within the one of the plurality of blocks, packing the non-zero IDCT coefficient in little endian format, and specifying a terminator bit corresponding to the non-zero coefficient, the terminator bit indicating the end of all non-zero IDCT coefficients for the one of the plurality of blocks. | 01-09-2014 |
Patent application number | Description | Published |
20100191241 | Vertebral joint implants and delivery tools - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 07-29-2010 |
20130012994 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 01-10-2013 |
20130013070 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 01-10-2013 |
20130018474 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 01-17-2013 |
20130023995 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 01-24-2013 |
20130023996 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 01-24-2013 |
20130030440 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 01-31-2013 |
20130030532 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 01-31-2013 |
20140288565 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 09-25-2014 |
20140288602 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 09-25-2014 |
20140296916 | VERTEBRAL JOINT IMPLANTS AND DELIVERY TOOLS - A spinal joint distraction system for treating a facet joint including articular surfaces having a contour is disclosed and may include a delivery device including a generally tubular structure adapted to engage a facet joint, an implant adapted to be delivered through the delivery device and into the facet joint, the implant comprising two members arranged in opposed position, and an implant distractor comprising a generally elongate member adapted to advance between the two members of the implant causing separation of the members and distraction of the facet joint, wherein the implant is adapted to conform to the shape of the implant distractor and/or the articular surfaces of the facet upon being delivered to the facet joint. Several embodiments of a system, several embodiments of an implant, and several methods are disclosed including a method for interbody fusion. | 10-02-2014 |
Patent application number | Description | Published |
20080310242 | SYSTEMS FOR PROGRAMMABLE CHIP ENABLE AND CHIP ADDRESS IN SEMICONDUCTOR MEMORY - Memory die are provided with programmable chip enable circuitry to allow particular memory die to be disabled after packaging and/or programmable chip address circuitry to allow particular memory die to be readdressed after being packaged. In a multi-chip memory package, a memory die that fails package-level testing can be disabled and isolated from the memory package by a programmable circuit that overrides the master chip enable signal received from the controller or host device. To provide a continuous address range, one or more of the non-defective memory die can be re-addressed using another programmable circuit that replaces the unique chip address provided by the pad bonding. Memory chips can also be also be readdressed after packaging independently of detecting a failed memory die. | 12-18-2008 |
20080311684 | Programmable Chip Enable and Chip Address in Semiconductor Memory - Memory die are provided with programmable chip enable circuitry to allow particular memory die to be disabled after packaging and/or programmable chip address circuitry to allow particular memory die to be readdressed after being packaged. In a multi-chip memory package, a memory die that fails package-level testing can be disabled and isolated from the memory package by a programmable circuit that overrides the master chip enable signal received from the controller or host device. To provide a continuous address range, one or more of the non-defective memory die can be re-addressed using another programmable circuit that replaces the unique chip address provided by the pad bonding. Memory chips can also be also be readdressed after packaging independently of detecting a failed memory die. | 12-18-2008 |
20100020614 | Non-Volatile Memory With Linear Estimation of Initial Programming Voltage - In a non-volatile memory, a selected page on a word line is successively programmed by a series of voltage pulses of a staircase waveform with verifications in between the pulses until the page is verified to a designated pattern. The programming voltage at the time the page is programmed verified will be used to estimate the initial value of a starting programming voltage for the page. The estimation is further refined by using the estimate from a first pass in a second pass. Also, when the test is over multiple blocks, sampling of word lines based on similar geometrical locations of the blocks can yield a starting programming voltage optimized for faster programming pages. | 01-28-2010 |
20120201091 | MEMORY CARD TEST INTERFACE - A memory card and methods for testing memory cards are disclosed herein. The memory card has a test interface that allows testing large numbers of memory cards together. Each memory card may have a serial data I/O contact and a test select contact. The memory cards may only send data via the serial data I/O contact when selected, which may allow many memory cards to be connected to the same serial data line during test. Moreover, existing test socket boards may be used without adding additional external circuitry. Thus, cost effective testing of memory cards is provided. In some embodiments, the test interface allows for a serial built in self test (BIST). | 08-09-2012 |
20130033935 | MEMORY DIE SELF-DISABLE IF PROGRAMMABLE ELEMENT IS NOT TRUSTED - Techniques are disclosed herein for automatically self-disabling a memory die in the event that a programmable element on the memory die for indicating whether the memory die is defective cannot be trusted. Memory die are provided with chip enable circuitry to allow particular memory die to be disabled. If the programmable element can be trusted, the state of the programmable element is provided to the chip enable circuitry to enable/disable the memory die based on the state. However, if the programmable element cannot be trusted, then the chip enable circuitry may automatically disable the memory die. This provides a greater yield for multi-chip memory packages because packages having memory die with a programmable element that cannot be trusted can still be used. | 02-07-2013 |
20140351653 | MEMORY CARD TEST INTERFACE - A memory card and methods for testing memory cards are disclosed herein. The memory card has a test interface that allows testing large numbers of memory cards together. Each memory card may have a serial data I/O contact and a test select contact. The memory cards may only send data via the serial data I/O contact when selected, which may allow many memory cards to be connected to the same serial data line during test. Moreover, existing test socket boards may be used without adding additional external circuitry. Thus, cost effective testing of memory cards is provided. In some embodiments, the test interface allows for a serial built in self test (BIST). | 11-27-2014 |
Patent application number | Description | Published |
20090160039 | METHOD AND LEADFRAME FOR PACKAGING INTEGRATED CIRCUITS - A leadframe suitable for use in the packaging of at least two integrated circuit dice into a single integrated circuit package is described. The leadframe includes a plurality of leads. Each of a first set of the plurality of leads has a first side and a second side substantially opposite the first side of the lead. Additionally, each of the first and second sides of the first set of leads each include at least two solder pads. Each solder pad on a lead of the first set of leads is isolated from other solder pads on the same side of the lead with at least one recessed region adjacent the solder pad. In various embodiments, I/O pads from at least two dice are physically and electrically connected to the opposing sides of the leads. | 06-25-2009 |
20100117206 | MICROARRAY PACKAGE WITH PLATED CONTACT PEDESTALS - A microarray package includes a leadframe having an array of contact posts, a die carried by the lead frame, and a plurality of bonding wires that electrically connect the die to the lead frame. An encapsulant is included that encapsulates the die, the bonding wire and the leadframe while leaving the distal ends of the contact posts exposed and substantially co-planar with a bottom surface of the microarray package. A plurality of pedestal members is plated to the distal end of a respective contact pad. A distal surface of each pedestal member protrudes outwardly beyond the bottom surface of the microarray package in the range of about 15 μm to about 35 μm. | 05-13-2010 |
20100136749 | MICROARRAY PACKAGE WITH PLATED CONTACT PEDESTALS - A microarray package includes a leadframe having an array of contact posts, a die carried by the lead frame, and a plurality of bonding wires that electrically connect the die to the lead frame. An encapsulant is included that encapsulates the die, the bonding wire and the leadframe while leaving the distal ends of the contact posts exposed and substantially co-planar with a bottom surface of the microarray package. A plurality of pedestal members is plated to the distal end of a respective contact pad. A distal surface of each pedestal member protrudes outwardly beyond the bottom surface of the microarray package in the range of about 15 μm to about 35 μm. | 06-03-2010 |
20110104854 | METHOD AND LEADFRAME FOR PACKAGING INTEGRATED CIRCUITS - A leadframe suitable for use in the packaging of at least two integrated circuit dice into a single integrated circuit package is described. The leadframe includes a plurality of leads. Each of a first set of the plurality of leads has a first side and a second side substantially opposite the first side of the lead. Additionally, each of the first and second sides of the first set of leads each include at least two solder pads. Each solder pad on a lead of the first set of leads is isolated from other solder pads on the same side of the lead with at least one recessed region adjacent the solder pad. In various embodiments, I/O pads from at least two dice are physically and electrically connected to the opposing sides of the leads. | 05-05-2011 |
20110269269 | LASER ABLATION ALTERNATIVE TO LOW COST LEADFRAME PROCESS - The present inventions relate generally to methods for packaging integrated circuits using thin foils that form electrical interconnects for the package. The foil includes a base layer (such as copper) with an optional plating layer (such as silver) suitable for improving adhesion of the bonding wires (or other connectors) to the foil. The base layer (or the plated surface if the foil is preplated) of the foil is patterned by laser ablation to define components (e.g. contacts) of a device area. The patterning is arranged to ablate entirely through selected portions of the plating layer and part, but not all, of the way through corresponding underlying portions of the base layer. In some embodiments, the metallic foil is partially etched after the laser ablation in order to deepen the trenches that define the patterning of the foil. Multiple dice may then be attached to die attach pad areas of the plated foil and electrically coupled to electrical contacts. Some embodiments contemplate encapsulating the dice, bonding wires, and portions of the plated foil with a plastic molding material. Portions of the metallic foil may then be removed by etching, laser ablation, or grinding. The resulting structure may then be singulated to form individual integrated circuit packages. | 11-03-2011 |
20120043660 | THIN FOIL SEMICONDUCTOR PACKAGE - One aspect of the present invention involves a foil-based method for packaging integrated circuits. Initially, a metallic foil and a photoresist layer are attached with a carrier. The photoresist layer is exposed and patterned. Afterward, multiple integrated circuit dice are connected to the foil. The dice and portions of the foil are encapsulated in a molding material. The foil is then etched based on the patterned photoresist layer to define multiple device areas in the foil, where each device area supports at least one of the integrated circuit dice. Some aspects of the present invention relate to panel arrangements that are involved in the aforementioned method. | 02-23-2012 |
20120074561 | BACKMETAL REPLACEMENT FOR USE IN THE PACKAGING OF INTEGRATED CIRCUITS - One aspect of the invention pertains to an arrangement for forming exposed die packages. The arrangement includes a semiconductor wafer having multiple integrated circuit dice whose back surfaces cooperate to form the back surface of the wafer. A thermally conductive adhesive layer is deposited on the back surface of the wafer. The metal foil is attached to the wafer with the adhesive layer. Methods of forming exposed die packages using the above arrangement are also described. | 03-29-2012 |
Patent application number | Description | Published |
20090305076 | FOIL BASED SEMICONDUCTOR PACKAGE - The present inventions relate to methods and arrangements for using a thin foil to form electrical interconnects in an integrated circuit package. In one embodiment, a foil carrier structure is formed by ultrasonically bonding portions of a conductive foil to a metallic carrier. The bonded portions define panels in the foil carrier structure. In some embodiments, the foil carrier structure is cut to form multiple isolated panels that are sealed along their peripheries. Each isolated panel may be approximately the size of a conventional leadframe strip or panel. As a result, existing packaging equipment may be used to add dice, bonding wires and molding material to the panel. The ultrasonic welding helps prevent unwanted substances from penetrating the foil carrier structure during such processing steps. After the carrier portion of the molded foil carrier structure is removed, the structure is singulated into integrated circuit packages. Some embodiments relate to methods that utilize some or all of the aforementioned operations. Other embodiments relate to arrangements used in the above processes. | 12-10-2009 |
20090315161 | DIE ATTACH METHOD AND LEADFRAME STRUCTURE - In one aspect of the invention, a method of attaching a semiconductor die to a microarray leadframe is described. The method comprises stamping an adhesive onto discrete areas of the microarray leadframe using a multi-pronged stamp tool. The adhesive is applied to the leadframe as a series of dots, each dot corresponding to an associated prong of the stamping tool. In some embodiments the adhesive used to attach the semiconductor die to a leadframe is a black epoxy based adhesive material. In an apparatus aspect of the invention, lead traces in a microarray leadframe are arranged to have tails that extend beyond their associated contact posts on the side of the contact post that is opposite a wire bonding region such that such lead traces extends on two opposing sides of their associated contact posts. The tails do not attach to other structures within the lead frame (such as a die attach structure). The width of at least some of these tailed lead traces in a region that overlies their associated contact post is narrower than their associated contact post. Thus, these narrowed lead traces have extensions that extend beyond their associated contact posts. The extensions provide additional surface area that gives an adhesive applied to the narrowed lead trace (as for example by stamping) room to bleed (flow) along the top surface of the lead trace on both sides of the associated contact pad. | 12-24-2009 |
20100046188 | THIN FOIL SEMICONDUCTOR PACKAGE - The present invention relates to methods and arrangements for using a thin foil to form electrical interconnects in an integrated circuit package. One such arrangement involves a foil carrier structure, which includes a foil adhered to a carrier having cavities. Some methods of the present invention involve attaching dice to the foil and encapsulating the foil carrier structure in a molding material. In one embodiment, the molding material presses against the foil, which causes portions of the foil to distend into the cavities of the carrier. As a result, recessed and raised areas are formed in the foil. Afterwards, the carrier is removed and portions of the raised areas in the foil are removed through one of a variety of techniques, such as grinding. This process helps define and electrical isolate contact pads in the foil. The resulting molded foil structure may then be singulated into multiple semiconductor packages. | 02-25-2010 |
20100084748 | THIN FOIL FOR USE IN PACKAGING INTEGRATED CIRCUITS - Methods for minimizing warpage of a welded foil carrier structure used in the packaging of integrated circuits are described. Portions of a metallic foil are ultrasonically welded to a carrier to form a foil carrier structure. The ultrasonic welding helps define a panel in the metallic foil that is suitable for packaging integrated circuits. Warpage of the thin foil can be limited in various ways. By way of example, an intermittent welding pattern that extends along the edges of the panel may be formed. Slots may be cut to define sections in the foil carrier structure. Materials for the metallic foil and the carrier may be selected to have similar coefficients of thermal expansion. An appropriate thickness for the metallic foil and the carrier may be selected, such that the warpage of the welded foil carrier structure is limited when the foil carrier structure is subjected to large increases in temperature. Foil carrier structures for use in the above methods are also described. | 04-08-2010 |
20110073481 | FOIL PLATING FOR SEMICONDUCTOR PACKAGING - Arrangements for plating a single surface of a thin foil are described. In one aspect, a metal foil is wrapped tightly at least partially around a plating solution drum. The drum is partially immersed in a plating solution such that the waterline of the metal plating solution is below a break point where the metallic foil strip begins to unwind from the plating solution drum. With this arrangement, one side of the metallic foil strip is exposed to the metal plating solution, while the opposing back side of the metallic foil strip does not come in substantial contact with the metal plating solution. In this manner, the exposed side of the foil is plated while the back surface of the foil is not plated. The drum may be rotated to convey the foil through the plating solution. | 03-31-2011 |
20110074003 | FOIL BASED SEMICONDUCTOR PACKAGE - The present inventions relate to methods and arrangements for using a thin foil to form electrical interconnects in an integrated circuit package. One embodiment of the present invention involves attaching multiple dice to a foil carrier structure. The foil carrier structure is made of a thin foil that is bonded to a carrier. The dice and at least a portion of the metallic foil is then encapsulated with a molding material. The carrier is removed, leaving behind a molded foil structure. The exposed foil is patterned and etched using photolithographic techniques to define multiple device areas in the foil. Each device area includes multiple conductive lines. Afterwards, portions of the conductive lines are covered with a dielectric material and other portions are left exposed to define multiple bond pads in the device area. The molded foil structure can be singulated to form multiple integrated circuit packages. | 03-31-2011 |
Patent application number | Description | Published |
20130333747 | HIGH CURRENT BURN-IN OF SOLAR CELLS - A method of high reverse current burn-in of solar cells and a solar cell with a burned-in bypass diode are described herein. In one embodiment, high reverse current burn-in of a solar cell with a tunnel oxide layer induces low breakdown voltage in the solar cell. Soaking a solar cell at high current can also reduce the difference in voltage of defective and non-defective areas of the cell. | 12-19-2013 |
20140174497 | PACKING OF SOLAR CELL WAFERS - Solar cell wafers are fabricated, tested, and sorted into solar cell wafer stacks. A solar cell wafer stack includes a solar cell wafer with a front side that faces a front side of an adjacent solar cell wafer, and another solar cell wafer with a backside that directly contacts a backside of the solar cell wafer. A front side protector may be placed between front sides of adjacent solar cell wafers. The solar cell wafer stack includes end pieces on both ends, and is wrapped to hold and bundle the solar cell wafers, front side protectors, and end pieces together as a single unit. The solar cell wafer stack is boxed along with other solar cell wafer stacks, and then transported to another location where the solar cell wafers are assembled into solar cell modules. | 06-26-2014 |
20140174518 | ENHANCED ADHESION OF SEED LAYER FOR SOLAR CELL CONDUCTIVE CONTACT - Enhanced adhesion of seed layers for solar cell conductive contacts and methods of forming solar cell conductive contacts are described. For example, a method of fabricating a solar cell includes forming an adhesion layer above an emitter region of a substrate. A metal seed paste layer is formed on the adhesion layer. The metal seed paste layer and the adhesion layer are annealed to form a conductive layer in contact with the emitter region of the substrate. A conductive contact for the solar cell is formed from the conductive layer. | 06-26-2014 |
20150093851 | ALIGNMENT FOR METALLIZATION - Forming a metal layer on a solar cell. Forming a metal layer can include placing a patterned metal foil on the solar cell, where the patterned metal foil includes a positive busbar, a negative busbar, a positive contact finger extending from the positive busbar, a negative contact finger extending from the negative busbar, a metal strip, and one or more tabs. The positive and negative busbars and the positive and negative contact fingers can be connected to one another by the metal strip and tabs. Forming the metal layer can further include coupling the patterned metal foil to the solar cell and removing the metal strip and tabs. Removing the metal strip and tabs can separate the positive and negative busbars and contact fingers. | 04-02-2015 |
Patent application number | Description | Published |
20110188773 | Fast Depth Map Generation for 2D to 3D Conversion - A method for generating a depth map for a 2D image includes receiving the 2D image; analyzing content of the received 2D image; determining a depth map based on a result of the content analysis; refining the determined depth map using an edge-preserving and noise reducing smoothing filter; and providing the refined depth map. | 08-04-2011 |
20110188780 | 2D to 3D Image Conversion Based on Image Content - A method for converting a 2D image into a 3D image includes receiving the 2D image; analyzing content of the received 2D image; determining a 2D-to-3D image conversion method based on a result of the content analysis; generating the 3D image by applying the determined method to the received 2D image; and providing the generated 3D image. | 08-04-2011 |
20120068996 | SAFE MODE TRANSITION IN 3D CONTENT RENDERING - A method for rendering 3D content in a safe mode includes receiving images to be rendered in a 3D format, and detecting, in the received images, at least one image having a 3D content creation or conversion error that creates an uncomfortable 3D effect to a user. The method may also include transitioning to a safe mode, under which 3D enhancement is performed to the detected at least one image to avoid the uncomfortable 3D effect, and rendering the 3D enhanced image for display. | 03-22-2012 |
20120183202 | Methods and Systems for 2D to 3D Conversion from a Portrait Image - A method for converting a 2D image into a 3D image includes receiving the 2D image; determining whether the received 2D image is a portrait, wherein the portrait can be a face portrait or a non-face portrait; if the received 2D image is determined to be a portrait, creating a disparity between a left eye image and a right eye image based on a local gradient and a spatial location; generating the 3D image based on the created disparity; and outputting the generated 3D image. | 07-19-2012 |