Patent application number | Description | Published |
20080299434 | SOLID OXIDE TYPE FUEL CELL AND MANUFACTURING METHOD THEREOF - A solid oxide type fuel cell has a solid electrolyte substrate with a flat plate shape, and a cathode electrode layer is formed in a flat plate shape on one surface of the substrate and an anode electrode layer is formed in a flat plate shape on the other surface. The cathode electrode layer and the anode electrode layer are formed by the same electrode formation material. One or both of the cathode electrode layer and the anode electrode layer contain the electrode formation material and a solid electrolyte, and a concentration of the solid electrolyte included in the cathode electrode layer or the anode electrode layer increases with approach to the solid electrolyte substrate. Also, the solid oxide type fuel cell is formed by simultaneously calcining the solid electrolyte substrate, the cathode electrode layer and the anode electrode layer. | 12-04-2008 |
20090068532 | SOLID OXIDE TYPE FUEL CELL AND METHOD FOR MANUFACTURING THE SAME - The fuel cell uses a solid oxide as an electrolyte and includes a cell main body. The cell main body, which includes an anode layer, an electrolyte layer and a cathode layer, is formed on a mesh conductor according to a plasma spraying method. Atmospheres respectively in contact with the anode and cathode layers are operated according a method in which they are isolated from each other. The method for manufacturing the solid type fuel cell is characterized in that an anode composition, an electrolyte composition and a cathode composition are plasma sprayed onto the mesh conductor sequentially in this order. | 03-12-2009 |
20090072370 | MULTILAYER WIRING SUBSTRATE, METHOD OF MANUFACTURING THE SAME, AND SEMICONDUCTOR DEVICE - There is provided a multilayer wiring substrate on which at least one semiconductor element is mounted. The multilayer wiring substrate includes: a baseboard; a first wiring layer formed on the baseboard and having a plurality of first wiring portions; an insulating layer formed on the baseboard; a second wiring layer formed on the insulating layer and having a plurality of second wiring portions, the second wiring portions being electrically connected to each other via a conductor wire, the conductor wire being arranged within the insulating layer three-dimensionally in a curved manner; and conductor portions configured to pass through the insulating layer and connecting the first wiring portions and the second wiring portions. | 03-19-2009 |
20090075145 | SOLID OXIDE TYPE FUEL CELL - The solid oxide type fuel cell includes a cylindrical-shaped member S which includes an anode A on the inner surface of a cylindrical-shaped electrolyte E made of a solid oxide and a cathode on the outer surface thereof. The anode A contains an oxidation catalyst at least on the surface thereof. A fuel gas F is supplied from one end of the cylindrical-shaped member S, and a discharge gas, which is discharged from the other end of the cylindrical-shaped member S and includes uncombusted and/or incompletely combusted components, is combusted using flame combustion outside the cylindrical-shaped member S. Owing to the increased temperature of the cylindrical-shaped member S caused by the flame combustion B, the fuel gas F is combusted using catalyst combustion F within the cylindrical-shaped member S, thereby generating power. | 03-19-2009 |
20090133917 | Multilayered Circuit Board for Connection to Bumps - A circuit board on which an electronic device having bumps arranged in an array form is to be mounted includes a substrate having a multilayer structure that includes interconnect lines and insulating layers, and vias penetrating through one or more of the insulating layers and coupled to one or more of the interconnect lines, wherein the vias are arranged at positions that are the same as positions of the bumps to be connected on the substrate, and the vias project from a surface of the substrate so that upper-end portions of the vias are exposed from the surface of the substrate. | 05-28-2009 |
20090145649 | MULTI-LAYERED WIRING SUBSTRATE, METHOD FOR PRODUCING THE SAME, AND SEMICONDUCTOR DEVICE - A multi-layered wiring substrate, in which a wiring layer and an insulative layer are alternately arranged, having pads to connect to electronic components at one side thereof and wires to connect the corresponding pads to the wiring layer, is composed so that the multi-layered wiring substrate is provided with through holes in which a resin material is filled, at least a part of the pads is formed on the resin material, and at least a part of the wire is contained in the resin material. | 06-11-2009 |
20090146318 | MULTILAYER WIRING BOARD AND SEMICONDUCTOR DEVICE - A multilayer wiring board includes: a substrate; connection pads arranged in a square grid fashion; and wiring patterns. Relationship between the connection pads and the wiring patterns satisfies: {(Ndl+1)P−d−s}/(w+s)>2Ndr+Ndl(a+1)+2a, wherein P is a pitch of the connection pads, d is a diameter of the connection pads, s is a minimum interval between the wiring patterns and is a minimum interval between the wiring pattern and the connection pad that are adjacent to each other, w is a minimum width of the wiring patterns, Ndl is the number of non-pad rows in each of the non-pad regions, Ndr is the number of non-pad columns in each of non-pad region, and a is an integer of (P−d−s)/(w+s). | 06-11-2009 |
20090266598 | WIRING BOARD - A wiring board includes a plate-shaped resin member; chip connection pads provided in the resin member, the chip connection pads having connection surfaces electrically connected to electrode pads provided on a semiconductor chip, the connection surfaces being situated in substantially the same plane as a first surface of the resin member, the first surface being a side where the semiconductor chip is mounted; pads provided in a portion of the resin member, the portion being situated outside an area where the chip connection pads are formed; lead wirings connected to the pads; and conductive wires sealed by the resin member, the conductive wires electrically connecting the chip connection pads and the pads to each other. | 10-29-2009 |