Patent application number | Description | Published |
20080298468 | ERROR TAGGING FOR DECODER - Systems, devices, processors, and methods are described for tagging the reliability of received data. A frame of data is received in a digitized version of a wireless signal may be received and stored in a frame memory table. Errors within the stored portion of the frame may be searched for by accessing and processing the data from the frame memory table. In a second memory table, a memory location corresponding to a region of the first memory table may be tagged based on the search. Rows to be corrected may be identified based on the tag state for their corresponding region. | 12-04-2008 |
20080299933 | FLICKER NOISE REDUCTION - Systems, devices, and methods are described for reducing flicker noise in a wireless multimode receiver. A radio frequency signal may be tuned to a frequency offset from baseband, the tuning generating flicker noise. The tuned signal and flicker noise may be digitized. The digitized signal and flicker noise may be frequency shifted, resulting in the digitized signal being shifted to baseband. The shifted flicker noise may then be filtered, producing a digitized, baseband version of the received signal. | 12-04-2008 |
20090041159 | POWER CONTROL FOR RESPECTIVE HARDWARE ENGINES IN WIRELESS RECEIVER - Systems, methods, devices, and processors are described for a wireless receiver. The receiver may be configured to receive signals transmitted according to various mobile digital television standards. The receiver may include a number of hardware engines. The hardware engines may be individually controlled in a number of aspects. Power to particular hardware engines may be controlled, and the speed of the different hardware engines may vary. The receiver may include a novel multi-function decoder engine. The receiver may be configured to dynamically avoid problems related to harmonics, and may include a novel tap configuration with taps at different locations in the data flow. | 02-12-2009 |
20090041160 | TAPS FOR DATA FROM HARDWARE ENGINES IN A RECEIVER - Systems, methods, devices, and processors are described for a wireless receiver. The receiver may be configured to receive signals transmitted according to various mobile digital television standards. The receiver may include a number of hardware engines. The hardware engines may be individually controlled in a number of aspects. Power to particular hardware engines may be controlled, and the speed of the different hardware engines may vary. The receiver may include a novel multi-function decoder engine. The receiver may be configured to dynamically avoid problems related to harmonics, and may include a novel tap configuration with taps at different locations in the data flow. | 02-12-2009 |
20090041168 | HARMONICS AVOIDANCE - Systems, methods, devices, and processors are described for a wireless receiver. The receiver may be configured to receive signals transmitted according to various mobile digital television standards. The receiver may include a number of hardware engines. The hardware engines may be individually controlled in a number of aspects. Power to particular hardware engines may be controlled, and the speed of the different hardware engines may vary. The receiver may include a novel multi-function decoder engine. The receiver may be configured to dynamically avoid problems related to harmonics, and may include a novel tap configuration with taps at different locations in the data flow. | 02-12-2009 |
20090041171 | ACCELERATED PROCESSING IN SUBSET OF HARDWARE ENGINES IN WIRELESS RECEIVER - Systems, methods, devices, and processors are described for a wireless receiver. The receiver may be configured to receive signals transmitted according to various mobile digital television standards. The receiver may include a number of hardware engines. The hardware engines may be individually controlled in a number of aspects. Power to particular hardware engines may be controlled, and the speed of the different hardware engines may vary. The receiver may include a novel multi-function decoder engine. The receiver may be configured to dynamically avoid problems related to harmonics, and may include a novel tap configuration with taps at different locations in the data flow. | 02-12-2009 |
20090044232 | MULTI-MODE ARCHITECTURE IN WIRELESS RECEIVER - Systems, methods, devices, and processors are described for a wireless receiver. The receiver may be configured to receive signals transmitted according to various mobile digital television standards. The receiver may include a number of hardware engines. The hardware engines may be individually controlled in a number of aspects. Power to particular hardware engines may be controlled, and the speed of the different hardware engines may vary. The receiver may include a novel multi-function decoder engine. The receiver may be configured to dynamically avoid problems related to harmonics, and may include a novel tap configuration with taps at different locations in the data flow. | 02-12-2009 |
20090060093 | MULTI-FUNCTION DECODER ENGINE IN WIRELESS RECEIVER - Systems, methods, devices, and processors are described for a wireless receiver. The receiver may be configured to receive signals transmitted according to various mobile digital television standards. The receiver may include a number of hardware engines. The hardware engines may be individually controlled in a number of aspects. Power to particular hardware engines may be controlled, and the speed of the different hardware engines may vary. The receiver may include a novel multi-function decoder engine. The receiver may be configured to dynamically avoid problems related to harmonics, and may include a novel tap configuration with taps at different locations in the data flow. | 03-05-2009 |