Patent application number | Description | Published |
20080204971 | Integrated multilayer chip capacitor module and integrated circuit apparatus having the same - An integrated multilayer chip capacitor module including: plurality of multilayer chip capacitors arranged close to one another and co-planar with one another; and a capacitor support accommodating the multilayer chip capacitors, wherein each of the multilayer chip capacitors includes a rectangular parallelepiped capacitor body and a plurality of first and second external electrodes formed on at least two sides of the capacitor body, and the external electrodes on adjacent sides of adjacent ones of the multilayer chip capacitor in the capacitor support are electrically connected to each other by a conductive adhesive material. | 08-28-2008 |
20080310078 | Method of implementing low ESL and controlled ESR of multilayer capacitor - Disclosed is a method of implementing controlled equivalent series resistance (ESR) having low equivalent series inductance (ESL) of a multi-layer chip capacitor which includes a plurality of internal electrodes each having first polarity or second polarity which is opposite to the first polarity, and dielectric layers each disposed between the internal electrodes of the first polarity and the second polarity, wherein the internal electrodes having the first polarity and the internal electrodes having the second polarity are alternated at least once to form one or more blocks being stacked. | 12-18-2008 |
20090034154 | MULTILAYER CHIP CAPACITOR - A multilayer chip capacitor includes: a capacitor body; internal electrodes disposed in the capacitor body, each internal electrode having one or more lead; and external electrodes disposed on first and second side surfaces of the capacitor body to be electrically connected to the internal electrodes through the leads. The average number of leads in each internal electrode is smaller than half (½) of the total number of external electrodes. The leads of the internal electrodes having opposite polarities and adjacent in the lamination direction are disposed to be adjacent to each other as seen from the lamination direction. All the internal electrodes having the same polarity are electrically connected to each other in the capacitor. | 02-05-2009 |
20090051474 | LAMINATED INDUCTOR - There is provided a laminated inductor including: a body where a plurality of magnetic layers are laminated; a coil part formed on the magnetic layers, the coil part including a plurality of conductor patterns and a plurality of conductive vias; first and second external electrodes formed on an outer surface of the body to connect to both ends of the coil part, respectively; and a non-magnetic conductor formed on at least one of the magnetic layers so as to relax magnetic saturation caused by direct current flowing through the coil part. The laminated inductor employs the non-magnetic conductor as a non-magnetic gap to be simplified in a manufacturing process and effectively improved in DC superposition characteristics. | 02-26-2009 |
20090059469 | MULTILAYER CHIP CAPACITOR, CIRCUIT BOARD APPARATUS HAVING THE CAPACITOR, AND CIRCUIT BOARD - Provided is a multilayer chip capacitor including a capacitor body having first and second capacitor units arranged in a lamination direction; and a plurality of external electrodes formed outside the capacitor body. The first capacitor unit includes at least one pair of first and second internal electrodes disposed alternately in an inner part of the capacitor body, the second capacitor unit includes a plurality of third and fourth internal electrodes disposed alternately in an inner part of the capacitor body, and the first to fourth internal electrodes are coupled to the first to fourth external electrodes. The first capacitor unit has a lower equivalent series inductance (ESL) than the second capacitor unit, and the first capacitor unit has a higher equivalent series resistance (ESR) than the second capacitor unit. | 03-05-2009 |
20090073634 | Circuit board for mounting multilayer chip capacitor and circuit board apparatus including the multilayer chip capacitor - A circuit board including: a substrate having a mounting area for mounting a vertical multilayer chip capacitor having first and second external electrodes of a first polarity and a third external electrode of a second polarity; first to third pads arranged on the mounting area, the first and second pads having the first polarity and disposed separately from each other on the mounting area, the third pad having the second polarity and disposed between the first and second pads to be connected to the third external electrode; at least one first via formed in the substrate and connected to the first pad; at least one second via formed in the substrate and connected to the second pad; and a plurality of third vias formed in the substrate and connected to the third pad. The first via is disposed adjacent to the third pad relative to a central line of the first pad, the second via is disposed adjacent to the third pad relative to a central line of the second pad, one or more of the third vias are disposed adjacent to the first via relative to a central line of the third pad, and the rest of the third vias are disposed adjacent to the second via relative to the central line of the third pad. | 03-19-2009 |
20090086403 | MULTILAYER CAPACITOR - There is provided a multilayer capacitor including an inner connecting conductor of at least one polarity; a plurality of first and second outer electrodes formed on a surface of the body, wherein the inner connecting conductor is connected to a corresponding one of the outer electrodes having identical polarity, a corresponding one of the inner electrodes having identical polarity to the inner connecting conductor includes a plurality of groups each including at least one of the inner electrodes, wherein the inner electrodes of the respective groups are connected to the outer electrodes having identical polarity that are different from one another for each of the groups and electrically connected to the inner connecting conductor through the connected outer electrode. | 04-02-2009 |
20090086405 | MULTILAYERED CHIP CAPACITOR AND CAPACITANCE TUNNING METHOD OF THE SAME - There is provided a multilayer chip capacitor capable of tuning capacitance, including: a capacitor body where a plurality of dielectric layers are laminated; a plurality of pairs of first and second internal electrodes arranged alternately, while interposing a corresponding one of the dielectric layers; and a plurality of pairs of first and second external electrodes connected to the first and second internal electrodes, wherein the first and second internal electrodes include a plurality of groups each including at least one pair of the first and second internal electrodes, and the first and second internal electrodes of each of the groups are connected to different pairs of the first and second external electrodes, respectively, wherein a corresponding one of the pairs of the first and second external electrodes is selectively connected to power lines so that the multilayer chip capacitor has at least two different capacitances. | 04-02-2009 |
20090086406 | MULTILAYER CAPACITOR - There is provided a multilayer capacitor including: a capacitor body where a plurality of dielectric layers are laminated, the capacitor body including first and second surfaces opposing each other in a laminated direction, wherein the first surface provides a mounting surface; a plurality of first and second inner electrodes; an inner connecting conductor; and a plurality of first and second outer electrodes formed on an outer surface of the body, wherein a corresponding one of the outer electrodes having identical polarity to the inner connecting conductor includes at least one outer terminal formed on the first surface of the body to connect to the inner connecting conductor, and at least one outer connecting conductor formed on the second surface of the body to connect a corresponding one of the inner electrodes of identical polarity to the inner connecting conductor. | 04-02-2009 |
20090139757 | MULTILAYER CHIP CAPACITOR AND CIRCUIT BOARD DEVICE INCLUDING THE SAME - A multilayer chip capacitor including: a capacitor body having a lamination structure where a plurality of dielectric layers are laminated and including a first capacitor part and a second capacitor part arranged according to a lamination direction; first to fourth outer electrodes formed on side surfaces of the capacitor body, the first and third outer electrodes having the same polarity and the second and fourth outer electrodes having the same polarity opposite to that of the first outer electrode; and one or more connection conductor lines formed on an outer surface of the capacitor body and connecting the first outer electrode to the third outer electrode or connecting the second outer electrode to the fourth outer electrode. | 06-04-2009 |
20090213525 | MULTILAYER CHIP CAPACITOR - A multilayer chip capacitor includes a capacitor body including first and second longer side surfaces facing each other and first and second shorter side surfaces facing each other, first and second external electrodes respectively disposed at the first and second longer side surfaces, one or more first internal electrode pairs each including first and second internal electrodes, and one or more second internal electrode pairs each including third and fourth internal electrodes. The first to fourth internal electrodes each have one lead and are sequentially disposed in a stacked direction. The first to fourth internal electrodes have first to fourth leads respectively extending to first to fourth corners or portions adjacent thereto, and alternately connected with the first and second external electrodes. The first internal electrode pair and the second internal electrode pair cause a current to diagonally flow in opposite directions with respect to a long side direction. | 08-27-2009 |
20090244803 | MULTILAYER CHIP CAPACITOR - A multilayer chip capacitor includes a capacitor body including a first capacitor part and a second capacitor part, first and second external electrodes respectively formed on first and second longer side faces of the capacitor body, and third and fourth external electrodes respectively formed on first and second shorter side faces of the capacitor body. The first capacitor part includes first and second internal electrodes of opposite polarity, and the second capacitor part includes third and fourth internal electrodes of opposite polarity. The first to fourth internal electrodes each have one lead. The first to fourth external electrodes are respectively connected to the leads of the first to fourth internal electrodes. A series resonance frequency of the first capacitor part is different from that of the second capacitor part. Equivalent series resistance (ESR | 10-01-2009 |
20090244807 | MULTILAYER CHIP CAPACITOR, MOTHERBOARD APPARATUS HAVING THE SAME, AND POWER DISTRIBUTION NETWORK - There is provided a multilayer chip capacitor including: a capacitor body including first and second capacitor units arranged in a laminated direction; and first to fourth outer electrodes formed on side surfaces of the capacitor body, respectively, wherein the first capacitor unit includes first and second inner electrodes of different polarities alternately arranged in the capacitor body to oppose each other while interposing a corresponding one of dielectric layers, the second capacitor unit includes third and fourth inner electrodes of different polarities alternately arranged in the capacitor body to oppose each other while interposing another corresponding one of the dielectric layers, the first and second capacitor units are electrically insulated from each other, and the first capacitor unit operates in a first frequency range and the second capacitor unit operates in a second frequency range lower than the first frequency range. | 10-01-2009 |
20090279228 | MULTILAYER CHIP CAPACITOR - A multilayer chip capacitor includes a capacitor body provided by a stack of a plurality of dielectric layers, a plurality of internal electrodes disposed in the capacitor body such that the internal electrodes of opposite polarities are alternately disposed to face each other with the dielectric layer interposed between each facing set of the internal electrodes, and a plurality of external electrodes disposed on an outer face of the capacitor body and electrically connected with the internal electrode. Each of the plurality of internal electrodes includes a main electrode part, and at least one lead extending from the main electrode part to a side face of the capacitor body and connected to a corresponding one of the external electrodes. The lead extends to the corresponding external electrode to be inclined with respect to the main electrode part thereof. | 11-12-2009 |
20100032193 | ELECTRODE PAD FOR MOUNTING ELECTRONIC COMPONENT AND STRUCTURE FOR MOUNTING ELECTRONIC COMPONENT - Provided is an electrode pad for mounting an electronic component on a surface of a circuit board. The electrode pad includes first and second electrode parts facing each other, and third and fourth electrode parts facing each other. The third and fourth electrode parts are disposed adjacent to the first and second electrode parts for forming corners of the electrode pad together with the first and second electrode parts. At least one of the first to fourth electrode parts includes a chamfered surface formed by cutting a corner of the at least one of the first to fourth electrode parts forming the corner of the electrode pad. Therefore, when the electrode pad is used for mounting an electronic component, the width of an outer electrode of the electronic component can be sufficiently increased, and thus the shape or size of the outer electrode can be easily adjusted. | 02-11-2010 |
20100033897 | MULTILAYER CHIP CAPACITOR - There is provided a multilayer chip capacitor a multilayer chip capacitor including: a capacitor body including first and second capacitor units arranged therein; and first to fourth outer electrodes, wherein the first capacitor unit includes first and second inner electrodes, and the first capacitor unit includes a plurality of capacitor elements each having a pair of the first and second inner electrodes repeatedly laminated, the second capacitor unit includes third and fourth inner electrodes, and the second capacitor unit includes at least one capacitor element having a pair of the third and fourth inner electrodes repeatedly laminated, and at least one of the capacitor elements of the first capacitor unit is different from the other capacitor elements of the first capacitor unit in a lamination number of the first and second inner electrodes or a resonant frequency. | 02-11-2010 |
20100091427 | MULTILAYER CHIP CAPACITOR - A multilayer chip capacitor includes: a capacitor body having a plurality of dielectric layers laminated therein and comprising first and second capacitor units; and first to fourth external electrodes formed on an outer surface of the capacitor body, wherein the first capacitor unit comprises first and second internal electrodes facing each other with the dielectric layer interposed therebetween, connected to the first and second external electrodes, and having different polarities, each pair of first and second internal electrodes being laminated one or more times to discriminate a plurality of capacitors with a certain capacitance, the second capacitor unit comprises third and fourth internal electrodes facing each other with the dielectric layer interposed therebetween, connected to the third and fourth external electrodes, and having the same polarities as those of the first and second internal electrodes, each pair of third and fourth internal electrodes being laminated one or more times to discriminate one or more capacitors each with a certain capacitance, and at least three capacitors included in the first and second capacitor units have different capacitances or resonance frequencies. | 04-15-2010 |
20100149769 | CIRCUIT BOARD DEVICE AND INTEGRATED CIRCUIT DEVICE - A circuit board device includes a circuit board comprising a mounting area, and first and second power lines and a ground pad formed on the mounting area, and a vertical multilayer chip capacitor (MLCC) comprising a capacitor body, a plurality of first and second polarity inner electrodes, first and second outer electrodes, and a third outer electrode, wherein the first and second power lines are separately disposed on the mounting area, connected to the first and second outer electrodes, and electrically connected to each other only by the vertical MLCC, and the ground pad is disposed between the first and second power lines and connected to the third outer electrode. | 06-17-2010 |
20100238605 | MULTILAYER CHIP CAPACITOR AND METHOD OF FABRICATING THE SAME - A multilayer chip capacitor includes: a capacitor main body; a plurality of first and second inner electrodes; and m (m≧3) number of first and second outer electrodes. The plurality of first and second inner electrodes are connected with two outer electrodes positioned on both opposing surfaces and having the same polarity as that of the first and second inner electrodes, and classified into a plurality of groups depending on the locations of the outer electrodes connected to the first and second inner electrodes. At least one of two outer electrodes connected with inner electrodes of each group is different from an outer electrode connected with inner electrodes of a different group having the same polarity, and inner electrodes of one group are connected to outer electrodes connected with at least another one group so that all the inner electrodes belonging to the same polarity can be electrically connected. | 09-23-2010 |
20100254070 | MULTILAYER CHIP CAPACITOR - A multilayer chip capacitor includes: a capacitor body having first and second side surfaces and a bottom surface; a plurality of first and second internal electrodes in the capacitor body; first and second external electrodes having a first polarity and formed on the first and second side surfaces, respectively, to cover a respective lower edge of the side surfaces and to partially extend to the bottom surface; and a third external electrode having a second polarity and formed on the bottom surface. The internal electrodes are disposed in perpendicular to the bottom surface. Each of the first internal electrodes has a first lead drawn to the first side and bottom surfaces and a second lead drawn to the second side and bottom surfaces. Each of the second internal electrodes has a third lead drawn to the bottom surface. | 10-07-2010 |
20110013341 | MULTILAYER CHIP CAPACITOR - Disclosed is a multilayer chip capacitor including a capacitor body including a plurality of dielectric layers that are stacked, first and second outer electrodes of opposite polarity disposed on an outer face of the capacitor body, first and second inner electrodes opposing each other inside the capacitor body to interpose the dielectric layer therebetween, the first inner electrode comprising an electrode plate forming capacitance and a lead extending from the electrode plate and connected to the first outer electrode, and the second inner electrode comprising an electrode plate forming capacitance and a lead extending from the electrode plate and connected to the second outer electrode. The leads are bent at least once and each have an overlap portion overlapping a lead of an adjacent inner electrode of opposite or like polarity when viewed along a stacked direction in which the plurality of dielectric layers are stacked. | 01-20-2011 |
20110056735 | MULTILAYER CHIP CAPACITOR AND CIRCUIT BOARD DEVICE - There are provided a multilayer chip capacitor and a circuit board device. The multilayer chip capacitor includes a capacitor body including a plurality of dielectric layers that are stacked, first and second outer electrodes formed on an outer surface of the capacitor body and having opposite polarity, first and second inner electrodes opposing each other, interleaved with the dielectric layers in the capacitor body, and each including an electrode plate forming capacitance and a lead extending from the electrode plate, the lead of the first inner electrode and the lead of the second electrode being respectively connected to the first and second outer electrodes, and third inner electrodes interposed between the first and second inner electrodes. At least one of the third inner electrodes adjacent to the first inner electrode includes a conductive pattern having the same shape as the lead of the first inner electrode and is connected to the first outer electrode. At least one of the third inner electrodes adjacent to the second inner electrode includes a conductive pattern having the same shape as the lead of the second inner electrode and is connected to the second outer electrode. | 03-10-2011 |
20110085277 | MULTILAYER CHIP CAPACITOR - A multilayer chip capacitor includes a capacitor body, a plurality of internal electrodes, and a plurality of external electrodes. The capacitor body is formed of a ceramic sintered product and has first and second side surfaces facing each other. The plurality of internal electrodes each of which has two leads extending to the first and second side surfaces of the capacitor body, respectively, are arranged such that the internal electrodes with one polarity and the internal electrodes with the other polarity are alternately stacked inside the capacitor body. The plurality of external electrodes are formed on the first and second side surfaces of the capacitor body along a stacked direction of the internal electrodes such that the external electrodes with one polarity and the external electrodes with the other polarity are alternately arranged on each of the first and second side surfaces, and are connected to the leads. | 04-14-2011 |
20110309895 | MULTILAYER FILTER - A multilayer filter includes: a ceramic body in which a plurality of dielectric layers are laminated; an external ground electrode provided on an outer surface of the ceramic body and connected to a ground; an inductor pattern electrode provided on at least one of the dielectric layers and having one end connected to the external ground electrode; a capacitor pattern electrode provided on at least one of the dielectric layers; an external terminal electrode electrically connecting the inductor pattern electrode to the capacitor pattern electrode and forming a closed loop for generating inductance through the external ground electrode; and a variable dielectric layer provided between the capacitor pattern electrode and the inductor pattern electrode and adjusting a magnitude of inductance generated by the inductor pattern electrode. | 12-22-2011 |
20110317327 | Multi-layered ceramic capacitor - There is provided a multi-layered ceramic capacitor with reduced internal resistance by forming internal electrode groups including internal electrodes having different lengths. The multi-layered ceramic capacitor of the present invention includes a sintered ceramic body part in which cover layers are provided on both surfaces thereof as an outermost layer and a plurality of ceramic layers are stacked therebetween, first and second external electrodes each formed on an outer surface of the sintered ceramic body part, a plurality of first and second internal electrode groups adjacent to each other in a stacking direction of the plurality of ceramic layers, having the ceramic layer therebetween, and including 2N or 2N+1 (N is an integer number larger than 1) internal electrodes electrically connected to the first and second external electrodes, wherein the 2N or 2N+1 (N is an integer number larger than 1) internal electrodes are disposed to face at least one internal electrode of other adjacent internal electrode groups. A length of each internal electrode has a pyramid shape. | 12-29-2011 |
20120092090 | COUPLING STRUCTURE FOR MULTI-LAYERED CHIP FILTER, AND MULTI-LAYERED CHIP FILTER WITH THE STRUCTURE - Disclosed herein are a coupling structure for a multi-layered chip filter capable of overcoming a limitation of an existing coupling by improving a coupling structure and a multi-layered chip filter with the structure. | 04-19-2012 |
20120152604 | MOUNTING STRUCTURE OF CIRCUIT BOARD HAVING THEREON MULTI-LAYERED CERAMIC CAPACITOR, METHOD THEREOF, LAND PATTERN OF CIRCUIT BOARD FOR THE SAME, PACKING UNIT FOR MULTI-LAYERED CERAMIC CAPACITOR TAPED HORIZONTALLY AND ALIGNING METHOD THEREOF - The present invention provides a method of mounting a circuit board having thereon a multi-layered ceramic capacitor and a land pattern of a circuit board for the same. The method of mounting a circuit board having thereon a multi-layered ceramic capacitor on which a plurality of dielectric sheet having internal electrodes formed thereon are stacked and the external terminal electrodes connected to the internal electrodes in parallel are formed on both ends thereof includes conductively connecting lands of a circuit board to the external terminal electrodes in such a way that internal electrode layers of the multi-layered ceramic capacitor and the circuit board are arranged in a horizontal direction, wherein a height T | 06-21-2012 |
20120268875 | MOUNTING STRUCTURE OF CIRCUIT BOARD HAVING THEREON MULTI-LAYERED CERAMIC CAPACITOR, METHOD THEREOF, LAND PATTERN OF CIRCUIT BOARD FOR THE SAME, PACKING UNIT FOR MULTI-LAYERED CERAMIC CAPACITOR TAPED HORIZONTALLY AND ALIGNING METHOD THEREOF - A packing unit for a plurality of multi-layered ceramic capacitors including: a plurality of multi-layered ceramic capacitors having a thickness T | 10-25-2012 |
20120275081 | MULTI-LAYERED CAPACITOR AND MANUFACTURING METHOD THEREOF - A multi-layered capacitor includes a capacitor element in which a plurality of dielectric layers are multi-layered, and which comprises a first inner electrode and a second inner electrode that are alternately formed on neighboring dielectric layers of the plurality of dielectric layers, a first external electrode and a second external electrode which are formed on an outside surface of the capacitor element to be electrically connected to the first inner electrode and the second inner electrode, respectively, and a deformation suppressing electrode which is formed on the outside surface of the capacitor element and separated from the first external electrode and the second external electrode to be electrically isolated from the first inner electrode and the second inner electrode. | 11-01-2012 |
20120298407 | MOUNTING STRUCTURE OF CIRCUIT BOARD HAVING MULTI-LAYERED CERAMIC CAPACITOR THEREON - Disclosed herein is a mounting structure of a circuit board having a multi-layered ceramic capacitor thereon. The mounting structure of a circuit board having a multi-layered ceramic capacitor thereon, in which a dielectric layer on which inner electrodes are disposed is stacked and external electrode terminals connecting the inner electrodes in parallel are disposed on both ends thereof, wherein the inner electrodes of the multi-layered ceramic capacitor and the circuit board are disposed so as to be a horizontal direction to connect the external electrode terminals with a land on the circuit board by a conductive material and a ratio of a bonding area A | 11-29-2012 |
20120327556 | MULTILAYER CERAMIC CAPACITOR - There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA | 12-27-2012 |
20130094119 | MULTILAYER CERAMIC CAPACITOR - There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA | 04-18-2013 |
20130155574 | MULTILAYER CERAMIC ELECTRONIC COMPONENT - A multilayer ceramic electronic component having high reliability by reducing equivalent series resistance (ESR) dispersion is provided. Connectivity between internal electrodes and external electrodes is secured by introducing dummy electrodes connected to first and second terminal electrodes, to third and fourth internal electrode layers. ESR dispersion of the multilayer ceramic electronic component is reduced to obtain high reliability. | 06-20-2013 |