Patent application number | Description | Published |
20080204926 | Techniques For Identifying Servo Sectors In Storage Devices - Techniques are provided for identifying the servo sectors in a track on a data storage device. A data storage device identifies the servo sectors in a track by reading distributed index bits from multiple servo sectors in a track. The data storage device analyzes only one index bit from each servo sector to identify the index of a track. In some embodiments, the index of a track can be identified after examining the index bits stored in a particular number of consecutive servo sectors, even in the presence of errors. The index bits in each track can have an error tolerance with a minimum Hamming distance greater than one. In other embodiments, a data storage device compares a sliding window of the index bits read from the servo sectors to all possible N-bit vectors that exist within a pattern of the index bits stored on a track. | 08-28-2008 |
20090006930 | Techniques For Generating Bit Reliability Information In The Post Processor - A detector generates a detected sequence, and a post processor generates probability values that indicate the likelihood of a plurality of error events in the detected sequence. The post processor partitions the values into first and second subsets. The post processor selects a first most likely value from the first subset of the values and a second most likely value from the second subset of the values. The post processor generates a bit reliability based on the first and the second most likely values. | 01-01-2009 |
20090006931 | Techniques For Generating Bit Reliability Information In A Post-Processor Using An Error Correction Constraint - Techniques are provided that generate bit reliabilities for a detected sequence. A detector generates the detected sequence. According to one embodiment, a post-processor finds a first set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the first bit value, finds a second set of combinations of one or more error events in the detected sequence satisfying a complete set or a subset of error correction constraints corresponding to the second bit value, selects a first most likely combination of one or more events of the first set and a second most likely combination of one or more events of the second set, and generates a bit reliability based on the first and the second most likely values. | 01-01-2009 |
20090168227 | Distributed track identifier on a hard disk drive - A magnetic disk for a hard disk drive comprising a distributed track identifier is described. The disk includes a first portion of a track identifier physically located at a first location on a disk sector and a second portion of the track identifier physically located at a second location on the disk sector wherein the first portion and the second portion of the track identifier are discontinuous on the sector. | 07-02-2009 |
20100050053 | ERROR CONTROL IN A FLASH MEMORY DEVICE - Flash memory devices and associated methods are described for controlling data errors in the devices through various forms of decoding, error correction, and wear concentration. To this end, a flash memory device may be partitioned into a plurality of sectors. Data may then be received from, for example, a host processor for storage within the flash memory device. Storage durations of the data are then estimated and the data is stored in the data sectors based on those estimated storage durations. | 02-25-2010 |
20100172048 | Servo patterns for patterned media - Servo patterns for patterned media. The servo pattern includes specification of cylinder/track ID with and without a Gray code. The servo pattern space is minimized by the optimum usage of the islands. This is achieved by island allocation rules to take advantage of non-magnetic island. The island allocation also provides for easier lift-off. Logic is used to encode and decode the Gray code. Further, the Gray code is designed to stabilize the magnetic island/non-magnetic island ratio to allow for easier manufacture. | 07-08-2010 |
20110035634 | STORAGE DEVICE WITH ADAPTIVE ERROR-CORRECTING CODE FOR IMPROVED AREAL EFFICIENCY - A method for adaptively applying an error-correcting code to a storage device is disclosed. A determination is made that a system is in an idle state of input/output requests. First data symbols are copied into a first location within a buffer. First data symbol errors corrected using a first error-correcting code. Second data symbols including corrected bits are written in a second location on the recording media with a second error-correcting code. An error number for the second data symbols in the second location is determined. If the error number is below a first threshold error number, the first data symbols are deleted. If the error number is above the first threshold error number, the second data symbols are deleted. | 02-10-2011 |
20120221920 | MULTIPLE ERASURE CORRECTING CODES FOR STORAGE ARRAYS - Embodiments of the invention relate to erasure correcting codes for storage arrays. An aspect of the invention includes receiving a read stripe from a plurality of storage devices. The read stripe includes a block of pages arranged in rows and columns, with each column corresponding to one of the storage devices. The pages include data pages and parity pages, with the number of parity pages at least one more than the number of rows and not a multiple of the number of rows. The method further includes reconstructing at least one erased page in response to determining that the read stripe includes the at least one erased page and that the number of erased pages is less than or equal to the number of parity pages. The reconstructing is responsive to a multiple erasure correcting code and to the block of pages. The reconstructing results in a recovered read stripe. | 08-30-2012 |
20120221926 | Nested Multiple Erasure Correcting Codes for Storage Arrays - Embodiments of the invention relate to storing data in a storage array. An aspect of the invention includes receiving write data. The write data is arranged into “r” rows and “n” columns of pages, with each page including a plurality of sectors. The write data is encoded using a plurality of horizontal and vertical erasure correcting codes on the pages. The encoding allows recovery from up to t | 08-30-2012 |
20120331367 | Nested Multiple Erasure Correcting Codes for Storage Arrays - Embodiments of the invention relate to storing data in a storage array. An aspect of the invention includes receiving write data. The write data is arranged into “r” rows and “n” columns of pages, with each page including a plurality of sectors. The write data is encoded using a plurality of horizontal and vertical erasure correcting codes on the pages. The encoding allows recovery from up to t | 12-27-2012 |
20130205168 | PARTIAL-MAXIMUM DISTANCE SEPARABLE (PMDS) ERASURE CORRECTING CODES FOR STORAGE ARRAYS - Embodiments of the invention relate to correcting erasures in a storage array. A read stripe is received from a plurality of n storage devices. The read stripe includes an array of entries arranged in m rows and n columns with each column corresponding to one of the storage devices. The entries include data entries and mr+s parity entries. Each row contains at least r parity entries generated from the data entries according to a partial maximum distance separable (PMDS) code. It is determined that the read stripe includes at least one erased entry, at most mr+s erased entries and that no row has more than r+s erased entries. The erased entries are reconstructed from the non-erased entries, resulting in a recovered read stripe. | 08-08-2013 |
20130205181 | PARTIAL-MAXIMUM DISTANCE SEPARABLE (PMDS) ERASURE CORRECTING CODES FOR STORAGE ARRAYS - Embodiments of the invention relate to storing data in a storage array. An aspect of the invention includes receiving and arranging read data in array that includes m rows and n columns of entries, with each entry including at least one sector. In the array, mr+s locations are assigned to parity entries, such that each row has at least r parity entries. The parity entries correspond to a partial-maximum distance separable (PMDS) code that allows recovery from up to r erasures in each of the m rows as well as s additional erasures in any locations in the data array, where s is an integer greater than zero. The write data and the associated parity entries are written to the set of storage devices. | 08-08-2013 |
20140108881 | BLOCK-INTERLEAVED AND ERROR CORRECTION CODE (ECC)-ENCODED SUB DATA SET (SDS) FORMAT - In one embodiment, a system for encoding data includes logic adapted for receiving data having one or more sub data sets, a C1 encoder module adapted for generating a plurality of C1 codewords during C1 ECC encoding of the one or more sub data sets, logic adapted for interleaving the plurality of C1 codewords into C1 codeword interleaves (CWIs), each CWI having a predetermined number of C1 codewords interleaved therein, a C2 encoder module adapted for generating a plurality of C2 codewords during C2 ECC encoding of the one or more sub data sets, wherein each C2 codeword has at most one symbol from each C1 codeword in each CWI, and wherein each C2 codeword has one symbol from at least two different C1 codewords in each CWI, and logic adapted for writing the one or more encoded sub data sets to a storage medium. | 04-17-2014 |