Patent application number | Description | Published |
20080293229 | Semiconductor device and manufacturing method of the same - An object of the present invention is to simplify manufacturing process of an n channel MIS transistor and a p channel MIS transistor with gate electrodes formed of a metal material. For its achievement, gate electrodes of each of the n channel MIS transistor and the p channel MIS transistor are simultaneously formed by patterning ruthenium film deposited on a gate insulator. Next, by introducing oxygen into each of the gate electrodes, the gate electrodes are transformed into those having high work function. Thereafter, by selectively reducing the gate electrode of the n channel MIS transistor, it is transformed into a gate electrode having low work function. | 11-27-2008 |
20090020824 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME - A complementary semiconductor device comprising an n-channel transistor and a p-channel transistor, including: the n-channel transistor including a gate insulating film and a first metal gate electrode formed on the gate insulating film and having a first compound layer including a first metal (M | 01-22-2009 |
20100279496 | MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE - To improve productivity and performance of a CMISFET including a high-dielectric-constant gate insulating film and a metal gate electrode. An Hf-containing insulating film for a gate insulating film is formed over the main surface of a semiconductor substrate. A metal nitride film is formed on the insulating film. The metal nitride film in an nMIS formation region where an n-channel MISFET is to be formed is selectively removed by wet etching using a photoresist pattern on the metal nitride films a mask. Then, a threshold adjustment film containing a rare-earth element is formed. The Hf-containing insulating film in the nMIS formation region reacts with the threshold adjustment film by heat treatment. The Hf-containing insulating film in a pMIS formation region where a p-channel MISFET is to be formed does not react with the threshold adjustment film because of the existence of the metal nitride film. Then, after removing the unreacted threshold adjustment film and the metal nitride film, metal gate electrodes are formed in the nMIS formation region and the pMIS formation region. | 11-04-2010 |
Patent application number | Description | Published |
20100320542 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - To improve the performance of a CMISFET having a high-k gate insulating film and a metal gate electrode. An n-channel MISFET has, over the surface of a p-type well of a semiconductor substrate, a gate electrode formed via a first Hf-containing insulating film serving as a gate insulating film, while a p-channel MISFET has, over the surface of an n-type well, another gate electrode formed via a second Hf-containing insulating film serving as a gate insulating film. These gate electrodes have a stack structure of a metal film and a silicon film thereover. The first Hf-containing insulating film is an insulating material film comprised of Hf, a rare earth element, Si, O, and N or comprised of Hf, a rare earth element, Si, and O, while the second Hf-containing insulating film is an insulating material film comprised of Hf, Al, O, and N or comprised of Hf, Al, and O. | 12-23-2010 |
20110284971 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - There are provided a semiconductor device in which the threshold voltage of a p-channel field effect transistor is reliably controlled to allow a desired characteristic to be obtained, and a manufacturing method thereof. As a heat treatment performed at a temperature of about 700 to 900° C. proceeds, in an element formation region, aluminum (Al) in an aluminum (Al) film is diffused into a hafnium oxynitride (HfON) film, and thereby added as an element to the hafnium oxynitride (HfON) film. In addition, aluminum (Al) and titanium (Ti) in a hard mask formed of a titanium aluminum nitride (TiAlN) film are diffused into the hafnium oxynitride (HfON) film, and thereby added as elements to the hafnium oxynitride (HfON) film. | 11-24-2011 |
20120045876 | METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE - There is provided a technology capable of preventing the increase in threshold voltages of n channel type MISFETs and p channel type MISFETs in a semiconductor device including CMISFETs having high dielectric constant gate insulation films and metal gate electrodes. When a rare earth element or aluminum is introduced into a Hf-containing insulation film which is a high dielectric constant gate insulation film for the purpose of adjusting the threshold value of the CMISFET, a threshold adjustment layer including a lanthanum film scarcely containing oxygen, and a threshold adjustment layer including an aluminum film scarcely containing oxygen are formed over the Hf-containing insulation film in an nMIS formation region and a pMIS formation region, respectively. This prevents oxygen from being diffused from the threshold adjustment layers into the Hf-containing insulation film and the main surface of a semiconductor substrate. | 02-23-2012 |
20120056268 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - There is provided a technology capable of achieving, in a semiconductor device having a MISFET using an insulating film containing hafnium as a gate insulating film, an improvement in the reliability of a MISFET. In the present invention, the gate insulating film of an n-channel core transistor is provided with a structure different from that of the gate insulating film of a p-channel core transistor. Specifically, in the n-channel core transistor, as the gate insulating film thereof, a laminate film of a silicon oxide film and a HfZrSiON film is used. On the other hand, in the p-channel core transistor, as the gate insulating film thereof, a laminate film of a silicon oxide film and a HfSiON film is used. | 03-08-2012 |
20120208346 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A polysilazane film is formed over the main surface of a semiconductor substrate in such a manner that the upper surface level of the polysilazane film buried in a trench of 0.2 μm or less in width becomes higher than that of a pad insulating film and the upper surface level of the polysilazane film buried in a trench of 1.0 μm or more in width becomes lower than that of the pad insulating film. Then, heat treatment is conducted at 300° C. or more to convert the polysilazane film into a first buried film made of silicon oxide (SiO | 08-16-2012 |
20120252180 | MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE - There is a problem with a CMIS semiconductor integrated circuit using a High-k Gate insulation film that, in a device region having a short channel length and a narrow channel width, with an increase of the film thickness of an Interfacial Layer IL between the High-k Gate insulation film and a silicon-based substrate by activation annealing of source/drain regions, the absolute value of the threshold voltage increases. | 10-04-2012 |
20150060991 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - The performance of a semiconductor device having a memory element is improved. An insulating film, which is a gate insulating film for a memory element, is formed on a semiconductor substrate, and a gate electrode for the memory element is formed on the insulating film. The insulating film has a first insulating film, a second insulating film thereon, and a third insulating film thereon. The second insulating film is a high-dielectric constant insulator film having a charge accumulating function and contains hafnium, silicon, and oxygen. Each of the first insulating film and the third insulating film has a band gap larger than the band gap of the second insulating film. | 03-05-2015 |
20150340479 | SEMICONDUCTOR DEVICE - The present invention makes it possible, in a manufacturing process of a semiconductor device, to inhibit: impurities from diffusing from a substrate to a semiconductor layer; and the withstand voltage of a transistor from deteriorating. | 11-26-2015 |