Patent application number | Description | Published |
20080292798 | BORON NITRIDE AND BORON NITRIDE-DERIVED MATERIALS DEPOSITION METHOD - Methods for forming boron-containing films are provided. The methods include introducing a boron-containing precursor and a nitrogen or oxygen-containing precursor into a chamber and forming a boron nitride or boron oxide film on a substrate in the chamber. In one aspect, the method includes depositing a boron-containing film and then exposing the boron-containing film to the nitrogen-containing or oxygen-containing precursor to incorporate nitrogen or oxygen into the film. The deposition of the boron-containing film and exposure of the film to the precursor may be performed for multiple cycles to obtain a desired thickness of the film. In another aspect, the method includes reacting the boron-containing precursor and the nitrogen-containing or oxygen-containing precursor to chemically vapor deposit the boron nitride or boron oxide film. | 11-27-2008 |
20090017640 | BORON DERIVED MATERIALS DEPOSITION METHOD - Methods of forming boron-containing films are provided. The methods include introducing a boron-containing precursor into a chamber and depositing a network comprising boron-boron bonds on a substrate by thermal decomposition or a plasma process. The network may be post-treated to remove hydrogen from the network and increase the stress of the resulting boron-containing film. The boron-containing films have a stress between about −10 GPa and 10 GPa and may be used as boron source layers or as strain-inducing layers. | 01-15-2009 |
20090093100 | METHOD FOR FORMING AN AIR GAP IN MULTILEVEL INTERCONNECT STRUCTURE - The present invention generally provides a method for forming multilevel interconnect structures, including multilevel interconnect structures that include an air gap. One embodiment provides a method for forming conductive lines in a semiconductor structure comprising forming trenches in a first dielectric layer, wherein air gaps are to be formed in the first dielectric layer, depositing a conformal dielectric barrier film in the trenches, wherein the conformal dielectric barrier film comprises a low k dielectric material configured to serve as a barrier against a wet etching chemistry used in forming the air gaps in the first dielectric layer, depositing a metallic diffusion barrier film over the conformal low k dielectric layer, and depositing a conductive material to fill the trenches. | 04-09-2009 |
20090093112 | METHODS AND APPARATUS OF CREATING AIRGAP IN DIELECTRIC LAYERS FOR THE REDUCTION OF RC DELAY - A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches. | 04-09-2009 |
20090104764 | Methods and Systems for Forming at Least One Dielectric Layer - A method for forming a structure includes forming at least one feature across a surface of a substrate. A nitrogen-containing dielectric layer is formed over the at least one feature. A first portion of the nitrogen-containing layer on at least one sidewall of the at least one feature is removed at a first rate and a second portion of the nitrogen-containing layer over the substrate adjacent to a bottom region of the at least one feature is removed at a second rate. The first rate is greater than the second rate. A dielectric layer is formed over the nitrogen-containing dielectric layer. | 04-23-2009 |
20090263972 | BORON NITRIDE AND BORON-NITRIDE DERIVED MATERIALS DEPOSITION METHOD - A method and apparatus are provided to form spacer materials adjacent substrate structures. In one embodiment, a method is provided for processing a substrate including placing a substrate having a substrate structure adjacent a substrate surface in a deposition chamber, depositing a spacer layer on the substrate structure and substrate surface, and etching the spacer layer to expose the substrate structure and a portion of the substrate surface, wherein the spacer layer is disposed adjacent the substrate structure. The spacer layer may comprise a boron nitride material. The spacer layer may comprise a base spacer layer and a liner layer, and the spacer layer may be etched in a two-step etching process. | 10-22-2009 |
20090286402 | METHOD FOR CRITICAL DIMENSION SHRINK USING CONFORMAL PECVD FILMS - A method and apparatus for forming narrow vias in a substrate is provided. A pattern recess is etched into a substrate by conventional lithography. A thin conformal layer is formed over the surface of the substrate, including the sidewalls and bottom of the pattern recess. The thickness of the conformal layer reduces the effective width of the pattern recess. The conformal layer is removed from the bottom of the pattern recess by anisotropic etching to expose the substrate beneath. The substrate is then etched using the conformal layer covering the sidewalls of the pattern recess as a mask. The conformal layer is then removed using a wet etchant. | 11-19-2009 |
20100048030 | METHOD TO IMPROVE THE STEP COVERAGE AND PATTERN LOADING FOR DIELECTRIC FILMS - A method of forming a layer on a substrate in a chamber, wherein the substrate has at least one formed feature across its surface, is provided. The method includes exposing the substrate to a silicon-containing precursor in the presence of a plasma to deposit a layer, treating the deposited layer with a plasma, and repeating the exposing and treating until a desired thickness of the layer is obtained. The plasma may be generated from an oxygen-containing gas. | 02-25-2010 |
20100096687 | NON-VOLATILE MEMORY HAVING SILICON NITRIDE CHARGE TRAP LAYER - A flash memory device and methods of forming a flash memory device are provided. The flash memory device includes a doped silicon nitride layer having a dopant comprising carbon, boron or oxygen. The doped silicon nitride layer generates a higher number and higher concentration of nitrogen and silicon dangling bonds in the layer and provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device. | 04-22-2010 |
20100096688 | NON-VOLATILE MEMORY HAVING CHARGE TRAP LAYER WITH COMPOSITIONAL GRADIENT - A flash memory device and method of forming a flash memory device are provided. The flash memory device includes a silicon nitride layer having a compositional gradient in which the ratio of silicon to nitrogen varies through the thickness of the layer. The silicon nitride layer having a compositional gradient of silicon and nitrogen provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device. | 04-22-2010 |
20100098884 | BORON FILM INTERFACE ENGINEERING - Methods of depositing boron-containing liner layers on substrates involve the formation of a bilayer including an initiation layer which includes barrier material to inhibit the diffusion of boron from the bilayer into the underlying substrate. | 04-22-2010 |
20100099236 | GAPFILL IMPROVEMENT WITH LOW ETCH RATE DIELECTRIC LINERS - A method of filling a trench is described and includes depositing a dielectric liner with a high ratio of silicon oxide to dielectric liner etch rate in fluorine-containing etch chemistries. Silicon oxide is deposited within the trench and etched to reopen or widen a gap near the top of the trench. The dielectric liner protects the underlying substrate during the etch process so the gap can be made wider. Silicon oxide is deposited within the trench again to substantially fill the trench. | 04-22-2010 |
20100099247 | FLASH MEMORY WITH TREATED CHARGE TRAP LAYER - A methods of forming a flash memory device are provided. The flash memory device comprises a silicon dioxide layer on a substrate and a silicon nitride layer that is formed on the silicon dioxide layer. The properties of the silicon nitride layer can be modified by any of: exposing the silicon nitride layer to ultraviolet radiation, exposing the silicon nitride layer to an electron beam, and by plasma treating the silicon nitride layer. A dielectric material is deposited on the silicon nitride layer and a conductive date is formed over the dielectric material. The flash memory device with modified silicon nitride layer provides an increase in charge holding capacity and charge retention time of the unit cell of a non-volatile memory device. | 04-22-2010 |
20100233633 | ENGINEERING BORON-RICH FILMS FOR LITHOGRAPHIC MASK APPLICATIONS - Methods for processing a substrate with a boron rich film are provided. A patterned layer of boron rich material is deposited on a substrate and can be used as an etch stop. By varying the chemical composition, the selectivity and etch rate of the boron rich material can be optimized for different etch chemistries. The boron rich materials can be deposited over a layer stack substrate in multiple layers and etched in a pattern. The exposed layer stack can then be etched with multiple etch chemistries. Each of the boron rich layers can have a different chemical composition that is optimized for the multiple etch chemistries. | 09-16-2010 |
20110104891 | METHODS AND APPARATUS OF CREATING AIRGAP IN DIELECTRIC LAYERS FOR THE REDUCTION OF RC DELAY - A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches. | 05-05-2011 |
20110315992 | PLASMA-ENHANCED CHEMICAL VAPOR DEPOSITION OF CRYSTALLINE GERMANIUM - In a method of depositing a crystalline germanium layer on a substrate, a substrate is placed in the process zone comprising a pair of process electrodes. In a deposition stage, a crystalline germanium layer is deposited on the substrate by introducing a deposition gas comprising a germanium-containing gas into the process zone, and forming a capacitively coupled plasma of the deposition gas by coupling energy to the process electrodes. In a subsequent treatment stage, the deposited crystalline germanium layer is treated by exposing the crystalline germanium layer to an energized treatment gas or by annealing the layer. | 12-29-2011 |
20120196450 | METHOD TO INCREASE SILICON NITRIDE TENSILE STRESS USING NITROGEN PLASMA IN-SITU TREATMENT AND EX-SITU UV CURE - Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with some embodiments, a deposited silicon nitride film is exposed to curing with plasma and ultraviolet (UV) radiation, thereby helping remove hydrogen from the film and increasing film stress. In accordance with other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle. | 08-02-2012 |
20120196452 | METHOD TO INCREASE TENSILE STRESS OF SILICON NITRIDE FILMS USING A POST PECVD DEPOSITION UV CURE - High tensile stress in a deposited layer, such as a silicon nitride layer, may be achieved utilizing one or more techniques employed either alone or in combination. In one embodiment, a silicon nitride film having high tensile stress may be formed by depositing the silicon nitride film in the presence of a porogen. The deposited silicon nitride film may be exposed to at least one treatment selected from a plasma or ultraviolet radiation to liberate the porogen. The silicon nitride film may be densified such that a pore resulting from liberation of the porogen is reduced in size, and Si—N bonds in the silicon nitride film are strained to impart a tensile stress in the silicon nitride film. In another embodiment, tensile stress in a silicon nitride film may be enhanced by depositing a silicon nitride film in the presence of a nitrogen-containing plasma at a temperature of less than about 400° C., and exposing the deposited silicon nitride film to ultraviolet radiation. | 08-02-2012 |
20120289049 | COPPER OXIDE REMOVAL TECHNIQUES - A method for the removal of copper oxide from a copper and dielectric containing structure of a semiconductor chip is provided. The copper and dielectric containing structure may be planarized by chemical mechanical planarization (CMP) and treated by the method to remove copper oxide and CMP residues. Annealing in a hydrogen (H | 11-15-2012 |
20130183835 | LOW TEMPERATURE PLASMA ENHANCED CHEMICAL VAPOR DEPOSITION OF CONFORMAL SILICON CARBON NITRIDE AND SILICON NITRIDE FILMS - Methods and apparatus for forming conformal silicon nitride films at low temperatures on a substrate are provided. The methods of forming a silicon nitride layer include performing a deposition cycle including flowing a processing gas mixture into a processing chamber having a substrate therein, wherein the processing gas mixture comprises precursor gas molecules having labile silicon to nitrogen, silicon to carbon, or nitrogen to carbon bonds, activating the precursor gas at a temperature between about 20° C. to about 480° C. by preferentially breaking labile bonds to provide one or more reaction sites along a precursor gas molecule, forming a precursor material layer on the substrate, wherein the activated precursor gas molecules bond with a surface on the substrate at the one or more reaction sites, and performing a plasma treatment process on the precursor material layer to form a conformal silicon nitride layer. | 07-18-2013 |
20130189841 | ENGINEERING DIELECTRIC FILMS FOR CMP STOP - A method for forming an integrated circuit is provided. In one embodiment, the method includes forming a stop layer comprising carbon doped silicon nitride on a gate region on a substrate, the gate region having a poly gate and one or more spacers formed adjacent the poly gate, forming a dielectric layer on the stop layer, and removing a portion of the dielectric layer above the gate region using a CMP process, wherein the stop layer is a strain inducing layer having a CMP removal rate that is less than the CMP removal rate of the dielectric layer and equal to or less than the CMP removal rate of the one or more spacers. | 07-25-2013 |
20140023794 | Method And Apparatus For Low Temperature ALD Deposition - Provided are methods and apparatus for low temperature atomic layer deposition of a densified film. A low temperature film is formed and densified by exposure to one or more of a plasma or radical species. The resulting densified film has superior properties to low temperature films formed without densification. | 01-23-2014 |
20140273438 | CU/BARRIER INTERFACE ENHANCEMENT - Embodiments of the present invention provide processes to selectively form a metal layer on a conductive surface, followed by flowing a silicon based compound over the metal layer to form a metal silicide layer. In one embodiment, a substrate having a conductive surface and a dielectric surface is provided. A metal layer is then deposited on the conductive surface. A metal silicide layer is formed as a result of flowing a silicon based compound over the metal layer. A dielectric is formed over the metal silicide layer. | 09-18-2014 |
20140273516 | VBD AND TDDB IMPROVEMENT THRU INTERFACE ENGINEERING - Methods for the repair of damaged low k films are provided. In one embodiment, the method comprises providing a substrate having a low k dielectric film deposited thereon, and exposing a surface of the low k dielectric film to an activated carbon-containing precursor gas to form a conformal carbon-containing film on the surface of the low k dielectric film, wherein the carbon-containing precursor gas has at least one or more Si—N—Si linkages in the molecular structure. | 09-18-2014 |
20140273524 | Plasma Doping Of Silicon-Containing Films - Provided are methods for the deposition and doping of films comprising Si. Certain methods involve depositing a SiN, SiO, SiON, SiC or SiCN film and doping the Si-containing film with one or more of C, B, O, N and Ge by a plasma implantation process. Such doped Si-containing films may have improved properties such as reduced etch rate in acid-based clean solutions, reduced dielectric constant and/or improved dielectric strength. | 09-18-2014 |
20140273529 | PEALD of Films Comprising Silicon Nitride - Provided are methods of for deposition of SiN films via PEALD processes. Certain methods pertain to exposing a substrate surface to a silicon precursor to provide a silicon precursor at the substrate surface; purging excess silicon precursor; exposing the substrate surface to an ionized reducing agent; and purging excess ionized reducing agent to provide a film comprising SiN, wherein the substrate has a temperature of 23° C. to about 550° C. | 09-18-2014 |
20140273530 | Post-Deposition Treatment Methods For Silicon Nitride - Provided are methods post deposition treatment of films comprising SiN. Certain methods pertain to providing a film comprising SiN; and exposing the film to an inductively coupled plasma, capacitively coupled plasma or a microwave plasma to provide a treated film with a modulated film stress and/or wet etch rate in dilute HF. Certain other methods comprise depositing a PEALD SiN film followed by exposure to a plasma nitridation process or a UV treatment to provide a treated film. | 09-18-2014 |