Shi, TX
Danling Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20090106682 | METHOD AND APPARATUS FOR SELECTING HARDWARE COMPONENTS USING A POINTING DEVICE - The illustrative embodiments described herein provide an apparatus and method for selecting hardware components of a computing device. In response to detecting a position of a pointing device, the process identifies a hardware component in a plurality of hardware components associated with the position. The process outputs a signal identifying the hardware component in response to identifying the hardware component. The signal distinguishes the hardware component from other hardware components in the plurality of hardware components. The process executes a function associated with the hardware component in response to receiving a selection of the hardware component from the pointing device. | 04-23-2009 |
20090119682 | RECOVERING RESOURCE CONNECTIONS - Illustrative embodiments provide a computer implemented method, data processing system, and computer program product for recovering resource connections using persistent subscriptions. In one illustrative embodiment, the method comprises subscribing to an event of a predefined resource to create a persistent subscription, wherein upon receiving notification of the event indicating the predefined resource is unavailable, and responsive to receiving the notification, reconnecting to the predefined resource. The method further comprises creating a new listener for receiving event notifications from the predefined resource, obtaining subscription information related to the predefined resource from the persistent subscription, and re-subscribing to the event of the predefined resource. | 05-07-2009 |
20090125874 | METHOD AND SYSTEM FOR CREATING PROJECTS IN A RATIONAL APPLICATION DEVELOPER WORKSPACE - System for automatically creating a current project in an application developer workspace. In response to reading a project file for the current project, it is automatically determined whether the current project has one or more dependent projects based on data contained within the project file. In response to determining that the current project does have one or more dependent projects, a build file is automatically generated for each of the one or more dependent projects. The build file calls importing targets within each of the one or more dependent projects. Then, the current project and the one or more dependent projects are automatically imported into the application developer workspace to form a created current project. The created current project is created without launching an application developer application. In addition, the created current project is stored in a source code control repository. | 05-14-2009 |
Fuqiang Shi, Allen, TX US
Patent application number | Description | Published |
---|---|---|
20090070568 | Computation parallelization in software reconfigurable all digital phase lock loop - A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU includes an instruction set whose instructions are optimized to perform the atomic operations of a PLL. A multi-stage data stream based processor incorporates a parallel/pipelined architecture optimized to perform data stream processing efficiently. The multi-stage parallel/pipelined processor provides significantly higher processing speeds by combining multiple RCUs wherein input data samples are input in parallel to all RCUs while computation results from one RCU are used by adjacent downstream RCUs. A register file provides storage for historical values while local storage in each RCU provides storage for temporary results. | 03-12-2009 |
20090262877 | Computation spreading utilizing dithering for spur reduction in a digital phase lock loop - A novel and useful apparatus for and method of spur reduction using computation spreading with dithering in a digital phase locked loop (DPLL) architecture. A software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU is adapted to spread the computation of the atomic operations out over a PLL reference clock period wherein each computation is performed at a much higher processor clock frequency than the PLL reference clock rate. This significantly reduces the per cycle current transient generated by the computations. The frequency content of the current transients is at the higher processor clock frequency which results in a significant reduction in spurs within sensitive portions of the output spectrum. Further reduction in spurs is achieved by dithering the duration of the software loop of atomic operations and/or by randomly shuffling one or more non-data dependent instructions within each iteration of the software loop. | 10-22-2009 |
20130080495 | SOFTWARE RECONFIGURABLE DIGITAL PHASE LOCK LOOP ARCHITECTURE - A novel and useful apparatus for and method of software based phase locked loop (PLL). The software based PLL incorporates a reconfigurable calculation unit (RCU) that is optimized and programmed to sequentially perform all the atomic operations of a PLL or any other desired task in a time sharing manner. An application specific instruction-set processor (ASIP) incorporating the RCU includes an instruction set whose instructions are optimized to perform the atomic operations of a PLL. The RCU is clocked at a fast enough processor clock rate to insure that all PLL atomic operations are performed within a single PLL reference clock cycle. | 03-28-2013 |
Genbao Shi, Sugar Land, TX US
Patent application number | Description | Published |
---|---|---|
20090091573 | Systems and methods for computing a variogram model - Systems and methods for computing a variogram model, which utilize a variogram map and a rose diagram to compute the model. | 04-09-2009 |
20100121622 | Systems and Methods for Computing and Validating a Variogram Model - Systems and methods for computing a variogram model, which utilize a variogram map and a rose diagram to compute the variogram model. The variogram model may be validated in real-time to provide immediate feedback without the need to interpolate or simulate the real data. | 05-13-2010 |
20110316883 | Systems and Methods for Computing a Variogram Model - Systems and methods for computing a variogram model, which utilize a variogram map and a rose diagram to compute the model. | 12-29-2011 |
20130138412 | Systems and Methods for Creating a Surface in a Faulted Space - Systems and methods for creating a surface in a faulted space, which includes using interpolation techniques. | 05-30-2013 |
20130158962 | Systems and Methods for Computing a Default 3D Variogram Model - Systems and methods for computing a variogram model, which utilize a vertical experimental variogram and a horizontal experimental variogram to calculate a 3D default variogram model. | 06-20-2013 |
20140032118 | STRATIGRAPHIC MODELING USING PRODUCTION DATA DENSITY PROFILES - The present disclosure describes systems and methods for performing stratigraphic modeling using production data density profiles. At least some illustrative embodiments include a production logging tool data processing method that includes measuring one or more characteristics of a formation within a borehole, of fluids within the formation or of fluids within the borehole, calculating a density profile of each of the one or more characteristics, and defining a boundary between two reservoir simulation cells based at least in part upon the density profile. The method further includes performing a simulation of a production field including the borehole using said simulation cells and presenting the simulation results to a user. | 01-30-2014 |
20150032431 | Systems and Methods for Assisted Property Modeling - Systems and methods for updating a property map during conditional simulation or unconditional simulation using interactive azimuth guidelines, well data and/or variogram parameters. | 01-29-2015 |
20150285950 | Systems and Methods for Selecting Facies Model Realizations - Systems and methods for selecting facies model realizations based on the cumulative distribution function of facies net volumes. | 10-08-2015 |
20160116636 | GLOBAL GRID BUILDING IN REVERSE FAULTED AREAS BY AN OPTIMIZED UNFAULTING METHOD - A method to generate a global grid may include storing at least one data structure representing a plurality of fault blocks associated with one or more faults in a geographic formation; selecting two fault blocks associated with a fault of the one or more faults; changing the position of a first of the two fault blocks in the at least one data structure representative of a shift of the first fault block towards the other fault block of the two fault blocks to position the center of gravity of a fault boundary of the first fault block with the center of gravity of a fault boundary of the other fault block; aligning the first fault block with the other fault block according to a permitted level of conflict between fault blocks; and updating the at least one data structure to indicate a merging of the two selected fault blocks. | 04-28-2016 |
Genbao Shi, Sugarland, TX US
Patent application number | Description | Published |
---|---|---|
20160139298 | Reservoir History Matching - Systems and methods for reservoir history matching based on closed loop interaction between a geomodel and a reservoir model. | 05-19-2016 |
Heping Shi, Carrollton, TX US
Patent application number | Description | Published |
---|---|---|
20100130129 | WLAN and bluetooth harmonization - Described is a WLAN/BT system with improved compatibility. It employs an adaptive algorithm that dynamically optimizes the WLAN data fragmentation size based on the current WLAN data rates such that the fragmented data packets fit the time slots allowed by the BT SCO stream gaps. The algorithm first uses system level information to acquire the concurrent BT traffic types to decide if TDM method needs to be enabled. Then it uses the smoothed WLAN date rate to calculate maximum fragmentation packet size consistent with current overall WLAN traffic. | 05-27-2010 |
Heping Shi, Dallas, TX US
Patent application number | Description | Published |
---|---|---|
20150343056 | PHARMACEUTICAL TARGETING OF A MAMMALIAN CYCLIC DI-NUCLEOTIDE SIGNALING PATHWAY - Cyclic-GMP-AMP synthase (cGAS) and cyclic-GMP-AMP (cGAMP), including 2′3-cGAMP, 2′2-cGAMP, 3′2′-cGAMP and 3′3′-GAMP, are used in pharmaceutical formulations (including vaccine adjuvants), drug screens, therapies and diagnostics. | 12-03-2015 |
Huajun Shi, Irving, TX US
Patent application number | Description | Published |
---|---|---|
20110225619 | AUTOMATIC DETECTION AND REMOTE REPAIR OF A TELEVISION SYSTEM CONDITION - A server device is configured to store quick code information, where the quick code information includes a particular operation of a group of operations and a particular condition code of a group of condition codes; receive diagnostic information from a video client, of a group of video clients, where the diagnostic information includes a condition code that corresponds to a condition associated with the video client; determine that the condition code matches the particular condition code of particular, stored quick code information; determine, from the particular quick code information, the particular operation corresponding to the particular condition code; perform an automatic remote repair to remedy the condition, on the video client, based on the particular operation; and send, to the video client, a notification that the condition has been remedied based on the automatic remote repair when the automatic remote repair remedies the condition on the video client. | 09-15-2011 |
Jiang Shi, Plano, TX US
Patent application number | Description | Published |
---|---|---|
20090066303 | VOLTAGE REGULATOR WITH TESTABLE THRESHOLDS - A system and method for determining over-voltage and under-voltage thresholds in a voltage regulator are disclosed herein. A voltage regulator includes an over-voltage detector and an under-voltage detector that determine whether the voltage regulator's regulated output voltage is above or below predetermined over-voltage and under-voltage thresholds respectively. The over-voltage detector connects to an output port that provides a signal indicating that the regulated voltage output is greater than the predetermined over-voltage threshold and not lower than the predetermined under-voltage threshold. The under-voltage detector connects to an output port that provides a signal indicating that the regulated voltage output is lower than the predetermined under-voltage threshold and not greater than the predetermined over-voltage threshold. The voltage regulator also includes an input port that provides a test signal for testing the voltage levels of the over-voltage threshold and the under-voltage threshold. | 03-12-2009 |
Jianing Shi, Houston, TX US
Patent application number | Description | Published |
---|---|---|
20130188856 | SYSTEMS AND METHODS FOR REAL-TIME TARGET VALIDATION FOR IMAGE-GUIDED RADIATION THERAPY - Systems and methods for real-time target validation during radiation treatment therapy based on real-time target displacement and radiation dosimetry measurements. | 07-25-2013 |
Jianing V. Shi, Houston, TX US
Patent application number | Description | Published |
---|---|---|
20140029824 | METHODS AND SYSTEMS FOR VIDEO COMPRESSIVE SENSING FOR DYNAMIC IMAGING - A compressive sensing system for dynamic video acquisition. The system includes a video signal interface including a compressive imager configured to acquire compressive sensed video frame data from an object, a video processing unit including a processor and memory. The video processing unit is configured to receive the compressive sensed video frame data from the video signal interface. The memory comprises computer readable instructions that when executed by the processor cause the processor to generate a motion estimate from the compressive sensed video frame data and generate dynamical video frame data from the motion estimate and the compressive sensed video frame data. The dynamical video frame data may be output. | 01-30-2014 |
Jibin Shi, Spring, TX US
Patent application number | Description | Published |
---|---|---|
20110192652 | COMPOSITE CUTTER SUBSTRATE TO MITIGATE RESIDUAL STRESS - A method of forming a cutting element that includes filling at least one non-planar region on an upper surface of a carbide substrate with a diamond mixture, subjecting the substrate and the diamond mixture to high pressure high temperature sintering conditions to form a reduced-CTE substrate having polycrystalline diamond that extends a depth into the reduced-CTE substrate in an interface region, and an upper surface made of a composite surface of diamond and carbide, and attaching a polycrystalline diamond body to the composite surface of the reduced-CTE substrate is disclosed. | 08-11-2011 |
20120273280 | POLYCRYSTALLINE DIAMOND COMPACT CUTTERS WITH CONIC SHAPED END - A cutting element may have a substrate; and an ultrahard material layer having a substantially planar upper surface disposed on an upper surface of the substrate; wherein at least a portion of the side surface between the upper surface of the substrate and a lower end of the substrate form at least one conic surface, wherein the at least one conic surface extends a height relative to the total height of the substrate and ultrahard material layer ranging from about 1:10 to 9:10, and wherein the substrate comprises a substantially planar lower surface. The cutting elements may also be rotatable cutting elements at least partially surrounded by outer support elements. | 11-01-2012 |
20130015000 | INNOVATIVE CUTTING ELEMENT AND CUTTING STRUCTURE USING SAME - A cutting tool is disclosed that includes a tool body, a plurality of cutting element support structures extending from the tool body, at least one slot formed in at least one of the cutting element support structures, a cutting element having a diamond shearing element with a plurality of surfaces, and at least one mechanical retention mechanism adjacent to the cutting element. Each cutting element support structure has a leading face, a top side, and a trailing face, and the slot has two side surfaces, each side surface terminating at the leading face and top side of the cutting element support structure. Each surface of the cutting element has two dimensional values, wherein the cutting element is positioned in the at least one slot such that a plane in which the shortest dimensional value lies intersects the slot side surfaces. | 01-17-2013 |
20130168159 | SOLID PCD CUTTER - A method of forming a cutting element may include placing a plurality of diamond particles adjacent to a substrate in a reaction cell; and subjecting the plurality of diamond particles to high pressure high temperature conditions to form a polycrystalline diamond body; wherein the polycrystalline diamond body comprises a cutting face area to thickness ratio ranging from 60:16 to 500:5; and wherein the polycrystalline diamond body has at least one dimension greater than 8 mm | 07-04-2013 |
20130333953 | CUTTING ELEMENTS RETAINED WITHIN SLEEVES - A cutter assembly may include a sleeve; and at least one cutting element having a lower spindle portion retained in the sleeve and a portion of the cutting element interfacing an axial bearing surface of the sleeve, wherein an outer diameter D of the cutting element and a radial length T of a substantially planar portion of the axial bearing surface of the sleeve have the following relationship: | 12-19-2013 |
20140054094 | ROLLING CUTTER WITH CLOSE LOOP RETAINING RING - A cutting element is disclosed that includes a sleeve, a rotatable cutting element, and at least one retaining ring. The sleeve has a first inner diameter and a second inner diameter, wherein the second inner diameter is larger than the first inner diameter and located at a lower axial position than the first inner diameter. The rotatable cutting element has an axis of rotation extending therethrough, a cutting face, a body extending axially downward from the cutting face, wherein the body has a shaft that is disposed within the sleeve, and a circumferential groove formed around an outer surface of the shaft. The at least one retaining ring is disposed in the circumferential groove and extends at least around the entire circumference of the shaft, wherein the at least one retaining ring protrudes from the circumferential groove, thereby retaining the rotatable cutting element within the sleeve. | 02-27-2014 |
20140131118 | METHOD OF USING SPRING LOADED BLOCKER TO RETAIN ROLLING CUTTERS OR MECHANICAL LOCK CUTTERS - A cutting element assembly may include a sleeve; an inner cutting element in the sleeve; and a blocker retained in the sleeve with at least one locking device and covering a portion of a cutting face of the inner cutting element. Cutting tools may include a tool body; a plurality of blades extending radially from the tool body, each blade comprising a leading face and a trailing face; a plurality of cutter pockets on the plurality of blades; at least one cutting element in one of the cutter pockets; and at least one blocker positioned adjacent to a cutting face of the at least one cutting element and the leading face of the blade, the blocker being retained to the cutter pocket with at least one locking device. | 05-15-2014 |
20140174834 | ROLLING CUTTER WITH BOTTOM SUPPORT - A cutting element assembly includes a sleeve, a lining extending a distance axially from an end of the sleeve, and an inner cutter. The inner cutter has a cutting end, wherein the cutting end extends a depth from a cutting face, a side surface, and a body, wherein the body is at least partially disposed within the sleeve, and wherein the side surface of the cutting end interfaces with an interfacing surface of the lining. | 06-26-2014 |
20140326515 | ROTATING CUTTING ELEMENTS FOR PDC BITS - A drill bit has a bit body, a plurality of blades extending radially from the bit body, at least one rolling cutter pocket disposed on the plurality of blades, and at least one rolling cutter, wherein each rolling cutter is disposed in one of the rolling cutter pockets, and wherein a side surface of the rolling cutter pocket and an outer circumferential surface of the rolling cutter have at least one mating lip and channel formed therein. Further, the rolling cutter may include a cavity extending at least partially along a rotational axis through the rolling cutter, from a bottom surface of the rolling cutter, and a retention pin disposed within the cavity. | 11-06-2014 |
20140360792 | SPLIT SLEEVES FOR ROLLING CUTTERS - A cutter assembly may include a multi-piece split sleeve, an inner cutting element having a groove or protrusion formed in a side surface thereof and disposed in the multi-piece split sleeve, and at least one component interfacing at least a portion of the groove or the protrusion to limit axial movement of the inner cutting element with respect to the multi-piece split sleeve, in which the multiple pieces of the split sleeve are joined together at an overlapping joint. | 12-11-2014 |
Justin Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20090237054 | Digital Control of Power Converters - A system and method for controlling a power converter is presented. An embodiment comprises an analog differential circuit connected to an analog-to-digital converter, and comparing the digital error signal to at least a first threshold value. If the digital error signal is less than the first threshold value, a pulse is generated to control the power converter. Another embodiment includes multiple thresholds that may be compared against the digital error signal. | 09-24-2009 |
20090237959 | Digital Control of Power Converters - A system and method for controlling a power converter is presented. An embodiment comprises an analog differential circuit connected to an analog-to-digital converter, a digital pulse generator, and a pre-driver to control the power converter. Another embodiment also includes a digital filter as part of the control loop that may be used to control the loop characteristics of the control circuit. Yet another embodiment replaces the differential circuit with a sigma-delta analog-to-digital modulator and a decimator. | 09-24-2009 |
20090237966 | DIGITAL CONTROL OF POWER CONVERTERS - A system and method for controlling a power converter is presented. An embodiment comprises an analog differential circuit connected to an analog-to-digital converter, and comparing the digital error signal to at least a first threshold value. If the digital error signal is less than the first threshold value, a pulse is generated to control the power converter. Another embodiment includes multiple thresholds that may be compared against the digital error signal. | 09-24-2009 |
20100045376 | CLASS D AMPLIFIER CONTROL CIRCUIT AND METHOD - Circuit and method for a Class D amplifier. In one exemplary embodiment, an audio amplifier is disclosed. A closed loop configuration for driving high and low side driver transistors is provided, each circuit is compatible with advanced sub micron semiconductor processes. The analog time varying input is coupled to one input of a sigma delta analog to digital converter. A feedback signal from the output is also input to the analog to digital converter. A bit stream is output by the analog to digital converter. A decimator receives this bit stream and downconverts the samples to digital values at a lower frequency. A digital filter with adaptable coefficients is used to filter that signal and a digital pulse width modulator then develops an analog differential PWM signal. A predriver inputs the PWM signal and derives the output gating signals to control the high and low side drivers of a Class D amplifier. | 02-25-2010 |
20100259239 | REGULATOR CONTROL CIRCUITS, SWITCHING REGULATORS, SYSTEMS, AND METHODS FOR OPERATING SWITCHING REGULATORS - A regulator control circuit includes a high side driver that is configured to receive a supply voltage. A capacitor is configured to store charges. A first transistor is coupled between the capacitor at a first node and a gate of a high side driver at a second node. The first node is capable of being boosted to a voltage to operate the first transistor at a saturation mode for a charge sharing between the first node and the second node so as to substantially turn on the high side driver. | 10-14-2010 |
20110006844 | Class D Amplifier Control Circuit and Method - Circuit and method for a Class D amplifier. In one exemplary embodiment, an audio amplifier is disclosed. A closed loop configuration for driving high and low side driver transistors is provided, each circuit is compatible with advanced sub micron semiconductor processes. The analog time varying input is coupled to one input of a sigma delta analog to digital converter. A feedback signal from the output is also input to the analog to digital converter. A bit stream is output by the analog to digital converter. A decimator receives this bit stream and downconverts the samples to digital values at a lower frequency. A digital filter with adaptable coefficients is used to filter that signal and a digital pulse width modulator then develops an analog differential PWM signal. A predriver inputs the PWM signal and derives the output gating signals to control the high and low side drivers of a Class D amplifier. | 01-13-2011 |
20110089916 | LDO REGULATORS FOR INTEGRATED APPLICATIONS - Embodiments of the invention are related to LDO regulators. In an embodiment, an amplifier drives the gate of a master source follower and of at least one slave source follower to form an LDO regulator. In an alternative embodiment, a charge pump drives the master source follower to form the regulator. Additional slave source followers may be used in conjunction with the charge pump and the master source follower to improve the regulator performance. Other embodiments are also disclosed. | 04-21-2011 |
20110187566 | NOISE SHAPING FOR DIGITAL PULSE-WIDTH MODULATORS - A noise shaper that compares an input signal to a feedback output signal, which is a truncated version of the input signal, and generates the difference between the two signals (i.e., the error). The noise shaper then integrates the errors by adding to the error multiple of its delayed versions, and quantizes the integrated errors in such a way that the spectrum of the quantization noise is shaped toward high frequencies to be removed by a LC low-pass filter used in conjunction with the noise shaper. The low frequency content of the desired signal is mostly unaffected. | 08-04-2011 |
20130009795 | NOISE SHAPING FOR DIGITAL PULSE-WIDTH MODULATORS - A circuit including an analog-to-digital converter (ADC). The ADC is configured to receive an analog feedback signal and an analog input signal and generate a digital output. The circuit further includes a noise shaper. The noise shaper is configured to truncate the digital output and generate a noise shaper output having a lower number of bits than the digital output, and to shape quantization noise generated during truncation. The circuit further includes a pulse width modulation digital-to-analog converter (PWM DAC). The PWM DAC configured to process the truncated digital output of the noise shaper output and generate a PWM DAC output. | 01-10-2013 |
20150229324 | NOISE SHAPING FOR DIGITAL PULSE-WIDTH MODULATORS - A circuit includes an analog-to-digital converter (ADC). The ADC is configured to receive an analog feedback signal and an analog input signal and generate a digital output. The circuit further includes a digital filter configured to filter the digital output and a noise shaper. The noise shaper is configured to truncate the filtered digital output and generate a noise shaper output, and to shape quantization noise generated during truncation. The circuit further includes a pulse width modulation digital-to-analog converter (PWM DAC) configured to process the truncated digital output of the noise shaper output and generate a PWM DAC output. | 08-13-2015 |
Kun Shi, Richardson, TX US
Patent application number | Description | Published |
---|---|---|
20110216851 | ROBUST TRANSMIT/FEEDBACK ALIGNMENT - Performing digital predistortion (DPD) for widely spaced narrowband signals, such as the signal used in multi-carrier GSM, can be very difficult. Here, a system is provided the performs DPD for widely spaced narrowband signals. In particular, this system uses a polynomial curve for values of a cross-correlation function (above a predetermined threshold) to determine a delay estimate, which allows for a more robust and accurate system. | 09-08-2011 |
20120212358 | PIPELINED ADC INTER-STAGE ERROR CALIBRATION - An analog-to-digital converter (ADC) is provided. The ADC includes a plurality of pipelined ADCs and an adjustment circuit. Each pipelined ADC is adapted to receive an analog input signal, has an adjustable transfer function, and includes a compensator. The adjustment circuit is coupled to each pipelined ADC to be able to adjust the transfer function for each pipelined ADC so as to generally eliminate an estimation ambiguity. Additionally, the adjustment circuit estimates an inter-stage error that includes at least one of an inter-stage gain error and a DAC gain error and adjusts the compensator for each pipelined ADC to compensate for the inter-stage error. | 08-23-2012 |
20120286981 | COMPRESSIVE SENSING ANALOG-TO-DIGITAL CONVERTERS - Compressive sensing is an emerging field that attempts to prevent the losses associated with data compression and improve efficiency overall, and compressive sensing looks to perform the compression before or during capture, before energy is wasted. Here, several analog-to-digital converter (ADC) architectures are provided to perform compressive sensing. Each of these new architectures selects resolutions for each sample substantially at random and adjusts the sampling rate as a function of these selected resolutions. | 11-15-2012 |
Kun Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20140159931 | METHOD AND APPARATUS FOR ANALOG TO DIGITAL CONVERSION - An analog to digital converter receives an analog input signal. The analog input signal is converted into a digital output signal. The converting includes shaping quantization noise in response to: a signal-to-noise ratio of the analog input signal; and a power of the converter. | 06-12-2014 |
Kun Shi, Dallas, TX US
Patent application number | Description | Published |
---|---|---|
20130040593 | METHOD TO DETERMINE RF CIRCUIT ANTENNA IMPEDANCE - A process of estimating an admittance of an RF component using a ladder network with alternating series and parallel components by making three VSWR measurements and computing three admittance circle solutions in the complex admittance plane. The admittances circles are transformed through reference planes of the ladder network to obtain three RF component admittance circles, then estimating the RF component admittance using three nearest intersections of the three RF component admittance circles. Reference planes are defined immediately upstream and immediately downstream of each component of the ladder network. The transforms are performed using lumped parameter models of the series and parallel components of the ladder network. | 02-14-2013 |
Li Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20100117764 | Assisted selective growth of highly dense and vertically aligned carbon nanotubes - The selective growth of vertically aligned, highly dense carbon nanotube (CNT) arrays using a thermal catalytic chemical vapor deposition (CCVD) method via selection of the supporting layer where the thin catalyst layer is deposited on. A thin iron (Fe) catalyst deposited on a supporting layer of tantalum (Ta) yielded CCVD growth of the vertical dense CNT arrays. Cross-sectional transmission electron microscopy revealed a Vollmer-Weber mode of Fe island growth on Ta, with a small contact angle of the islands controlled by the relative surface energies of the supporting layer, the catalyst and their interface. The as-formed Fe island morphology promoted surface diffusion of carbon atoms seeding the growth of the CNTs from the catalyst surface. | 05-13-2010 |
Meng Shi, Katy, TX US
Patent application number | Description | Published |
---|---|---|
20130173014 | Combined Space Maintenance and Bone Regeneration System for the Reconstruction of Large Osseous Defects - Systems, methods and compositions useful for treatment of traumatic bone injuries are provided. In one embodiment, a bone reconstruction system comprising a space maintaining composition comprising porous polymethylmethacrylate; and an osseous generating construct comprising a polymethylmethacrylate chamber that comprises one or more osseous generating materials is provided. Associated compositions and methods are also provided. | 07-04-2013 |
20150081034 | COMBINED SPACE MAINTENANCE AND BONE REGENERATION SYSTEM FOR THE RECONSTRUCTION OF LARGE OSSEOUS DEFECTS - Systems, methods and compositions useful for treatment of traumatic bone injuries are provided. In one embodiment, a bone reconstruction system comprising a space maintaining composition comprising porous polymethylmethacrylate; and an osseous generating construct comprising a polymethylmethacrylate chamber that comprises one or more osseous generating materials is provided. Associated compositions and methods are also provided. | 03-19-2015 |
Shaoping Shi, Houston, TX US
Patent application number | Description | Published |
---|---|---|
20100288474 | METHOD AND SYSTEM FOR SEALING AN ANNULUS - A method and systems for a purged seal for an annular space are provided. The purged seal includes a first baffle element that extends from an inner surface of the annular space into the annular space at an oblique angle and a second baffle element that extends from an outer surface of the annular space above the first baffle element in a direction opposite gravity flow into the annular space wherein the second baffle element extends at an oblique angle. The system also includes a third baffle element that extends from the inner surface above the first baffle element in a direction of gravity flow into the annular space wherein the third baffle element extends into the annular space at an oblique angle with respect to the inner surface and wherein a distal end of the third baffle element is positioned proximate a distal end of the second baffle element. | 11-18-2010 |
20130040255 | SYSTEM FOR GASIFICATION FUEL INJECTION - A system includes a gasification fuel injector, which includes a first fuel conduit configured to inject a first fuel flow from a first fuel tip, a second fuel conduit configured to inject a second fuel flow from a second fuel tip, a first gas conduit configured to inject a first gas flow from a first gas tip, a second gas conduit configured to inject a second gas flow from a second gas tip, and a third gas conduit configured to inject a third gas flow from a third gas tip. At least one of the first fuel tip, the second fuel tip, the first gas tip, the second gas tip, or the third gas tip is recessed a distance away from an outlet of the gasification fuel injector. The first and second fuel conduits and the first, second, and third gas conduits are coaxial with one another. | 02-14-2013 |
Shaoping Shi, Bellaire, TX US
Patent application number | Description | Published |
---|---|---|
20140127089 | GASIFIER PREHEATER FUEL SYSTEM AND METHODS OF ASSEMBLING SAME - Gasifier preheater fuel and moderator injection apparatus, systems and methods are provided. A preheater distributor ring is securely mounted within the shell dome of a gasification vessel, for the selective discharge of preheat fuel and oxidizer into the vessel during preheating operations, or for the selective discharge of moderating agents into the vessel during normal gasification operations. | 05-08-2014 |
Shaw-Ben Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20110191375 | DATA ACCESS METHOD AND CONFIGURATION MANAGEMENT DATABASE SYSTEM - A computer implemented method for accessing data begins with receipt of a data access request. In response to determining that the requested data needs to be acquired in real time from an original data source, the processor acquires and stores that data. In response to determining that the data cannot be acquired in real time from the data source, the processor acquires the data from a configuration management database in which the requested data was previously stored. | 08-04-2011 |
20110295559 | MAINTENANCE OF INTELLIGENT ASSETS - A work performance acquisition module of an intelligent assets maintenance system obtains work performance data of intelligent assets from a device operation production control system. A status monitoring module obtains operation status data of the intelligent assets. A loss calculation module calculates a loss degree of the intelligent assets according to the obtained work performance and operation status data. A maintenance determining module determines whether the intelligent assets need maintenance according to the loss degree of the intelligent assets. | 12-01-2011 |
20130086585 | Managing the Persistent Data of a Pre-Installed Application in an Elastic Virtual Machine Instance - A method and apparatus for managing the persistent data of a pre-installed application in an elastic virtual machine instance is disclosed, the method comprising: in response to installing an application into a master virtual machine image, obtaining a persistent data point of a function component of the application, the persistent data point comprising a file directory for storing the persistent data of the function component; in response to launching an elastic virtual machine instance from the master virtual machine, creating a storage volume, attaching the storage volume to the elastic virtual machine instance, and mounting the storage volume to the file directory based on the persistent data point. Other features and aspects may be realized, depending upon the particular application. | 04-04-2013 |
Shaw-Ben S. Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20090300077 | Method of Recording and Backtracking Business Information Model Changes - A method, system and computer-usable medium are disclosed for managing the evolution of a data model through the application of change statements. Each change statement comprises a change operator operable to perform change operations on the elements of a target data model. The change statements are appended to a data model change stack. Execution of the change statements stored in the data model change stack results in change operations being performed on the target data model. Each change statement is associated with a version ID and a timestamp which identify the scope of the data model version and time instance of the change. | 12-03-2009 |
Shaw-Ben Shepherd Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20100306274 | Extending Configuration Management Databases Using Generic Datatypes - A computer implemented method, data processing system, and computer program product for allowing users with minimal database skills to produce efficient, extended configuration management databases. Input is received from a user to extend a configuration management database, wherein the input includes a generic data type. The generic data type is mapped to a database data type of the configuration management database. An SQL statement is then generated to create the database data type in the configuration management database. Responsive to a successful execution of the SQL statement, the tables in the configuration management database are updated with the database data type to reduce a number of tables created for the database data type. | 12-02-2010 |
Sheldon Q. Shi, Denton, TX US
Patent application number | Description | Published |
---|---|---|
20140264143 | POROSITIZATION PROCESS OF CARBON OR CARBONACEOUS MATERIALS - Porositized/activated carbon processed from carbon or carbonaceous raw materials. The porositization process comprises: (1) loading porositizing agents; (2) thermal treatment; and (3) porous generation. In another embodiment, the porositization process comprises: (1) loading porositizing agents; and (2) thermal treatment wherein the carbon or carbonaceous materials undergo carbonization and self-activation during the thermal treatment. Activated carbon products that exhibit magnetic functionality. | 09-18-2014 |
Suzanne Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20080288598 | METHOD TO MANAGE DISK USAGE BASED ON USER SPECIFIED CONDITIONS - A method, system, and computer program product are provided for managing email disk usage based on user specified conditions. An incoming email for a user is scanned for email expressions. A determination is made as to whether one of the email expressions matches one of a number of listed expressions forming a matched expression. Responsive to a presence of a matched expression, a determination is made as to whether a first threshold associated with the matched expression is met or exceeded. Responsive to the first threshold being met or exceeded, a notification is sent to the user of the first threshold being met. | 11-20-2008 |
20090113239 | METHOD AND APPARATUS FOR INSTRUCTION TRACE REGISTERS - A computer implemented method, apparatus, and computer usable program product for utilizing instruction trace registers. In one embodiment, a value in a target processor register in a plurality of processor registers is updated in response to executing an instruction associated with program code. In response to updating the value in the target processor register, an address for the instruction is copied from an instruction address register into an instruction trace register associated with the target processor register. The instruction trace register holds the address of the instruction that updated the value stored in the target processor register. | 04-30-2009 |
20090248809 | Instant Message Session Transfers - A method facilitates instant message (IM) session transfer of messages intended for an IM user to a new IM session being established by the user. Existing IM sessions may be queried for active IM sessions when the user is connecting to an instant message service. If there is an active session for the user, the IM server will request the content and sender of active messages waiting for the user, and transfer this information to the new IM session being established for the user. In this way, the user does not “miss” IM message(s) intended for him or her while going between existing, active IM sessions and new IM sessions. As used herein, session or sessions refer to IM session or IM sessions. | 10-01-2009 |
20120265833 | Managing Email Disk Usage Based on User Specified Conditions - A method, system, and computer program product are provided for managing email disk usage based on user specified conditions. An incoming email for a user is scanned for email expressions. A determination is made as to whether one of the email expressions matches one of a number of listed expressions forming a matched expression. Responsive to a presence of a matched expression, a determination is made as to whether a first threshold associated with the matched expression is met or exceeded. Responsive to the first threshold being met or exceeded, a notification is sent to the user of the first threshold being met. | 10-18-2012 |
Weidong Shi, Pearland, TX US
Patent application number | Description | Published |
---|---|---|
20130055254 | METHODS AND APPARATUSES FOR PROVIDING A VIRTUAL MACHINE WITH DYNAMIC ASSIGNMENT OF A PHYSICAL HARDWARE RESOURCE - Methods and apparatuses are provided for providing a virtual machine with dynamic direct assignment of a physical hardware resource. A method may include providing a virtual machine with a directly assigned physical hardware resource and an emulated hardware resource corresponding to the directly assigned physical hardware resource. The method may further include causing the virtual machine to hot-swap from using the directly assigned physical hardware resource to using the emulated hardware resource. The method may additionally include, subsequent to causing the virtual machine to hot-swap to using the emulated hardware resource, causing the directly assigned physical hardware resource to be hot-removed from the virtual machine Corresponding apparatuses are also provided. | 02-28-2013 |
20130072260 | METHODS AND APPARATUSES FOR FACILITATING SHARING DEVICE CONNECTIONS - Methods and apparatuses are provided for facilitating sharing device connections across multiple physical and/or virtual (logical) computers. A method may include receiving a USB device request from a virtual host controller driver of a client when a host is not in a power save mode and passing a USB device request to a host controller driver of the client when the host is in a power save mode. A method may also include activating a sharing switch of a host controller to connect a device connection port to the host when the host is not in a power save mode and to connect the device connection port to the client when the host is in a power save mode. Corresponding apparatuses and computer program products are also provided. | 03-21-2013 |
20130287272 | Methods and Apparatus of Integrating Fingerprint Imagers with Touch Panels and Displays - The present invention provides systems and methods of an apparatus that comprises a layer of fingerprint imagers, an addressing circuit, a fingerprint controller, an electronic storage devices, a layer of touch panel and a display panel. The touch panel behind the layer of fingerprint imagers can sense touch position when touched. The specific fingerprint imagers can be activated according to the touch panel coordinates when touched by a user. After fingerprint is captured, the system evaluates quality of the captured fingerprint and admits fingerprint for recognition when its quality is above a threshold value. User of a computing system can be accepted or rejected based on the comparison between the captured fingerprint and an authorized fingerprint list. | 10-31-2013 |
20130287274 | Methods and Apparatuses of Unified Capacitive Based Sensing of Touch and Fingerprint - The present invention describes methods and apparatuses for sensing touches and/or fingerprint images with an integrated device comprising, a transparent touch-fingerprint capacitive sensing array comprising a collection of capacitive sensing cells, a multi-resolution scanline driver circuitry, a multi-resolution column driver circuitry, and a readout circuitry coupling with said transparent touch-fingerprint capacitive sensing array wherein said readout circuitry can transmit digital or analog output of selected capacitive sensing cells. | 10-31-2013 |
20140129843 | Methods and Apparatus for Managing Service Access Using a Touch-Display Device Integrated with Fingerprint Imager - The present invention with an apparatus enables biometric based access control to services and/or resources that comprises a crypto processor, a biometric processor, a fingerprint controller, a frame hash engine, a display repeater and/or a display controller, a touch-panel controller and a biometric touch-display panel. The frame hash engine and/or the display controller computes a frame hash of the frame displayed on the biometric touch-display panel. When a fingerprint is captured, in the registration scenario, the biometric processor extracts biometric identity and stores it in a service biometric credential repository identity, and submits a registration proof to the server; in the service access scenarios, the biometric processor verifies user identity by matching fingerprint, and submits an access identity to the server. | 05-08-2014 |
20140218327 | Method and Apparatuses of Transparent Fingerprint Imager Integrated with Touch Display Device - The present invention describes a transparent fingerprint imaging apparatus wherein said apparatus comprises, a plurality of column lines, a plurality of scan lines, a plurality of data lines, and a plurality of fingerprint capacitance sensing cells wherein a fingerprint capacitance sensing cell further comprises, a fingerprint capacitor comprising a transparent capacitance detecting electrode and a transparent capacitance-detecting dielectric layer, a transparent reference capacitor coupled with said fingerprint capacitor with one electrode connecting to the fingerprint capacitor, and an amplification transparent TFT (thin-film transistor) wherein the gate electrode of the amplification transparent TFT connects to the transparent capacitance detecting electrode, one terminal of said amplification transparent TFT connects to a data line and the other terminal connects to a scan line. | 08-07-2014 |
20140292666 | Method and Apparatuses of User Interaction Control with Touch Display Device Integrated with Fingerprint Imager - The present invention describes methods and apparatuses for supporting identity based user experiences by a computing apparatus wherein said computing apparatus comprises a biometric touch display wherein said biometric touch display further comprises one or a plurality of fingerprint imagers, an electronic touch display, and a control processing element wherein said control processing element is programmed to show user interface on the touch display, verify user identity, and respond to the touch accordingly. | 10-02-2014 |
20150109214 | Methods and Apparatuses of touch-fingerprinting Display - The present invention describes methods and apparatuses for sensing touches and/or fingerprint images with an integrated touch-fingerprinting display comprising, a pattern of display pixels wherein said display pixels are controllable components of an electronic display, a pattern of fingerprint imaging cells, a display driver coupled with the display pixels wherein said display driver can control states of the display pixels, and a fingerprint readout circuit coupled with the fingerprint imaging cells. Furthermore, a computing apparatus can display a user interface on a touch-fingerprinting display, detect touches from a user, and then scan one or multiple fingerprint images from the user. In further embodiments, the computing apparatus can compute a biometric token based on the scanned fingerprint data and use the biometric token as identity proof to access a local resource or networked resource. | 04-23-2015 |
20150154436 | Methods and Apparatuses of Identity Skin for Access Control - The present invention describes methods and apparatuses for sensing user identity by a mobile computing apparatus with an identity skin comprising, at least one biometric sensor; a readout circuit coupling with the biometric sensor; and a connector wherein said connector coupling the identity skin with a mobile computing apparatus and said connector comprising at least one input and/or output port. | 06-04-2015 |
20150157939 | Methods and Apparatuses of Game Appliance Execution and Rendering Service - The present invention presents methods and apparatuses of game appliance execution and rendering service. A game appliance system can start a game appliance for a client system and the client system can send input to the game appliance system via a network to control game play of the game appliance and in return receive media stream of the game appliance via a network. The game appliance system can further comprise, graphics rendering apparatus. It can comprise transceiver; the graphics accelerators; and control processing element that can be programmed to, receive graphics rendering command; schedule the received graphics rendering command to the graphics accelerators; direct the graphics accelerators to compress the rendered frame into compressed frame or video; transcode the rendered frames into streaming video; and stream said video over a network to client system. | 06-11-2015 |
20150304105 | Methods and Apparatuses of Processing Sealed Data with Field Programmable Gate Array - The present invention describes a data processing apparatus comprising, at least one field-programmable gate array device, at least one transceiver, at least one storage device wherein said storage device stores at least one key, a key translator in the form of bitstream or reconfigurable circuit wherein said key translator can decrypt an encrypted key, a data sealer wherein said data sealer can encrypt data stored in the field-programmable gate array device or the electronic memory device, and a data unsealer wherein said data unsealer can decrypt data stored in the field-programmable gate array device or the electronic memory device. | 10-22-2015 |
Wiedong Shi, Pearland, TX US
Patent application number | Description | Published |
---|---|---|
20150157939 | Methods and Apparatuses of Game Appliance Execution and Rendering Service - The present invention presents methods and apparatuses of game appliance execution and rendering service. A game appliance system can start a game appliance for a client system and the client system can send input to the game appliance system via a network to control game play of the game appliance and in return receive media stream of the game appliance via a network. The game appliance system can further comprise, graphics rendering apparatus. It can comprise transceiver; the graphics accelerators; and control processing element that can be programmed to, receive graphics rendering command; schedule the received graphics rendering command to the graphics accelerators; direct the graphics accelerators to compress the rendered frame into compressed frame or video; transcode the rendered frames into streaming video; and stream said video over a network to client system. | 06-11-2015 |
Xiaokang Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20110035709 | Gradient-Based Search Mechanism for Optimizing Photolithograph Masks - A mechanism is provided for optimizing a photolithograph mask. A given target pattern is received. An initial fictitious mask is generated from the given target pattern and an initial value of α | 02-10-2011 |
20120260221 | Gradient-Based Search Mechanism for Optimizing Photolithograph Masks - A mechanism is provided for optimizing a photolithograph mask. A given target pattern is received. An initial fictitious mask is generated from the given target pattern and an initial value of α | 10-11-2012 |
20120266111 | Gradient-Based Search Mechanism for Optimizing Photolithograph Masks - A mechanism is provided for optimizing a photolithograph mask. A given target pattern is received. An initial fictitious mask is generated from the given target pattern and an initial value of α | 10-18-2012 |
20120266112 | Gradient-Based Search Mechanism for Optimizing Photolithograph Masks - A mechanism is provided for optimizing a photolithograph mask. A given target pattern is received. An initial fictitious mask is generated from the given target pattern and an initial value of α | 10-18-2012 |
20120266113 | Gradient-Based Search Mechanism for Optimizing Photolithograph Masks - A mechanism is provided for optimizing a photolithograph mask. A given target pattern is received. An initial fictitious mask is generated from the given target pattern and an initial value of α | 10-18-2012 |
20120266114 | Gradient-Based Search Mechanism for Optimizing Photolithograph Masks - A mechanism is provided for optimizing a photolithograph mask. A given target pattern is received. An initial fictitious mask is generated from the given target pattern and an initial value of α | 10-18-2012 |
20120278769 | Gradient-Based Search Mechanism for Optimizing Photolithograph Masks - A mechanism is provided for optimizing a photolithograph mask. A given target pattern is received. An initial fictitious mask is generated from the given target pattern and an initial value of α | 11-01-2012 |
Yi Shi, Fort Worth, TX US
Patent application number | Description | Published |
---|---|---|
20150202337 | IRON GARNET NANOPARTICLES FOR CANCER RADIOTHERAPY AND CHEMOTHERAPY - Iron garnet nanoparticles and or iron garnet particles containing various activatable nuclides, such as holmium-165( | 07-23-2015 |
Yitong Shi, College Station, TX US
Patent application number | Description | Published |
---|---|---|
20140203461 | POLYCRYSTALLINE SINTERED NANO-GRAN ZINC SULFIDE CERAMICS FOR OPTICAL WINDOWS - A method is provided for producing an article which is transparent to visible and infrared radiation. The method includes the steps of forming a green body from a population of nanoparticles; depositing a layer of ZnS powder over the green body, thereby producing a covered green body; and sintering the covered green body, thereby producing a sintered product. | 07-24-2014 |
Yue Shi, Houston, TX US
Patent application number | Description | Published |
---|---|---|
20140176900 | Method and Algorithm for Designing Custom Optics - Provided herein is a computer program product comprising a non-transitory computer-readable medium storing an algorithm to optimize a wavefront guided correction for a custom ophthalmic lens. The correction is determined from inputs of quantified wavefront error and registration uncertainty and a metric predictive of a visual performance task of interest and provides a level of visual performance within a user-defined performance range. Also provided is a method for optimizing a wavefront guided correction for a custom ophthalmic lens via inputting residual wavefront error values and quantified translational and rotational movements into an algorithm configured to determine the optimal wavefront guided correction therefrom and a custom ophthalmic lens comprising the correction. | 06-26-2014 |
Zhengwei Shi, Spring, TX US
Patent application number | Description | Published |
---|---|---|
20150258772 | MULTI-STATION FLEXOGRAPHIC PRINTING SYSTEM FOR PATTERNED COATING DEPOSITION - A method of depositing a patterned coating in a multi-station flexographic printing system includes printing a coating in a pattern on a roll-to-roll substrate material with a first flexographic printing station, routing the printed roll-to-roll substrate material from the first flexographic printing station to a subsequent flexographic printing station, and curing the printed roll-to-roll substrate material at the subsequent flexographic printing station. | 09-17-2015 |
20150267071 | RADIATION-CURABLE OPTICALLY CLEAR COATING COMPOSITION FOR TOUCH SENSORS - A radiation-curable optically clear coating composition for patterned deposition on a touch sensor includes a principal resin that includes multi-(meth)acrylate functionalized oligomers or polymers and a free radical-polymerization initiator that includes at least one surface curing agent and at least one deep curing agent. | 09-24-2015 |
20150275040 | RADIATION-CURABLE HARD-COAT COMPOSITION - A radiation-curable hard-coat composition includes a principal resin that includes multi-(meth)acrylate functionalized oligomers or polymers and a free radical-polymerization initiator. The initiator includes at least two photo-initiators in a predetermined ratio that generate a highly reactive species when irradiated with radiation. | 10-01-2015 |
Zheng-Zheng Shi, Spring, TX US
Patent application number | Description | Published |
---|---|---|
20110097330 | Novel Gene Disruptions, Compostitions and Methods Relating Thereto - The present invention relates to transgenic animals, as well as compositions and methods relating to the characterization of gene function. Specifically, the present invention provides transgenic mice comprising disruptions in PRO179, PRO181, PRO244, PRO247, PRO269, PRO293, PRO298, PRO339, PRO341, PRO347, PRO531, PRO537, PRO718, PRO773, PRO860, PRO871, PRO872, PRO813, PRO828, PRO1100, PRO1114, PRO115, PRO1126, PRO1133, PRO1154, PRO1185, PRO1194, PRO1287, PRO1291, PRO1293, PRO1310, PRO1312, PRO1335, PRO1339, PRO2155, PRO1356, PRO1385, PRO1412, PRO1487, PRO1758, PRO1779, PRO1785, PRO1889, PRO90318, PRO3434, PRO3579, PRO4322, PRO4343, PRO4347, PRO4403, PRO4976, PRO260, PRO6014, PRO6027, PRO6181, PRO6714, PRO9922, PRO7179, PRO7476, PRO9824, PRO19814, PRO19836, PRO20088, PRO70789, PRO50298, PRO51592, PRO1757, PRO4421, PRO9903, PRO1106, PRO1411, PRO1486, PRO1565, PRO4399 or PRO4404 genes. Such in vivo studies and characterizations may provide valuable identification and discovery of therapeutics and/or treatments useful in the prevention, amelioration or correction of diseases or dysfunctions associated with gene disruptions such as neurological disorders; cardiovascular, endothelial or angiogenic disorders; eye abnormalities; immunological disorders; oncological disorders; bone metabolic abnormalities or disorders; lipid metabolic disorders; or developmental abnormalities. | 04-28-2011 |
Zheng-Zheng Shi, The Wooldlands, TX US
Patent application number | Description | Published |
---|---|---|
20090142348 | Novel Gene Disruptions, Compositions and Methods Relating Thereto - The present invention relates to transgenic animals, as well as compositions and methods relating to the characterization of gene function. Specifically, the present invention provides transgenic mice comprising disruptions in PRO844, PRO1131 or PRO5992 genes. Such in vivo studies and characterizations may provide valuable identification and discovery of therapeutics and/or treatments useful in the prevention, amelioration or correction of diseases or dysfunctions associated with gene disruptions such as neurological disorders; cardiovascular, endothelial or angiogenic disorders; eye abnormalities; immunological disorders; oncological disorders; bone metabolic abnormalities or disorders; lipid metabolic disorders; or developmental abnormalities. | 06-04-2009 |
Zhongai Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20090078998 | SEMICONDUCTOR DEVICE HAVING DECREASED CONTACT RESISTANCE - Semiconductor devices having improved contact resistance and methods for fabricating such semiconductor devices are provided. These semiconductor devices include a semiconductor device structure and a contact. The contact is electrically and physically coupled to the semiconductor device structure at both a surface portion and a sidewall portion of the semiconductor device structure. | 03-26-2009 |
Zhonghai Shi, Austin, TX US
Patent application number | Description | Published |
---|---|---|
20090081837 | METHOD FOR FABRICATING A SEMICONDUCTOR DEVICE HAVING AN EXTENDED STRESS LINER - The techniques and technologies described herein relate to the automatic creation of photoresist masks for stress liners used with semiconductor based transistor devices. The stress liner masks are generated with automated design tools that leverage layout data corresponding to features, devices, and structures on the wafer. A resulting stress liner mask (and wafers fabricated using the stress liner mask) defines a stress liner coverage area that extends beyond the boundary of the transistor area and into a stress insensitive area of the wafer. The extended stress liner further enhances performance of the respective transistor by providing additional compressive/tensile stress. | 03-26-2009 |
20090090969 | ELECTRONIC DEVICE AND METHOD OF BIASING - A first bias charge is provided to first bias region at a first level of an electronic device, the first bias region directly underlying a first transistor having a channel region at a second level that is electrically isolated from the first bias region. A voltage threshold of the first transistor is based upon the first bias charge. A second bias charge is provided to second bias region at the first level of an electronic device, the second bias region directly underlying a second transistor having a channel region at a second level that is electrically isolated from the first bias region. A voltage threshold of the second transistor is based upon the second bias charge. | 04-09-2009 |
20090253238 | METHOD OF FORMING MULTIPLE FINS FOR A SEMICONDUCTOR DEVICE - A fabrication process for a FinFET device is provided. The process begins by providing a semiconductor wafer having a layer of conductive material such as silicon. A whole-field arrangement of fins is then formed from the layer of conductive material. The whole-field arrangement of fins includes a plurality of conductive fins having a uniform pitch and a uniform fin thickness. Next, a cut mask is formed over the whole-field arrangement of fins. The cut mask selectively masks sections of the whole-field arrangement of fins with a layout that defines features for a plurality of FinFET devices. The cut mask is used to remove a portion of the whole-field arrangement of fins, the portion being unprotected by the cut mask. The resulting fin structures are used to complete the fabrication of the FinFET devices. | 10-08-2009 |
20100285650 | METHOD OF FABRICATING SEMICONDUCTOR TRANSISTOR DEVICES WITH ASYMMETRIC EXTENSION AND/OR HALO IMPLANTS - A method of fabricating semiconductor devices begins by providing or fabricating a device structure that includes a semiconductor material and a plurality of gate structures formed overlying the semiconductor material. The method continues by creating light dose extension implants in the semiconductor material by bombarding the device structure with ions at a non-tilted angle relative to an exposed surface of the semiconductor material. During this step, the plurality of gate structures are used as a first implantation mask. The method continues by forming a patterned mask overlying the semiconductor material, the patterned mask being arranged to protect shared drain regions of the semiconductor material and to leave shared source regions of the semiconductor material substantially exposed. Thereafter, the method creates heavy dose extension implants and/or halo implants in the semiconductor material by bombarding the device structure with ions at a tilted angle relative to the exposed surface of the semiconductor material, and toward the plurality of gate structures. During this step, the plurality of gate structures and the patterned mask are used as a second implantation mask. | 11-11-2010 |
20120070987 | SEMICONDUCTOR DEVICE HAVING DECREASED CONTACT RESISTANCE - Semiconductor devices having improved contact resistance and methods for fabricating such semiconductor devices are provided. These semiconductor devices include a semiconductor device structure and a contact. The contact is electrically and physically coupled to the semiconductor device structure at both a surface portion and a sidewall portion of the semiconductor device structure. | 03-22-2012 |
20130182490 | Static Random Access Memory Cell with Single-Sided Buffer and Asymmetric Construction - Balanced electrical performance in a static random access memory (SRAM) cell with an asymmetric context such as a buffer circuit. Each memory cell includes a circuit feature, such as a read buffer, that has larger transistor sizes and features than the other transistors within the cell, and in which the feature asymmetrical influences the smaller cell transistors. For best performance, pairs of cell transistors are to be electrically matched with one another. One or more of the cell transistors nearer to the asymmetric feature are constructed differently, for example with different channel width, channel length, or net channel dopant concentration, to compensate for the proximity effects of the asymmetric feature. | 07-18-2013 |
20140078819 | STATIC RANDOM ACCESS MEMORY CELL WITH SINGLE-SIDED BUFFER AND ASYMMETRIC CONSTRUCTION - Balanced electrical performance in a static random access memory (SRAM) cell with an asymmetric context such as a buffer circuit. Each memory cell includes a circuit feature, such as a read buffer, that has larger transistor sizes and features than the other transistors within the cell, and in which the feature asymmetrical influences the smaller cell transistors. For best performance, pairs of cell transistors are to be electrically matched with one another. One or more of the cell transistors nearer to the asymmetric feature are constructed differently, for example with different channel width, channel length, or net channel dopant concentration, to compensate for the proximity effects of the asymmetric feature. | 03-20-2014 |
20150303246 | SYSTEMS AND METHODS FOR FABRICATING A POLYCRYSTALINE SEMICONDUCTOR RESISTOR ON A SEMICONDUCTOR SUBSTRATE - In accordance with embodiments of the present disclosure, an integrated circuit may include at least one region of shallow-trench isolation field oxide, at least one region of dummy diffusion, and a polycrystalline semiconductor resistor. The at least one region of shallow-trench isolation field oxide may be formed on a semiconductor substrate. The at least one region of dummy diffusion may be formed adjacent to the at least one region of shallow-trench isolation field oxide on the semiconductor substrate. The polycrystalline semiconductor resistor may comprise at least one resistor arm formed with a polycrystalline semiconductor material, wherein the at least one resistor arm is formed over each of the at least one region of shallow-trench isolation field oxide and the at least one region of dummy diffusion. | 10-22-2015 |