Kong, CA
Alvin Kong, Manhattan Beach, CA US
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20100052818 | MULTI-CHANNEL SURFACE ACOUSTIC WAVE FILTER DEVICE WITH VOLTAGE CONTROLLED TUNABLE FREQUENCY RESPONSE - A multi-channel surface acoustic wave (SAW) filter includes a voltage controlled velocity tunable piezoelectric substrate, an input transducer fabricated on the substrate, and an output transducer fabricated on the substrate. The input transducer further includes multiple input sub-transducers that are electrically and physically connected in parallel. The output transducer further includes multiple output sub-transducers that are electrically and physically connected in parallel. Corresponding pairs of input sub-transducers and output sub-transducers form multiple parallel channels for SAW propagation. The input transducer produces a voltage controlled tunable COMB frequency response that is combined with a voltage controlled tunable COMB frequency response produced by the output transducer to produce a SAW filter voltage controlled tunable frequency response. Further embodiments include a multi-channel SAW resonator, a SAW filter device connecting two novel SAW filters in series, and a SAW filter device connecting two novel SAW resonators in series. | 03-04-2010 |
Alvin Ming-Wei Kong, Manhattan Beach, CA US
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20080258843 | Surface acoustic wave passband control - An apparatus in one example comprises a piezoelectric layer, an input transducer, an output transducer, and at least one electrode set. The input transducer is configured to convert an input signal from an input source to a surface acoustic wave and send the surface acoustic wave from an input portion of the piezoelectric layer to an output portion of the piezoelectric layer. The input transducer comprises a set of input passbands. The output transducer is configured to receive the surface acoustic wave from the output portion of the piezoelectric layer. The output transducer comprises a set of output passbands. The at least one electrode set is configured to apply at least one voltage bias to at least one portion of the piezoelectric layer to create an electric field that controls an acoustic velocity of the surface acoustic wave through the at least one portion of the piezoelectric layer. The at least one electrode set is configured to control one or more of the set of input passbands and the set of output passbands by adjustment of the at least one voltage bias. | 10-23-2008 |
20090072926 | Saw filter frequency characteristic control - An apparatus in one example comprises an insulating piezoelectric layer, a base electrode along a first side of the insulating piezoelectric layer, and at least one gradient electrode along a second side of the insulating piezoelectric layer. The at least one gradient electrode is configured to provide a voltage gradient across an aperture of a surface acoustic wave (SAW) filter. The base electrode and the at least one gradient electrode are configured to provide a voltage bias across the insulating piezoelectric layer. The voltage bias comprises a gradient based on the voltage gradient across the aperture of the SAW filter. The base electrode and the at least one gradient electrode are configured to control at least one frequency characteristic of the SAW filter based on the voltage bias across the insulating piezoelectric layer. | 03-19-2009 |
Bella Kong, San Jose, CA US
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20080286737 | Adaptive Engine Logic Used in Training Academic Proficiency - The present invention is an intelligent, adaptive system that takes in information and reacts to the specific information given to it, using a set of predefined heuristics. Therefore, each individual's information (which can and is unique) will feed the engine, and then provide a unique experience to that individual. One embodiment of the present invention discussed herein focuses on Mathematics however the invention is not limited thereby as the same logic can be applied to other academic subjects. | 11-20-2008 |
Bob Kong, Newark, CA US
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20100055422 | Electroless Deposition of Platinum on Copper - Embodiments of the current invention describe a method of plating platinum selectively on a copper film using a self-initiated electroless process. In particular, platinum films are plated onto very thin copper films having a thickness of less than 300 angstroms. The electroless plating solution and the resulting structure are also described. This process has applications in the semiconductor processing of logic devices, memory devices, and photovoltaic devices. | 03-04-2010 |
20100203731 | Formation of a Zinc Passivation Layer on Titanium or Titanium Alloys Used in Semiconductor Processing - Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl | 08-12-2010 |
20120091590 | Electroless Deposition of Platinum on Copper - Embodiments of the current invention describe a method of plating platinum selectively on a copper film using a self-initiated electroless process. In particular, platinum films are plated onto very thin copper films having a thickness of less than 300 angstroms. The electroless plating solution and the resulting structure are also described. This process has applications in the semiconductor processing of logic devices, memory devices, and photovoltaic devices. | 04-19-2012 |
20120295436 | FORMATION OF A ZINC PASSIVATION LAYER ON TITANIUM OR TITANIUM ALLOYS USED IN SEMICONDUCTOR PROCESSING - Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl | 11-22-2012 |
20120325109 | Formation of A Zinc Passivation Layer on Titanium or Titanium Alloys Used in - Embodiments of the current invention describe methods of processing a semiconductor substrate that include applying a zincating solution to the semiconductor substrate to form a zinc passivation layer on the titanium-containing layer, the zincating solution comprising a zinc salt, FeCl | 12-27-2012 |
20130340648 | Electroless Deposition of Platinum on Copper - Embodiments of the current invention describe a method of plating platinum selectively on a copper film using a self-initiated electroless process. In particular, platinum films are plated onto very thin copper films having a thickness of less than 300 angstroms. The electroless plating solution and the resulting structure are also described. This process has applications in the semiconductor processing of logic devices, memory devices, and photovoltaic devices. | 12-26-2013 |
Bob Kong, San Jose, CA US
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20090291275 | Methods For Improving Selectivity of Electroless Deposition Processes - Methods for improving selective deposition of a capping layer on a patterned substrate are presented, the method including: receiving the patterned substrate, the patterned substrate including a conductive region and a dielectric region; forming a molecular masking layer (MML) on the dielectric region; preparing an electroless (ELESS) plating bath, where the ELESS plating bath includes: a cobalt (Co) ion source: a complexing agent: a buffer: a tungsten (W) ion source: and a reducing agent; and reacting the patterned substrate with the ELESS plating bath for an ELESS period at an ELESS temperature and an ELESS pH so that the capping layer is selectively formed on the conductive region. In some embodiments, methods further include a pH adjuster for adjusting the ELESS pH to a range of approximately 9.0 pH to 9.2 pH. In some embodiments, the pH adjuster is tetramethylammonium hydroxide (TMAH). In some embodiments, the MML is hydrophilic. | 11-26-2009 |
20110207320 | Noble Metal Activation Layer - Processes for minimizing contact resistance when using nickel silicide (NiSi) and other similar contact materials are described. These processes include optimizing silicide surface cleaning, silicide surface passivation against oxidation and techniques for diffusion barrier/catalyst layer deposition. Additionally, processes for generating a noble metal (for example platinum, iridium, rhenium, ruthenium, and alloys thereof) activation layer that enables the electroless barrier layer deposition on a NiSi-based contact material are described. The processes may be employed when using NiSi-based materials in other end products. The processes may be employed on silicon-based materials | 08-25-2011 |
Bob Wen Kong, Newark, CA US
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20130125974 | SOLAR CELL WITH METAL GRID FABRICATED BY ELECTROPLATING - One embodiment of the present invention provides a solar cell. The solar cell includes a photovoltaic structure, a transparent-conductive-oxide (TCO) layer situated above the photovoltaic structure, and a front-side metal grid situated above the TCO layer. The TCO layer is in contact with the front surface of the photovoltaic structure. The front-side metal grid includes a first metal layer comprising Cu, and a second metal layer covering a top surface and sidewalls of the first metal layer. The second metal layer comprises at least one of: Ag and Sn. | 05-23-2013 |
Byungkook Kong, San Ramon, CA US
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20150064914 | METHOD OF ETCHING A BORON DOPED CARBON HARDMASK - In one embodiment, a method is proposed for etching a boron dope hardmask layer. The method includes flowing a process gas comprising at least CH | 03-05-2015 |
20150064919 | ASPECT RATIO DEPENDENT ETCH (ARDE) LAG REDUCTION PROCESS BY SELECTIVE OXIDATION WITH INERT GAS SPUTTERING - Embodiments of methods for etching a substrate include exposing the substrate to a first plasma formed from an inert gas; exposing the substrate to a second plasma formed from an oxygen-containing gas to form an oxide layer on a bottom and sides of a low aspect ratio feature and a high aspect ratio feature, wherein the oxide layer on the bottom of the low aspect ratio feature is thicker than on the bottom of the high aspect ratio feature; etching the oxide layer from the bottom of the low and high aspect ratio features with a third plasma to expose the bottom of the high aspect ratio feature while the bottom of the low aspect ratio feature remains covered; and exposing the substrate to a fourth plasma formed from a halogen-containing gas to etch the bottom of the low aspect ratio feature and the high aspect ratio feature. | 03-05-2015 |
20150099345 | METHOD FOR FORMING FEATURES IN A SILICON CONTAINING LAYER - Embodiments of methods for forming features in a silicon containing layer of a substrate disposed on a substrate support are provided herein. In some embodiments, a method for forming features in a silicon containing layer of a substrate disposed on a substrate support in a processing volume of a process chamber includes: exposing the substrate to a first plasma formed from a first process gas while providing a bias power to the substrate support, wherein the first process gas comprises one or more of a chlorine-containing gas or a bromine containing gas; and exposing the substrate to a second plasma formed from a second process gas while no bias power is provided to the substrate support, wherein the second process gas comprises one or more of an oxygen-containing gas or nitrogen gas, and wherein a source power provided to form the first plasma and the second plasma is continuously provided. | 04-09-2015 |
20150200109 | MASK PASSIVATION USING PLASMA - A gas comprising hydrogen is supplied to a plasma source. Plasma comprising hydrogen plasma particles is generated from the gas. A passivation layer is deposited on a first mask layer on a second mask layer over a substrate using the hydrogen plasma particles. | 07-16-2015 |
Cheng-Gang Kong, Saratoga, CA US
Patent application number | Description | Published |
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20090043955 | Configurable high-speed memory interface subsystem - A memory interface subsystem including a write logic and a read logic. The write logic may be configured to communicate data from a memory controller to a memory. The read logic may be configured to communicate data from the memory to the memory controller. The read logic may comprise a plurality of physical read datapaths. Each of the physical read datapaths may be configured to receive (i) a respective portion of read data signals from the memory, (ii) a respective read data strobe signal associated with the respective portion of the received read data signals, (iii) a gating signal, (iv) a base delay signal and (v) an offset delay signal. | 02-12-2009 |
20090091349 | High speed multiple memory interface I/O cell - An input/output (I/O) cell including one or more driver-capable segments and one or more on-die termination (ODT) capable segments. The I/O cell may be configured as an output driver in a first mode and Thevenin equivalent termination in a second mode. | 04-09-2009 |
20090091987 | Multiple memory standard physical layer macro function - A memory interface physical layer macro including one or more embedded input/output (I/O) buffers, one or more memory interface hardmacros and control logic. The one or more embedded input/output (I/O) buffers support a plurality of I/O supply voltage levels. The one or more memory interface hardmacros are coupled to the one or more embedded I/O buffers. The control logic controls the one or more hardmacros and the one or more I/O buffers. | 04-09-2009 |
20090187873 | SIGNAL DELAY SKEW REDUCTION SYSTEM - A system for reducing the signal delay skew is disclosed, according to a variety of embodiments. One illustrative embodiment of the present disclosure is directed to a method. According to one illustrative embodiment, the method includes receiving an initial netlist comprising components and connection paths among the components. The method further includes identifying one or more skew-influencing features in a first connection path in the initial netlist that lack corresponding skew-influencing features in a second connection path in the initial netlist. The method also includes generating a skew-corrected netlist wherein the second connection path includes one or more added skew-influencing features corresponding to those of the first connection path. The method further includes outputting the skew-corrected netlist. | 07-23-2009 |
20100157700 | APPARATUS AND SYSTEMS FOR VT INVARIANT DDR3 SDRAM WRITE LEVELING - Apparatus and systems for improved PVT invariant fast rank switching in a DDR3 memory subsystem. A clock skew control circuit is provided between a memory controller and a DDR3 SDRAM memory subsystem to adjust skew between the DDR3 clock signal and data related signals (e.g., DQ and/or DQS). A initial write-leveling procedure determines the correct skew and programs a register file in the skew adjustment circuit. The register file includes a register for each of multiple ranks in the DDR3 memory. The values in each register serve to control selection of alignment of the data related signals to align with one of multiple phase shifted versions of a 1× DDR3 clock signal. The phase shifted clock signals are generated by clock divider circuits from a 2× DDR clock signal and use of a single fixed delay line approximating ⅛ of a 1× DDR3 clock period. | 06-24-2010 |
20110084725 | HIGH SPEED MULTIPLE MEMORY INTERFACE I/O CELL - An input/output (I/O) cell including one or more driver-capable segments and one or more on-die termination (ODT) capable segments. The I/O cell may be configured as an output driver in a first mode and Thevenin equivalent termination in a second mode. | 04-14-2011 |
20110258587 | SIGNAL DELAY SKEW REDUCTION SYSTEM - A system and method are provided for reducing the signal delay skew is disclosed, according to a variety of embodiments. One illustrative embodiment of the present disclosure is directed to a method. According to one illustrative embodiment, the method includes receiving an initial netlist having components and connection paths among the components; identifying a first connection path in the initial netlist that comprises path fragments for which there are no equivalent path fragments in a second connection path in the initial netlist; generating a skew-corrected netlist wherein the second connection path is re-routed to have path fragments equivalent to the path fragments of the first connection path; and outputting the skew-corrected netlist. | 10-20-2011 |
20120194248 | NON-LINEAR COMMON COARSE DELAY SYSTEM AND METHOD FOR DELAYING DATA STROBE - A non-linear common coarse delay system and method for delaying a data strobe in order to preserve fine delay accuracy and compensate PVT (Process, Voltage, and Temperature) variation effects. A common coarse delay and a fine delay can be initialized to a quarter-cycle delay for shifting a read output DQS (Data Queue Strobe) associated with a memory device in order to sample a read output DQ (Data Queue) within a physical layer. The fine delay can be programmed from minimum to maximum delay with fixed linear increments at each delay step in order to determine the resolution and accuracy of the delay. An optimum delay size of both the coarse and the fine delay can be determined based on an application slowest frequency of operation. A spare coarse delay and a functional coarse delay can be trained in association with a spare fine delay and the functional fine delay can be updated in order to monitor the process, voltage, and temperature variation effects. | 08-02-2012 |
20120195141 | GENERIC LOW POWER STROBE BASED SYSTEM AND METHOD FOR INTERFACING MEMORY CONTROLLER AND SOURCE SYNCHRONOUS MEMORY - A system and method for interfacing a memory controller and a source synchronous memory utilizing a generic low power strobe. A set of double rate (2×) strobes can be generated by gating a continuous double rate clock in order to enable the set of double rate strobes only for duration of a data transfer from controller to the memory. The data and control from a SDR continuous single rate (1×) clock domain with respect to the memory controller can be moved to a set of double rate clock domain by sampling with the set of double rate strobes. The phase of the set of double rate strobes can be shifted in relation to the continuous single rate clock and a phase relationship of the generated synchronous signals to the memory can be dynamically switched by changing the phase of the set of double rate strobes. The set of double rate clock domain enables each bit-slice to be independently programmed to generate an output to the memory at each phase relative to the controller single rate clock. | 08-02-2012 |
20120278783 | SIGNAL DELAY SKEW REDUCTION SYSTEM - A system and method are provided for reducing signal skew. The method includes receiving a netlist having components and connections among the components. Each connection has at least one signal wire. A plurality of net groups is identified, each net group including at least some of the connections and for which equivalent routing is desired. For each net group, the method includes systematically routing connection paths between the components for the connections, each connection path extending between an output of one of the components and an input to at least one other of the components and including at least one path fragment. Routing includes, for at least one of the connections of the net group, routing at least one grounded shielding wire in a routing channel adjacent and parallel to at least one of the path fragments of the connection path. | 11-01-2012 |
Chio Fai Aglaia Kong, San Jose, CA US
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20130207593 | APPARATUS AND METHOD FOR CONTROLLING A CHARGING CIRCUIT IN A POWER OVER ETHERNET DEVICE - A charging circuit and method for charging a power storage device in a power over Ethernet environment are necessary to prevent unnecessary power consumption. Power sourcing equipment continuously supplies power to a connected device after determining that the device is compatible. In order to prevent supply of power after a power storage device attains full charge, a charging circuit may include an interface for supplying electric power; a sensing circuit including a switch in series with a resistor; and a voltage detection circuit. The voltage detection circuit may communicate with the sensing circuit and may output a first signal that turns the switch OFF when the voltage of the power storage device is greater than or equal to a first voltage and may output a second signal that turns the switch ON when the voltage of the power storage device is less than or equal to a second voltage. | 08-15-2013 |
C. Kwai Kong, Gilroy, CA US
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20120168030 | PORTABLE TIRE INFLATOR AND REFLECTIVE DEVICE - The present disclosure describes a structure for a portable tire inflator that includes a triangular housing comprising a triangular face, a triangular back, two sides extending between the triangular face and the triangular back on first and second sides of the triangular face and back, and a support base on a third side of the triangular face and back extending between the triangular face and the triangular back, a pump motor within the housing. The inflator may be configured such that a majority of the total weight of the portable tire inflator is positioned between the middle of the triangular face and the base. The tire inflator may also include a reflective border on at least two of three edges of the triangular face and an air pressure indicator responsive to air pressure within the air hose, the air pressure indicator visible on an external surface of the housing. | 07-05-2012 |
20130177369 | Tire Puncture Repair Tool - A tire puncture repair apparatus may include a handle, a puncture repair screw, and an integral neck between the handle and the puncture repair screw. The puncture repair screw may include a screw head, a cylindrical shaft extending from the screw head opposite the neck, a partially threaded and solid cone that uniformly narrows from the shaft to a tip opposite the shaft, and a conic-helical thread coiled about the cone between the tip and the shaft. The diameter of the shaft may be approximately equal to the diameter of the cone at the widest point of the cone. The thread on the cone may include an angled ridge and may be coiled around the cone from the intersection of the shaft and the cone to before tip of the cone. | 07-11-2013 |
20150217794 | Steering Wheel Cover - A steering wheel cover comprising a core layer is disclosed. The core layer includes an inner surface molded to form and self-maintain an annular channel sized to receive an automobile steering wheel therein. The core layer also includes an outer surface and two opposing terminating edges. The steering wheel cover is devoid of an outer cover layer coupled to the core layer. Thus no adhesives or stitching are required. In particular embodiments, the core layer includes a first foamed material, such as but not limited to ethyl-vinyl acetate. The core layer may also include one or more protrusions extending from the outer surface of the core layer. The protrusions may include a second foamed material of a different hardness than the first foamed material. The core layer may also include ribs protruding from the inner surface of the annular channel and/or holes extending through the core layer. | 08-06-2015 |
Conrad Kong, San Jose, CA US
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20090160483 | Field programmable application specific integrated circuit with programmable logic array and method of designing and programming the programmable logic array - A programmable logic array for use in a field programmable application specific integrated circuit (ASIC) implementation is provided. The programmable logic array includes programmable logic blocks, and programmable logic interfaces. The programmable logic interfaces couple the programmable logic blocks to external interfaces of the field programmable ASIC, and enable the programmable logic array to be inserted into the field programmable ASIC as a hard macro block. | 06-25-2009 |
Daniel C. Kong, Mountain View, CA US
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20100291975 | ELECTRONIC DEVICE WITH DATA-RATE-DEPENDENT POWER AMPLIFIER BIAS - Wireless circuitry in an electronic device may contain output power amplifier circuitry for amplifying transmitted radio-frequency signals. The power amplifier circuitry may be powered using a bias voltage. The magnitude of the bias voltage can be selectively reduced to conserve power. Control circuitry can maintain a table of bias voltage settings to use under various conditions. These conditions may include required output powers as determined by link quality, transmission mode status, and required data rates. When link quality is low or when high data rates are required, the bias voltage can be maintained at a relatively high level to ensure that the power amplifier operates linearly and does not exhibit excessive noise. When link quality is high or when data rates are low as with voice calls, the bias voltage can be reduced to conserve power. | 11-18-2010 |
20130149972 | Methods and Apparatus for Testing Radio-Frequency Power Amplifier Performance - Wireless communications circuitry such as radio-frequency power amplifiers may be tested using a test station. A test station may include a test host and a test unit coupled to the test host. The power amplifiers may be configured to transmit radio-frequency signals in allocated resource blocks within a particular radio channel. The power amplifier circuits may be configured to transmit signals utilizing only an allocated portion of its total available resource blocks so that the transmitted signals are output at maximum power levels. The power amplifiers may transmit in resource blocks near a low channel edge during a first time period and may transmit in resource blocks near a high channel edge during a second time period. The test unit may receive the signals generated from the power amplifiers and may perform desired radio-frequency measurements (e.g., test unit may measure adjacent channel leakage radio, signal-to-interference ratio, error vector magnitude, etc.). | 06-13-2013 |
Dehai Kong, Cupertino, CA US
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20110208570 | APPARATUS, SYSTEM, AND METHOD FOR INDIVIDUALIZED AND DYNAMIC ADVERTISEMENT IN CLOUD COMPUTING AND WEB APPLICATION - An apparatus, system, and method are disclosed for individualized and dynamic advertisements delivery and display in cloud computing and ordinary Internet systems. The client updates the advertisement server periodically the user web browsing history and local media, advertisements play back log. The client updates the advertisement server the user geographical location. The advertisement server analyzes the user interest and geographical information from client, combining with the server information of client neighborhood events, client neighboring friends, traffic, weather condition. The advertisement server selects the advertisements, tags the selected advertisements, then pushes to the client local storage. Client takes the retrieved web content and selects the best fit advertisements from local storage with according to the time, date, as well as the information of browsing history, geographical information, neighborhood events, client neighboring friends, traffic, weather. The client constructs new web pages with the individualized advertisements. The individualized advertisements can be added to the original web pages, or replace original advertisements. | 08-25-2011 |
Derui Kong, San Diego, CA US
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20110074615 | WIDEBAND DIGITAL TO ANALOG CONVERTER WITH BUILT-IN LOAD ATTENUATOR - A circuit for digital-to-analog conversion is described. The circuit includes a digital-to-analog converter (DAC). The DAC includes a double cascaded current source and a differential current-mode switch (DCMS). The circuit further includes a direct current (DC) offset stage. The circuit also includes a load attenuator. The double cascaded current source may be between the DCMS and a rail voltage. | 03-31-2011 |
20140266830 | TECHNIQUES TO REDUCE HARMONIC DISTORTIONS OF IMPEDANCE ATTENUATORS FOR LOW-POWER WIDEBAND HIGH-RESOLUTION DACS - A digital-to-analog converter (DAC) includes, in part, a multitude of input stages that supply currents to a pair of current summing nodes in response to a digital signal, and an impedance attenuator coupled between the current summing nodes and the output of the DAC. The impedance attenuator is adapted, among other function, to increase the range of impedances of the output load, to account for changes in the output load impedance due to variations in the process, voltage and temperature, and to decouple the impedances seen by the summing nodes from the load impedance. The impedance attenuator further includes a differential-input, differential-output amplifier with programmable common-mode gain bandwidth to control the harmonic distortion of the amplifier. The impedance attenuator optionally includes a pair of cross-coupled capacitors to control the harmonic distortion of the amplifier. | 09-18-2014 |
Deyuan Kong, Richmond, CA US
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20080293685 | SPIRO AND OTHER DERIVATIVES OF DIAMONDOIDS POSSESSING THERAPEUTIC ACTIVITY IN THE TREATMENT OF VIRAL DISORDERS - This invention relates to diamondoid derivatives which exhibit therapeutic activity. Specifically, the diamondoid derivatives herein exhibit therapeutic effects in the treatment of viral disorders. Also provided are methods of treatment, prevention and inhibition of viral disorders in a subject in need. | 11-27-2008 |
20080300317 | DIAMONDOID DERIVATIVES POSSESSING THERAPEUTIC ACTIVITY IN THE TREATMENT OF VIRAL DISORDERS - This invention relates to diamondoid derivatives which exhibit therapeutic activity. Specifically, the diamondoid derivatives herein exhibit therapeutic effects in the treatment of viral disorders. Also provided are methods of treatment, prevention and inhibition of viral disorders in a subject in need. | 12-04-2008 |
Fanyun Kong, San Lorenzo, CA US
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20150263955 | PACKET PARSING AND CONTROL PACKET CLASSIFICATION - A system may include receiving a packet, of a packet stream, including control tags in a header portion of the packet and classifying each of the control tags into a category selected from a set of possible categories. The set of possible categories may include an unambiguous interposable (UI) category that is assigned to a control tag that corresponds to an unambiguous parsing interpretation and that is interposable within a sequence of the control tags, and an ambiguous interposable (AI) category that is assigned to a control tag in which the control tag has an ambiguous parsing interpretation and in which the control tag is interposable within the sequence of the control tags. The method may further include determining parsing operations to perform for the packet based on the classified categories of the control tags and based on the packet stream of the packet. | 09-17-2015 |
Gangfeng Kong, San Jose, CA US
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20120092441 | SYSTEM AND METHOD FOR PROVIDING A PARING MECHANISM IN A VIDEO ENVIRONMENT - A method is provided in one example and includes identifying an event associated with a universal serial bus (USB) connection, and establishing an Ethernet channel. The method also includes discovering a handset associated with a videoconferencing platform, and verifying an authentication message from the handset. A service set identifier (SSID) and a password can be created and communicated to the handset through the Ethernet channel. The SSID and the password are used to associate the handset with a console element configured to control operations associated with the videoconferencing platform. | 04-19-2012 |
Gladys Kong, Pasadena, CA US
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20120144311 | COMPUTERIZED SYSTEM AND METHOD FOR COMMENTING ON SUB-EVENTS WITHIN A MAIN EVENT - A news commenting server includes a filtering unit for allowing only trusted or curated users/authors to post comments in a particular portion of a web page of a news website. The news commenting server may also include a comment receiver for receiving comments and associating the comments with a selected one (and not all) of several sub-events that describe a main event. A formatting unit may present the user comments and the associated sub-event in on the same frame, in the web page of the news website. Other embodiments are also described and claimed. | 06-07-2012 |
Guan-Hua Kong, San Jose, CA US
Hao-Song Kong, Sunnyvale, CA US
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20090274211 | APPARATUS AND METHOD FOR HIGH QUALITY INTRA MODE PREDICTION IN A VIDEO CODER - A computer readable storage medium has executable instructions to select a plurality of blocks in a video sequence to be coded as intra-coded blocks. Aggregate intra prediction costs are computed for each intra-coded block relative to a corresponding previous intra-coded block. An intra prediction mode is selected for each intra-coded block based on the aggregate intra prediction costs. | 11-05-2009 |
20090274213 | APPARATUS AND METHOD FOR COMPUTATIONALLY EFFICIENT INTRA PREDICTION IN A VIDEO CODER - A computer readable storage medium has executable instructions to select a plurality of blocks in a video sequence to be coded as intra-coded blocks. Intra prediction modes are selected for all intra-coded blocks in a macroblock based on original pixels of neighboring blocks. The mode selection of all intra-coded blocks can be conducted in parallel. The intra-coded blocks in the macroblock are predicted with the selected intra prediction modes based on reconstructed pixels of neighboring blocks. | 11-05-2009 |
20090296810 | VIDEO CODING APPARATUS AND METHOD FOR SUPPORTING ARBITRARY-SIZED REGIONS-OF-INTEREST - A computer readable storage medium has executable instructions to select a plurality of macroblocks in a video sequence to be coded as anchor macroblocks, the anchor macroblocks distributed across the video sequence and facilitating random access decoding of a portion of the video sequence. The video sequence is coded into a bit stream. Auxiliary information associated with the anchor macroblocks is generated. The auxiliary information associated with the anchor macroblocks is inserted in a supplementary section of the bit stream. | 12-03-2009 |
Jacob Kong, Irvine, CA US
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20120016717 | SYSTEMS AND METHODS OF ENHANCING LEADS - A client transmits one or more lead records to a lead enhancement module that is configured to enhance the received lead records and return enhanced lead records to the client. The lead enhancement module may return a contactability score for each lead record, indicating a likelihood that the individual identified in the lead may be contacted using the contact information provided in the lead record and/or additional contract information located by the lead enhancement module. The lead enhancement module may also receive additional data items associated with leads from one or more data sources. Additionally, statistical models that may be customized for each client may be applied to information associated with lead records in order to determine one or more propensity scores for each of the lead records, where a propensity score indicates a likelihood that an individual will take a particular action, such as purchasing particular goods or services. | 01-19-2012 |
20130066676 | SYSTEMS AND METHODS OF ENHANCING LEADS - A client transmits one or more lead records to a lead enhancement module that is configured to enhance the received lead records and return enhanced lead records to the client. The lead enhancement module may return a contactability score for each lead record, indicating a likelihood that the individual identified in the lead may be contacted using the contact information provided in the lead record and/or additional contract information located by the lead enhancement module. The lead enhancement module may also receive additional data items associated with leads from one or more data sources. Additionally, statistical models that may be customized for each client may be applied to information associated with lead records in order to determine one or more propensity scores for each of the lead records, where a propensity score indicates a likelihood that an individual will take a particular action, such as purchasing particular goods or services. | 03-14-2013 |
20140214482 | SYSTEMS AND METHODS OF ENHANCING LEADS - A client transmits one or more lead records to a lead enhancement module that is configured to enhance the received lead records and return enhanced lead records to the client. The lead enhancement module may return a contactability score for each lead record, indicating a likelihood that the individual identified in the lead may be contacted using the contact information provided in the lead record and/or additional contract information located by the lead enhancement module. The lead enhancement module may also receive additional data items associated with leads from one or more data sources. Additionally, statistical models that may be customized for each client may be applied to information associated with lead records in order to determine one or more propensity scores for each of the lead records, where a propensity score indicates a likelihood that an individual will take a particular action, such as purchasing particular goods or services. | 07-31-2014 |
Jonathan Kong, Thousand Oaks, CA US
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20140115579 | Datacenter storage system - A storage hypervisor having a software defined storage controller (SDSC) provides for a comprehensive set of storage control, virtualization and monitoring functions to decide the placement of data and manage functions such as availability, automated provisioning, data protection and performance acceleration. The SDSC running as a software driver on the server replaces the hardware storage controller function, virtualizes physical disks in a cluster into virtual building blocks and eliminates the need for a physical RAID layer, thus maximizing configuration flexibility for virtual disks. This configuration flexibility consequently enables the storage hypervisor to optimize the combination of storage resources, data protection levels and data services to efficiently achieve the performance, availability and cost objectives of individual applications. This invention enables complex SAN infrastructure to be eliminated without sacrificing performance, and provides more services than prior art SAN with fewer components, lower costs and higher performance. | 04-24-2014 |
Katherine Kong, El Dorado Hills, CA US
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20140189311 | SYSTEM AND METHOD FOR PERFORMING A SHUFFLE INSTRUCTION - An apparatus and method for performing a shuffle operation on packed data using computer-implemented steps is described. In one embodiment, a first packed data operand having at least two data elements is accessed. A second packed data operand having at least two data elements is accessed. One of the data elements in the first packed data operand is shuffled into a lower destination field of a destination register, and one of the data elements in the second packed data operand is shuffled into an upper destination field of the destination register. | 07-03-2014 |
Kok-Fai Kong, San Diego, CA US
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20140186372 | COMPOSITIONS TARGETING PKC-THETA AND USES AND METHODS OF TREATING PKC-THETA PATHOLOGIES, ADVERSE IMMUNE RESPONSES AND DISEASES - The invention relates to compositions, methods and uses of inhibitors of binding between PKCθ and CD28, and modulating an undesirable or aberrant immune response, disorder or disease, an inflammatory response, disorder or disease, inflammation or an autoimmune response, disorder or disease. Compositions include inhibitors of binding between PKCθ and CD28, which include, among others, PKCθ, CD28 and Lck sequences, subsequences, variants and modified forms, and polymorphisms. | 07-03-2014 |
Lilly Kong, Covina, CA US
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20090035780 | DETECTION OF METHICILLIN-RESISTANT AND METHICILLIN-SENSITIVE STAPHYLOCOCCUS AUREUS IN BIOLOGICAL SAMPLES - Disclosed are methods of identifying a methicillin-resistant | 02-05-2009 |
20110059553 | METHODS AND COMPOSITIONS FOR DETECTING HERPES SIMPLEX VIRUS TYPE 2 - The invention provides methods for sensitive and specific detection of anti-HSV-2 antibodies by depletion of cross-reactive (non-specific) antibodies in a biological sample that can lead to a false positive result. The invention also features compositions, including nucleic acids, polypeptides, and kits, for use in the methods of the invention. | 03-10-2011 |
Lilly I. Kong, Covina, CA US
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20090092969 | DETECTION OF ATYPICAL PNEUMONIA - Disclosed herein are methods and compositions for detecting one or more pathogens that cause atypical pneumonia. Detectable pathogens include | 04-09-2009 |
20090197262 | BORDETELLA DETECTION ASSAY - Disclosed herein are methods and compositions for detecting | 08-06-2009 |
20110143349 | METHODS AND COMPOSITIONS FOR DETECTING BK VIRUS - The invention provides methods and compositions for rapid, sensitive, and highly specific nucleic acid-based (e.g., DNA based) detection of a BK virus in a sample. In general, the methods involve detecting a target nucleic acid having a target sequence of a conserved region of BK viral genomes. The invention also features compositions, including primers, probes, and kits, for use in the methods of the invention. | 06-16-2011 |
20140106990 | MULTIPLEX DETECTION ASSAY FOR INFLUENZA AND RSV VIRUSES - The present invention generally relates to a molecular test of Influenza A, Influenza B, Respiratory Syncytial Virus A, and Respiratory Syncytial Virus B in order to identify patients with a viral infection. Accordingly methods and compositions are disclosed to determine the presence or absence of a viral pathogen in a sample containing one or more target nucleic acids from the M gene of Influenza A, Influenza B, Respiratory Syncytial Virus A, and/or Respiratory Syncytial Virus B. | 04-17-2014 |
20140178872 | METHODS OF NUCLEIC ACID QUANTIFICATION AND DETECTION USING ANOMALOUS MIGRATION - Described are approaches for the identification, detection, and quantification of nucleic acids in a biological sample. These methods are based, in part, on the elucidation of anomalous migration properties of short nucleic acid molecules when conjugated to a fluorescent label, such as fluorescein labels, such that a smaller nucleic acid reliably migrates slower than a larger nucleic acid under the same conditions of separation. | 06-26-2014 |
20140349275 | METHODS AND COMPOSITIONS FOR DETECTING BK VIRUS - The invention provides methods and compositions for rapid, sensitive, and highly specific nucleic acid-based (e.g., DNA based) detection of a BK virus in a sample. In general, the methods involve detecting a target nucleic acid having a target sequence of a conserved region of BK viral genomes. The invention also features compositions, including primers, probes, and kits, for use in the methods of the invention. | 11-27-2014 |
Lingkai Kong, Albany, CA US
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20130241772 | INTEGRATED PHASE-SHIFTING-AND-COMBINING CIRCUITRY TO SUPPORT MULTIPLE ANTENNAS - The disclosed embodiments generally relate to techniques for processing signals received from multiple antennas. More specifically, the disclosed embodiments relate to a system that uses an integrated phase-shifting-and-combining circuit to process signals received from multiple antenna elements. This circuit applies a specified phase shift to the input signals, and combines the phase-shifted input signals to produce an output signal. In some embodiments, the integrated phase-shifting-and-combining circuit uses a current-steering mechanism to perform the phase-shifting-and-combining operations. This current-steering mechanism operates by converting the input signals into associated currents, and then steering each of the associated currents through multiple pathways which have different delays. Next, the currents from the multiple pathways for the associated currents are combined to produce the output signal. During this process, while steering each of the associated currents through multiple pathways to achieve different phase shifts, complementary impedance changes through the multiple pathways cause the aggregate impedance at the output to remain substantially constant. | 09-19-2013 |
Michael Kong, Los Angeles, CA US
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20150296371 | APPARATUS AND METHOD FOR CONTROLLING OPERATION OF A DEVICE - A method for controlling operation of a device includes detecting the proximity of a beacon or transponder, communicating with a server regarding the identity of the transponder and the device, and controlling the operation of the device according to pre-determined settings. The device may be controlled when it is on or in a vehicle or when it is at a venue. An apparatus for controlling the operation of the device is also described. | 10-15-2015 |
Nicholas Kong, Berkeley, CA US
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20130311927 | TECHNIQUES FOR REPRESENTING AND COMPARING WORKFLOWS - An approach is provided for sending pre-defined workflows to a display device of a user device. In one example, the approach includes receiving a request for steps to complete a task associated with a software application. In response to receiving the request for steps, the system obtains at least a first workflow and a second workflow, each workflow including one or more steps that the user device can execute to complete the task. The system receives a request to format the first workflow and the second workflow into one or more view formats. The system generates a summary of the first workflow and a summary of the second workflow. Each summary includes one or more salient attributes of the each workflow. The system sends to the display device at least the first workflow and the second workflow in the one or more view formats. | 11-21-2013 |
Nicholas Chi-Yuen Kong, Berkeley, CA US
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20120117115 | System And Method For Supporting Targeted Sharing And Early Curation Of Information - A system and method for supporting targeted sharing and early curation of information is provided. A digital data item selection by a user within a personal information management client is identified. One or more documents in a shared information repository similar to the digital data item are recommended including selecting recommendation criteria. The recommendation criteria are applied to the digital data item and the one or more documents. The one or more documents satisfying the recommendation criteria are identified as the similar documents. The similar documents are displayed visually proximate to the digital data item in the personal information client. A selection of one of the similar documents is received and the selected similar document in the shared information repository is updated with the digital data item. | 05-10-2012 |
20120117484 | System And Method For Providing Mixed-Initiative Curation Of Information Within A Shared Repository - A system and method for providing mixed-initiative curation of information within a shared repository is provided. Static content is retrieved from a shared storage associated with a shared information management client. Dynamic content including one or more information items satisfying a similarity threshold with the static content is identified as similar dynamic content. An interactive visualization is generated within the shared information management client from information extracted from the static content and the similar dynamic content. The interactive visualization of the information is linked with the static content and the similar dynamic content. A selection of the information of the similar dynamic content is received from within the visualization. The static content in the shared storage is updated with the similar dynamic content linked with the selected information. | 05-10-2012 |
Ning Kong, La Jolla, CA US
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20110103456 | METHOD AND SYSTEM FOR LOW COMPLEXITY CONJUGATE GRADIENT BASED EQUALIZATION IN A WIRELESS SYSTEM - A method for processing signals includes, in a wireless system comprising one or more processors and/or circuits integrated within a single chip, initializing values related to at least one channel response vector and at least one correlation vector using a conjugate gradient-based (CG) algorithm. A plurality of filter taps may be updated utilizing at least one channel response vector and at least one correlation vector, for a plurality of received clusters, based on the initialized values and at least one signal-to-noise ratio (SNR) for the received signal clusters. At least a portion of the received signal clusters may be filtered utilizing at least a portion of the updated plurality of filter taps. The updating may be repeated whenever a specified signal-to-noise ratio (SNR) for the received clusters is reached. The initialized values may be updated during a plurality of iterations. | 05-05-2011 |
20110280298 | Method and System for Low Complexity Conjugate Gradient Based Equalization in a Wireless System - Methods and systems for processing signals in a receiver are disclosed herein and may include updating a plurality of filter taps utilizing at least one channel response vector and at least one correlation vector, for a plurality of received clusters, based on initialized values related to the at least one channel response vector and the at least one correlation vector. At least a portion of the received signal clusters may be filtered utilizing at least a portion of the updated plurality of filter taps. The update may be repeated whenever a specified signal-to-noise ratio (SNR) for the received signal clusters is reached. The initialized values may be updated during a plurality of iterations, and the update may be repeated whenever a specified number of the plurality of iterations is reached. | 11-17-2011 |
20130128945 | Method and System for Low Complexity Conjugate Gradient Based Equalization in a Wireless System - Methods and systems for processing signals in a receiver are disclosed herein and may include updating a plurality of filter taps utilizing at least one channel response vector and at least one correlation vector, for a plurality of received clusters, based on initialized values related to the at least one channel response vector and the at least one correlation vector. At least a portion of the received signal clusters may be filtered utilizing at least a portion of the updated plurality of filter taps. The update may be repeated whenever a specified signal-to-noise ratio (SNR) for the received signal clusters is reached. The initialized values may be updated during a plurality of iterations, and the update may be repeated whenever a specified number of the plurality of iterations is reached. | 05-23-2013 |
20150195004 | Method and System for Achieving Space and Time Diversity Gain - Certain aspects of a method and system for achieving space and time diversity gain are disclosed. Aspects of one method may include modifying a generalization code of at least one pilot channel, to measure signal strengths for each of a plurality of received multipath signals. A portion of the plurality of received multipath signals may be combined based on the measured signal strengths. The signal strengths of the plurality of received multipath signals may be measured on a primary pilot channel by assigning its generalization code to zero. The signal strengths of the plurality of received multipath signals on a secondary pilot channel may measured by assigning its generalization code to a non-zero value. | 07-09-2015 |
Ning Kong, Lajolla, CA US
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20120027052 | Method and System for Achieving Space and Time Diversity Gain - Certain aspects of a method and system for achieving space and time diversity gain are disclosed. Aspects of one method may include modifying a generalization code of at least one pilot channel, to measure signal strengths for each of a plurality of received multipath signals. A portion of the plurality of received multipath signals may be combined based on the measured signal strengths. The signal strengths of the plurality of received multipath signals may be measured on a primary pilot channel by assigning its generalization code to zero. The signal strengths of the plurality of received multipath signals on a secondary pilot channel may measured by assigning its generalization code to a non-zero value. | 02-02-2012 |
20130177044 | Method and System for Achieving Space and Time Diversity Gain - Certain aspects of a method and system for achieving space and time diversity gain are disclosed. Aspects of one method may include modifying a generalization code of at least one pilot channel, to measure signal strengths for each of a plurality of received multipath signals. A portion of the plurality of received multipath signals may be combined based on the measured signal strengths. The signal strengths of the plurality of received multipath signals may be measured on a primary pilot channel by assigning its generalization code to zero. The signal strengths of the plurality of received multipath signals on a secondary pilot channel may measured by assigning its generalization code to a non-zero value. | 07-11-2013 |
Pengju Kong, Campbell, CA US
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20150124495 | REDUCING POWER CONSUMPTION OF A SYNCHRONOUS RECTIFIER CONTROLLER - The embodiments herein describe a switched mode power converter. In particular, the embodiments herein disclose techniques for reducing power consumption of a synchronous rectifier controller of the switched mode power converter. The switched mode power converter includes a plurality of circuit components that control operation of a synchronous rectifier included in the switched mode power converter. One or more of the circuit components may be disabled to reduce power consumption. | 05-07-2015 |
20150160270 | Primary Sensing of Output Voltage for an AC-DC Power Converter - A method for estimating an output voltage of a power converter comprises sensing a voltage waveform representative of the output voltage; and detecting a first gap and a second gap. The first gap is between a time when the sensed voltage waveform crosses a first voltage reference and a time when the sensed voltage waveform crosses a second voltage reference at a voltage offset below the first voltage reference. The second gap is between a time when the sensed voltage waveform crosses a third voltage reference and a time when the sensed voltage waveform crosses the second voltage reference, the third voltage referenced at a predetermined voltage above the second voltage reference. Responsive to the first gap exceeding a threshold, a tracking error is computed based on the first gap; and responsive to the first gap not exceeding the threshold, the tracking error is computed based on the second gap. | 06-11-2015 |
Qin Kong, San Diego, CA US
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20100226124 | Lighting fixture with adjustable light pattern and foldable house structure - A lighting fixture includes a reflector reflecting light from a fluorescent lamp to a desired direction, and one or more lamp connectors connecting the reflector to rotatably and detachably coupling with the fluorescent lamp, wherein the reflector is adapted to selectively rotate with respect to an axis of the fluorescent lamp for reflecting light from the fluorescent lamp so as to change a light pattern of the fluorescent lamp towards an opening of the foldable housing. The foldable housing includes two side frames and a retention frame extended between the two side frames to retain a distance therebetween, wherein the side frames are pivotally coupled with the retention frame to fold between an unfolded position to retain the fluorescent lamp in longitudinal position and a folded position to form a compact size for storage and transportation. | 09-09-2010 |
20120063140 | Lighting fixture with adjustable light pattern and foldable house structure - A lighting fixture includes a reflector reflecting light from a fluorescent lamp to a desired direction, and one or more lamp connectors connecting the reflector to rotatably and detachably coupling with the fluorescent lamp, wherein the reflector is adapted to selectively rotate with respect to an axis of the fluorescent lamp for reflecting light from the fluorescent lamp so as to change a light pattern of the fluorescent lamp towards an opening of the foldable housing. The foldable housing includes two side frames and a retention frame extended between the two side frames to retain a distance therebetween, wherein the side frames are pivotally coupled with the retention frame to fold between an unfolded position to retain the fluorescent lamp in longitudinal position and a folded position to form a compact size for storage and transportation. | 03-15-2012 |
20120091880 | High performance fluorescent lamp - A high performance fluorescent lamp includes an air-tight glass envelop having sealed ends and a light cavity filled with inert gas and coated with a phosphor powder at an inner wall of the glass envelop. Two filaments are sealed at the sealed ends of the glass envelop respectively. A channel is formed at one of the sealed ends of the glass envelop at a location communicating with the light cavity of the glass envelop. An amalgam is retained within the channel at a position forming a preset distance between the respective filament and the amalgam. Therefore, the fluorescent lamp can be operated under different ambient temperature or different wattage of the fluorescent lamp with the similar type of amalgam by controlling a distance between the amalgam and the respective filament. | 04-19-2012 |
20120281397 | Lighting Fixture with Adjustable Light Pattern and Extendable House Structure - A lighting fixture includes a reflector reflecting light from a fluorescent lamp to a desired direction, and one or more lamp connectors connecting the reflector to rotatably and detachably coupling with the fluorescent lamp, wherein the reflector is adapted to selectively rotate with respect to an axis of the fluorescent lamp for reflecting light from the fluorescent lamp so as to change a light pattern of the fluorescent lamp towards an opening of the foldable housing. The foldable housing includes two side frames and a retention frame extended between the two side frames to retain a distance therebetween, wherein the side frames are pivotally coupled with the retention frame to fold between an unfolded position to retain the fluorescent lamp in longitudinal position and a folded position to form a compact size for storage and transportation. | 11-08-2012 |
Roy Kong, Cupertino, CA US
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20080276067 | Method and Apparatus for Page Table Pre-Fetching in Zero Frame Display Channel - A method for a graphics processing unit (“GPU”) to maintain a local cache to minimize system memory reads is provided. A display read request and a logical address are received. The GPU determines whether a local cache contains a physical address corresponding to the logical address. If not, a cache fetch command is generated, and a number of cache lines is retrieved from a table, which may be a GART table, in the system memory. The logical address is converted to a corresponding physical address of the memory when the cache lines are retrieved from the table so that data in memory may be accessed by the GPU. When a cache line in the local cache is consumed, a next line cache fetch request is generated to retrieve a next cache line from the table so that the local cache maintains a predetermined amount of cache lines. | 11-06-2008 |
Sarah Kong, Cupertino, CA US
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20130326403 | METHOD OF SETTING ALTERNATE STYLE ASSIGNMENTS TO MENU ELEMENTS OF AN APPLICATION - A method, apparatus and computer program product for setting alternate style assignments to menu elements of an application are presented. At least one menu element of an application is selected. An alternate style is assigned to the at least one menu element. The at least one menu elements of the application is displayed, wherein the at least one menu element is presented in the alternate style assigned to the element. | 12-05-2013 |
Sarah A. Kong, Cupertino, CA US
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20110038562 | Universal Front End for Masks, Selections, and Paths - A method, system, and computer-readable storage medium are disclosed for editing a digital image with automatic conversion of region modalities. Input comprising an instruction to perform an operation on a first portion of the digital image may be received. The first portion of the digital image may comprise data defined by a first region modality. The operation may be applicable to data defined by a second region modality. In response to receiving the input, the first portion of the digital image may be automatically converted from the first region modality to the second region modality. The operation may be automatically performed on the converted first portion of the digital image (i.e., as defined by the second region modality). | 02-17-2011 |
20130034299 | Robust Patch Regression based on In-Place Self-similarity for Image Upscaling - Methods and systems for image upscaling are disclosed. In one embodiment, a low frequency band image intermediate is obtained from an input image. The input image is upsampled by a scale factor to obtain an upsampled image intermediate. A result image is estimated based at least in part on the upsampled image intermediate, the low frequency band image intermediate, and the input image, wherein the input image is of a smaller scale than the result image. | 02-07-2013 |
20130034311 | Denoising and Artifact Removal in Image Upscaling - Methods and systems for denoising and artifact removal in image upscaling are disclosed. In one embodiment, a low frequency band image intermediate is obtained from an input image. An upsampled image intermediate is obtained from the input image by upsampling. A result image is estimated, based at least in part on the upsampled image intermediate, the low frequency band image intermediate, and the input image. The input image is of a smaller scale than the result image. The estimating the result image further includes eliminating from the result image noise that is present in the input image. | 02-07-2013 |
20130034313 | Regression-Based Learning Model for Image Upscaling - Methods and systems for a regression-based learning model in image upscaling are disclosed. In one embodiment, a set of image patch pairs for each of a set of images is generated. Each of the image patch pairs contains a natural image and a corresponding downscaled lower-resolution image. A regression model based at least in part on the set of image patch pairs is defined. The regression model represents a gradient of a function of the downscaled lower-resolution image. An image is upscaled based at least in part on the regression model. | 02-07-2013 |
20130058587 | Motion Deblurring for Text Images - Various embodiments of methods and apparatus for motion deblurring in text images are disclosed. In one embodiment, a threshold-based text prediction for a blurred image is generated. A point spread function for the blurred image is estimated. A result of the threshold-based text prediction function is deconvolved based on the point spread function. The generating, estimating, and deconvolving are iterated at a plurality of scales, and a final deconvolution of a result of the iteratively deconvolving is executed. | 03-07-2013 |
20130058588 | Motion Deblurring Using Image Upsampling - Various embodiments of methods and apparatus for motion deblurring are disclosed. In one embodiment, an estimate of a latent image of a blurred image at a current scale from an estimate of a latent image at a previous coarse scale is generated using an upsampling super-resolution function, and a blur kernel is estimated based on the estimate of the latent image and the blurred image; and are repeated from a course to fine scale. A final image estimate is generated. The generating the final image estimate includes performing a deconvolution of the latent image using the blur kernel and the blurred image. | 03-07-2013 |
20130120457 | Methods and Apparatus for Manipulating Images and Objects Within Images - Methods and apparatus for manipulating digital images. A warping module is described that enables the manipulation of a surface by selectively deforming portions of the surface while maintaining local rigidity. The user may position multiple control points on a surface to constrain deformation. The user may specify multiple properties (e.g., translation, rotation, depth, and scale) at each control point. A mesh may be overlaid on the surface. The warping module may perform an initialization in which the properties are propagated other vertices in the mesh to generate an initial deformed mesh. The warping module may then perform an iterative optimization operation on the deformed mesh to improve the deformation while retaining local rigidity. Thus, instead of moving every pixel in the surface, the warping module moves or adjusts coordinates of the vertices of the mesh. The surface is then deformed according to the deformed mesh. | 05-16-2013 |
20150269706 | Deforming a Surface via a Control Point - Methods and apparatus for manipulating digital images. A warping module is described that enables the manipulation of a surface by selectively deforming portions of the surface while maintaining local rigidity. The user may position multiple control points on a surface to constrain deformation. The user may specify multiple properties (e.g., translation, rotation, depth, and scale) at each control point. A mesh may be overlaid on the surface. The warping module may perform an initialization in which the properties are propagated other vertices in the mesh to generate an initial deformed mesh. The warping module may then perform an iterative optimization operation on the deformed mesh to improve the deformation while retaining local rigidity. Thus, instead of moving every pixel in the surface, the warping module moves or adjusts coordinates of the vertices of the mesh. The surface is then deformed according to the deformed mesh. | 09-24-2015 |
Sarah Aye Kong, Cupertino, CA US
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20150030246 | Simulating Strobe Effects with Digital Image Content - Systems and methods are provided for simulating strobe effects with digital image content. In one embodiment, an image manipulation application can receive image content. The image manipulation application can generate blurred image content by applying a blurring operation to a portion of the received image content along a blur trajectory. The image manipulation application can sample pixels from multiple positions in the received image content along the blur trajectory. The image manipulation application can generate a simulated strobe images based on the sampled pixels and at least some of the blurred image content. | 01-29-2015 |
Seong Deok Kong, La Jolla, CA US
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20110053878 | ACID-SENSITIVE LINKERS FOR DRUG DELIVERY - The invention is in general directed to acid-sensitive linkers, and methods of use thereof, such as, for example, in drug delivery methods. | 03-03-2011 |
Seung-Hyun Kong, San Diego, CA US
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20100087205 | METHODS AND APPARATUSES FOR USE IN MOBILE DEVICE POSITIONING SYSTEMS - Methods and apparatuses are provided which may be adapted for use in and/or with mobile device positioning systems and/or the like. In an example, a method may include accessing a plurality of measurements associated with a plurality of location signals as received by the mobile device from at least a first portion of a plurality of transmitters. The method may include dynamically establishing at least one location signal transmission parameter based, at least in part, on the plurality of measurements. The location signal transmission parameter(s) may be adapted for use by at least a second portion of the plurality of transmitters to operatively initiate subsequent transmission of an additional plurality of location signals adapted to be received by the mobile device. | 04-08-2010 |
20100260150 | METHODS AND APPARATUSES FOR PROVIDING PEER-TO-PEER POSITIONING IN WIRELESS NETWORKS - Methods and apparatus are provided for use in wireless networks to provide and/or otherwise support peer-to-peer positioning operations. | 10-14-2010 |
20120231807 | FREQUENCY AND TIMING CONTROL FOR FEMTOCELL - Techniques are provided for frequency and/or timing synchronization of a small base station with a network. In one example, small base station may be configured to detect a macro signal of a macro base station, and set a frequency reference based at least in part on the macro signal, in response to the macro signal being available in a different band than that for the small base station. The small base station may be configured to set the frequency reference based at least in part on a Global Positioning System (GPS) signal, in response to detecting that the different band macro signal is not available. | 09-13-2012 |
Shyang Kye Kong, San Diego, CA US
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20090296857 | Frequency lock detection - A system and method are provided for detecting the frequency acquisition of a synthesized signal in a non-synchronous communications receiver. The method accepts a non-synchronous communication signal having an input data signaling frequency, and compares the input data signaling frequency to a synthesized signal frequency. In response to the comparing, a difference signal pulse is generated. More explicitly, the difference signal is generated at a rate responsive to the difference between the input data signaling frequency and the synthesized signal frequency. The method counts synthesized signal pulses occurring simultaneously with the difference signal pulse. If the counted synthesized signal pulses exceed a threshold (before the disappearance of the difference signal pulse), it is determined that the input data signaling frequency is about equal to the synthesized signal frequency, and a lock signal is generated. | 12-03-2009 |
Stephen Bradford Kong, Alamo, CA US
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20080255023 | Low Residue Cleaning Solution - The present invention relates to cleaning compositions containing C8-C10 alkylpolyglucosides which have low filming and streaking when combined with C2-C4 alcohols. The cleaning compositions can optionally comprise dyes, builders, fatty acids, fragrances, colorants, glycerol, anti-foaming agents, and preservatives. | 10-16-2008 |
20090118154 | Acidic Cleaning Compositions - A cleaning composition with a limited number of natural ingredients contains alkyl polyglucoside, a 2-hydroxylcarboxylic acid, and a fragrance containing lemon oil or d-limonene. The cleaning composition optionally has a small amount of dye, colorant, and preservative. The cleaning composition can be used to clean hard surfaces and cleans as well or better than commercial compositions containing synthetically derived cleaning agents. | 05-07-2009 |
20100330139 | Substrate With Low Residue Cleaning Composition - The present invention relates to substrate loaded with a cleaning composition containing C8-C10 alkylpolyglucosides which have low filming and streaking when combined with C2-C4 alcohols. The cleaning composition may also comprises a C2 to C4 alcohol, a water-soluble organic acid and a glycerol. The cleaning composition may optionally comprise dyes, builders, fatty acids, fragrances, colorants, glycerol, anti-foaming agents, and preservatives. The nonwoven substrate material comprises unmodified and modified natural fibers. The nonwoven substrate material is at least 90% biodegradable under compost conditions. The substrate loaded with the cleaning composition is also at least 90% biodegradable under compost conditions. | 12-30-2010 |
Wen Zhong Kong, Newark, CA US
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20110229734 | Immersion platinum plating solution - A platinum plating solution for immersion plating a continuous film of platinum on a metal structure. The immersion platinum plating solution is free of a reducing agent. The plating process does not require electricity (e.g., electrical current) and does not require electrodes (e.g., anode and/or cathode). The solution includes a platinum source and a complexing agent including Oxalic Acid. The solution enables immersion plating of platinum onto a metal surface, a metal substrate, or a structure of which at least a portion is a metal. The resulting platinum plating comprises a continuous thin film layer of platinum having a thickness not exceeding 300 Å. The solution can be used for plating articles including but not limited to jewelry, medical devices, electronic structures, microelectronics structures, MEMS structures, nano-sized or smaller structures, structures used for chemical and/or catalytic reactions (e.g., catalytic converters), and irregularly shaped metal surfaces. | 09-22-2011 |
20120012897 | Vertically Fabricated BEOL Non-Volatile Two-Terminal Cross-Trench Memory Array with Two-Terminal Memory Elements and Method of Fabricating the Same - A non-Flash non-volatile cross-trench memory array formed using an array of trenches formed back-end-of-the-line (BEOL) over a front-end-of-the-line (FEOL) substrate includes two-terminal memory elements operative to store at least one bit of data that are formed at a cross-point of a first trench and a second trench. The first and second trenches are arranged orthogonally to each other. At least one layer of memory comprises a plurality of the first and second trenches to form a plurality of memory elements. The non-volatile memory can be used to replace or emulate other memory types including but not limited to embedded memory, DRAM, SRAM, ROM, and FLASH. The memory is randomly addressable down to the bit level and erase or block erase operation prior to a write operation are not required. | 01-19-2012 |
20120315503 | IMMERSION PLATINUM PLATING SOLUTION - A platinum plating solution for immersion plating a continuous film of platinum on a metal structure. The immersion platinum plating solution is free of a reducing agent. The plating process does not require electricity (e.g., electrical current) and does not require electrodes (e.g., anode and/or cathode). The solution includes a platinum source and a complexing agent including Oxalic Acid. The solution enables immersion plating of platinum onto a metal surface, a metal substrate, or a structure of which at least a portion is a metal. The resulting platinum plating comprises a continuous thin film layer of platinum having a thickness not exceeding 300 Å. The solution can be used for plating articles including but not limited to jewelry, medical devices, electronic structures, microelectronics structures, MEMS structures, nano-sized or smaller structures, structures used for chemical and/or catalytic reactions (e.g., catalytic converters), and irregularly shaped metal surfaces. | 12-13-2012 |
20140346035 | ELECTROPLATING APPARATUS WITH IMPROVED THROUGHPUT - One embodiment provides an electroplating apparatus, which includes a tank filled with an electrolyte solution, a number of anodes situated around edges of the tank, a cathode situated above the tank, and a plurality of wafer-holding jigs attached to the cathode. A respective wafer-holding jig includes a common connector electrically coupled to the cathode and a pair of wafer-mounting frames electrically coupled to the common connector. Each wafer-mounting frame includes a plurality of openings, and a respective opening provides a mounting space for a to-be-plated solar cell, thereby facilitating simultaneous plating of front and back surfaces of the plurality of the solar cells. | 11-27-2014 |
Wuyi Kong, Sunnyvale, CA US
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20150079045 | NPRCPS, PFDNCS AND USES THEREOF - Identification of a group of novel particle termed “non-platelet RNA-containing particles (NPRCP)” provides novel compositions, downstream products and therapeutic tools. In addition a group of mixed NPRCPs were identified that contain RNAs and proteins. NPRCPs do not have a nucleus and their membrane is not the typical eukaryotic cell membrane. Methods for isolation and enrichment are also provided. | 03-19-2015 |
Wuyi Kong, San Jose, CA US
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20090155226 | Regenerative Dot cells - Methods and compositions are provided for the isolation, culture and use of highly regenerative somatic mammalian cells. The cells are very small, and have an undefined nuclear structure. The cells may be isolated from fetal or adult tissues, and are found in tissue including, without limitation, fetal dermal tissue, blood, and bone marrow. The cells are characterized as expressing one or more markers selected from E-cadherin, integrin β1, CXCR4, CD90 and CD34, and may be selected on the basis of such expression patterns. | 06-18-2009 |
Xiangming Kong, Thousand Oaks, CA US
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20110122924 | RAPID ACQUISITION METHOD FOR IMPULSE ULTRA-WIDEBAND SIGNALS - A method is provided that determines a delay and phase of an ultra-wide band signal in a communication system using a single correlator. A pulse search is executed that includes correlating a signal template with a UWB signal and sampling a preamble of the UWB signal at various time positions until a pulse in the signal template matches a pulse in the preamble. A chip boundary at which the pulse in the preamble is detected is identified using the signal template. A code search is executed for determining the correct phase of the received signal. The code search utilizes a plurality of phases having a same time-hopping sequence as the received signal. Each pulse of the phases is positioned at the determined chip boundary within each respective chip pulse position. Chips pulse positions of the phases are compared with the chip pulse positions of the UWB signal for determining a phase match. | 05-26-2011 |
Xiangxu Kong, Foster City, CA US
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20090325260 | CIS REACTIVE OXYGEN QUENCHERS INTEGRATED INTO LINKERS - The present invention provides methods and compositions for performing illuminated reactions, particularly sequencing reactions, while mitigating and/or preventing photodamage to reactants that can result from prolonged illumination. In particular, the invention provides methods and compositions for incorporating photoprotective agents into conjugates comprising reporter molecules and nucleoside polyphosphates. | 12-31-2009 |
20100136592 | Photo-Induced Damage Mitigating Agents and Preparation and Methods of Use Thereof - Compositions, devices, systems and methods for reducing and/or preventing photo-induced damage of one or more reactants in an illuminated analytical reaction by addition of one or more photo-induced damage mitigating agents to the reaction mixture and allowing the reaction to proceed for a period that is less than a photo-induced damage threshold period. | 06-03-2010 |
20100255488 | FRET-LABELED COMPOUNDS AND USES THEREFOR - FRET-labeled compounds are provided for use in analytical reactions. In certain embodiments, FRET-labeled nucleotide analogs are used in place of naturally occurring nucleoside triphosphates or other analogs in analytical reactions comprising nucleic acids, for example, template-directed nucleic acid synthesis, DNA sequencing, RNA sequencing, single-base identification, hybridization, binding assays, and other analytical reactions. | 10-07-2010 |
Xiangxu Kong, Union City, CA US
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20130071849 | FRET-LABELED COMPOUNDS AND USES THEREFOR - FRET-labeled compounds are provided for use in analytical reactions. In certain embodiments, FRET-labeled nucleotide analogs are used in place of naturally occurring nucleoside triphosphates or other analogs in analytical reactions comprising nucleic acids, for example, template-directed nucleic acid synthesis, DNA sequencing, RNA sequencing, single-base identification, hybridization, binding assays, and other analytical reactions. | 03-21-2013 |
20140038178 | CIS Reactive Oxygen Quenchers Integrated into Linkers - The present invention provides methods and compositions for performing illuminated reactions, particularly sequencing reactions, while mitigating and/or preventing photodamage to reactants that can result from prolonged illumination. In particular, the invention provides methods and compositions for incorporating photoprotective agents into conjugates comprising reporter molecules and nucleoside polyphosphates. | 02-06-2014 |
20150079603 | PHOTODAMAGE MITIGATION COMPOUNDS AND SYSTEMS - Compositions, devices, systems and methods for reducing and/or preventing photo-induced damage of one or more reactants in an illuminated analytical reaction by addition of one or more photoprotective compounds to the reaction mixture and allowing the reaction to proceed for a period that is less than a photo-induced damage threshold period. | 03-19-2015 |
Xiangyun Kong, Santa Clara, CA US
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20140143755 | SYSTEM AND METHOD FOR INSERTING SYNCHRONIZATION STATEMENTS INTO A PROGRAM FILE TO MITIGATE RACE CONDITIONS - A system and method are provided for inserting synchronization statements into a program file to mitigate race conditions. The method includes reading a program file and determining one or more convergent statements in the program file. The method also includes inserting one or more synchronization statements in the program file between the determined convergent statements. The method further includes removing one or more of the inserted synchronization statements and writing the modified program file. The method may include, after removing the inserted synchronization statements, identifying to a user any remaining inserted synchronization statements. | 05-22-2014 |
Xiangyun Kong, Union City, CA US
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20090217253 | COMPILER FRAMEWORK FOR SPECULATIVE AUTOMATIC PARALLELIZATION WITH TRANSACTIONAL MEMORY - A computer program is speculatively parallelized with transactional memory by scoping program variables at compile time, and inserting code into the program at compile time. Determinations of the scoping can be based on whether scalar variables being scoped are involved in inter-loop non-reduction data dependencies, are used outside loops in which they were defined, and at what point in a loop a scalar variable is defined. The inserted code can include instructions for execution at a run time of the program to determine loop boundaries of the program, and issue checkpoint instructions and commit instructions that encompass transaction regions in the program. A transaction region can include an original function of the program and a spin-waiting loop with a non-transactional load, wherein the spin-waiting loop is configured to wait for a previous thread to commit before the current transaction commits. | 08-27-2009 |
20130113809 | TECHNIQUE FOR INTER-PROCEDURAL MEMORY ADDRESS SPACE OPTIMIZATION IN GPU COMPUTING COMPILER - A device compiler and linker is configured to optimize program code of a co-processor enabled application by resolving generic memory access operations within that program code to target specific memory spaces. In situations where a generic memory access operation cannot be resolved and may target constant memory, constant variables associated with those generic memory access operations are transferred to reside in global memory. | 05-09-2013 |
20130117734 | TECHNIQUE FOR LIVE ANALYSIS-BASED REMATERIALIZATION TO REDUCE REGISTER PRESSURES AND ENHANCE PARALLELISM - A device compiler and linker within a parallel processing unit (PPU) is configured to optimize program code of a co-processor enabled application by rematerializing a subset of live-in variables for a particular block in a control flow graph generated for that program code. The device compiler and linker identifies the block of the control flow graph that has the greatest number of live-in variables, then selects a subset of the live-in variables associated with the identified block for which rematerializing confers the greatest estimated profitability. The profitability of rematerializing a given subset of live-in variables is determined based on the number of live-in variables reduced, the cost of rematerialization, and the potential risk of rematerialization. | 05-09-2013 |
20130117735 | ALGORITHM FOR 64-BIT ADDRESS MODE OPTIMIZATION - One embodiment of the present invention sets forth a technique for extracting a memory address offset from a 64-bit type-conversion expression included in high-level source code of a computer program. The technique involves receiving the 64-bit type-conversion expression, where the 64-bit type-conversion expression includes one or more 32-bit expressions, determining a range for each of the one or more 32-bit expressions, calculating a total range by summing the ranges of the 32-bit expressions, determining that the total range is a subset of a range for a 32-bit unsigned integer, calculating the memory address offset based on the ranges for the one or more 32-bit expressions, and generating at least one assembly-level instruction that references the memory address offset. | 05-09-2013 |
20130305021 | METHOD FOR CONVERGENCE ANALYSIS BASED ON THREAD VARIANCE ANALYSIS - Basic blocks within a thread program are characterized for convergence based on variance analysis or corresponding instructions. Each basic block is marked as divergent based on transitive control dependence on a block that is either divergent or comprising a variant branch condition. Convergent basic blocks that are defined by invariant instructions are advantageously identified as candidates for scalarization by a thread program compiler. | 11-14-2013 |
Xiaohua Kong, San Diego, CA US
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20100321102 | Leakage Reduction in Electronic Circuits - In one embodiment, an apparatus for reducing leakage in an electronic circuit (e.g., a CMOS circuit) includes a power switch transistor configured to selectively couple or decouple a voltage to a logic portion of the electronic circuit. The power switch transistor receives a first voltage during an active mode of the electronic circuit and receives a second voltage during a sleep mode of the electronic circuit. The power switch transistor has a bulk region that is biased using the first voltage during sleep mode. The power switch transistor has a gate region that is biased using the first voltage during sleep mode. | 12-23-2010 |
20110193589 | On-Chip Sensor For Measuring Dynamic Power Supply Noise Of The Semiconductor Chip - An on-chip sensor measures dynamic power supply noise, such as voltage droop, on a semiconductor chip. In-situ logic is employed, which is sensitive to noise present on the power supply of functional logic of the chip. Exemplary functional logic includes a microprocessor, adder, and/or other functional logic of the chip. The in-situ logic performs some operation, and the amount of time required for performing that operation (i.e., the operational delay) is sensitive to noise present on the power supply. Thus, by evaluating the operational delay of the in-situ logic, the amount of noise present on the power supply can be measured. | 08-11-2011 |
20120109356 | Method and Digital Circuit for Recovering a Clock and Data from an Input Signal Using a Digital Frequency Detection - In a particular embodiment, a digital circuit includes a frequency detection circuit operative to compare information related to transitions between sequential samples of a received signal. The frequency detection circuit is further operative to generate a control signal to reduce a sampling rate of the received signal in response to a predetermined number of the sequential samples having a same value. The digital circuit also includes a digital phase detector operative to provide the information related to the transitions between sequential samples to the frequency detection circuit. | 05-03-2012 |
20120112809 | METHOD AND DIGITAL CIRCUIT FOR GENERATING A WAVEFORM FROM STORED DIGITAL VALUES - In a particular embodiment, a method includes adjusting an input to a divider on a feedback path of a phase locked loop circuit based on a stored digital value representing a portion of a time-based waveform that is applied to a modulator circuit. The stored digital value is retrieved based on an output of the feedback path. | 05-10-2012 |
20120177159 | Full Digital Bang Bang Frequency Detector with No Data Pattern Dependency - A bang-bang frequency detector with no data pattern dependency is provided. In examples, the detector recovers a clock from received data, such as data having a non-return to zero (NRZ) format. A first bang-bang phase detector (BBPD) provides first phase information about a phase difference between a sample clock and the clock embedded in the received data. A second BBPD provides second phase information about a second phase difference between the clock embedded in the received data and a delayed version of the sample clock. A frequency difference between the sample clock and the clock embedded in the received data is determined based on the first and second phase differences. The frequency difference can be used to adjust the frequency of the sample clock. A lock detector can be coupled to a BBPD output to determine if the sample clock is locked to the clock embedded in the received data. | 07-12-2012 |
20120218005 | Semiconductor Device Having On-Chip Voltage Regulator - A semiconductor device having an on-chip voltage regulator to control on-chip voltage regulation and methods for on-chip voltage regulation are disclosed. A semiconductor device includes a circuit positioned between a ground bus and a power bus. A power switch array is positioned between the circuit and one of the ground bus or the power bus to generate a virtual voltage across the circuit. A monitor is positioned between the ground bus and the power bus. The monitor is configured to simulate a critical path of the circuit and to output a voltage adjust signal based on an output of the simulated critical path. A controller is configured to receive the voltage adjust signal and to output a control signal to the power switch array to control the virtual voltage. | 08-30-2012 |
20130030767 | HIGH SPEED DATA TESTING WITHOUT HIGH SPEED BIT CLOCK - System and method for testing a high speed data path without generating a high speed bit clock, includes selecting a first high speed data path from a plurality of data paths for testing. Coherent clock data patterns are driven on one or more of remaining data paths of the plurality of data paths, wherein the coherent clock data patterns are in coherence with a low speed base clock. The first high speed data path is sampled by the coherent clock data patterns to generate a sampled first high speed data path, which is then tested at a speed of the low speed base clock. | 01-31-2013 |
20130033287 | Balanced Single-Ended Impedance Control - A balanced single-end impedance control system is disclosed. In a particular embodiment, the circuit includes a first transistor coupled to a first output terminal and a second transistor coupled to a second output terminal. The circuit also includes a third transistor and a fourth transistor, where device characteristics of the third transistor substantially match device characteristics of the first transistor and device characteristics of the fourth transistor substantially match device characteristics of the second transistor. The circuit further includes a first control path and a second control path. The first path is coupled to the third transistor and provides a first rail voltage to control a first gate control voltage of the first transistor. The second control path is coupled to the fourth transistor and provides a second rail voltage to control a second gate control voltage of the second transistor. The impedances of the first and second transistors may be controlled by the first gate control voltage and the second gate control voltage respectively. | 02-07-2013 |
20130033329 | System and Method of Controlling Gain of an Oscillator - A circuit includes a controllable oscillator and a controller coupled to the controllable oscillator. The controller is configured to provide a current control and a gain control to the controllable oscillator. The gain control is configured to change a gain of the controllable oscillator during a calibration process. | 02-07-2013 |
20130120020 | ADAPTIVE OUTPUT SWING DRIVER - An adjustable gain line driver receives an input signal and a gain control signal and outputs a signal with a swing, and the swing is measured to generate a swing measurement signal. A target swing signal is generated having a target swing, and the target swing signal is measured to generate a target swing reference signal. The swing measurement signal is compared to the target swing reference control signal and a counter generating the gain control signal is incremented until the measurement signal meets the target swing reference signal. Optionally a reset signal resets the counter, and the gain control signal, at predetermined events. | 05-16-2013 |
20130120028 | METHOD, SYSTEM, AND CIRCUIT WITH A DRIVER OUTPUT INTERFACE HAVING A COMMON MODE CONNECTION COUPLED TO A TRANSISTOR BULK CONNECTION - A multi-terminal output with a common mode connection includes an output having a first terminal and a second terminal and having a common mode connection between the first terminal and the second terminal. A bulk connection of a transistor is coupled to the common mode connection. A first set of control signals and a second set of control signals are generated. Each of the first set of control signals has a first rail voltage level associated with a first power domain. The second set of control signals is generated from the first set of control signals. Each of the second set of control signals has a second rail voltage level that is associated with a second power domain. The second power domain is associated with a common mode voltage of outputs of an output driver. | 05-16-2013 |
20130120029 | HIGH-SPEED PRE-DRIVER AND VOLTAGE LEVEL CONVERTER WITH BUILT-IN DE-EMPHASIS FOR HDMI TRANSMIT APPLICATIONS - In an example, a high-speed pre-driver and voltage level converter with built-in de-emphasis for HDMI transmit applications is provided. An exemplary integrated circuit includes a serializer, a pre-driver coupled to receive a differential input from the serializer, and a driver. The pre-driver includes all-p-type metal-oxide-silicon (PMOS) cross-coupled level converter comprising four PMOS transistors and two de-emphasis PMOS transistors forming a de-emphasis tap coupled to the output of the cross-coupled level converter. The driver is coupled to the pre-driver output and is configured to receive a differential input from the pre-driver. | 05-16-2013 |
20130120036 | APPARATUS AND METHOD FOR RECOVERING BURST-MODE PULSE WIDTH MODULATION (PWM) AND NON-RETURN-TO-ZERO (NRZ) DATA - A gated voltage controlled oscillator has four identically structured delay cells, each of the delay cells having the same output load by connecting to the same number of inputs of other ones of the delay cells. Optionally a four phase sampling clock selects from the delay cell output and samples, at a four phase sampler, an input signal. Optionally an edge detector synchronizes the phase of the gated voltage controlled oscillator to coincide with NRZ bits. Optionally a variable sampling rate selects different phases from the delay cells to selectively sample NRZ bits at a lower rate. Optionally, a pulse width modulation (PWM) mode synchronizes a phase of the sampling clock to sample PWM symbols and recover encoded bits. | 05-16-2013 |
20130120040 | SYSTEM AND METHOD OF STABILIZING CHARGE PUMP NODE VOLTAGE LEVELS - A method includes tracking a tuning voltage at a first circuit coupled to a first drain node of a first supply of a charge pump. The method also includes tracking the tuning voltage at a second circuit coupled to a second drain node of a second supply of the charge pump. The method further includes stabilizing a first voltage of the first drain node and a second voltage of the second drain node responsive to the tuning voltage. | 05-16-2013 |
20130120071 | TUNING VOLTAGE RANGE EXTENSION CIRCUIT AND METHOD - A circuit includes a first path including a first transistor and a first current source. The first transistor is responsive to a tuning voltage. The circuit also includes a tuning voltage range extension circuit responsive to the tuning voltage. The tuning voltage range extension circuit is configured to selectively change current supplied by the first path as the tuning voltage exceeds a capacity threshold of the first transistor. | 05-16-2013 |
20130120072 | SYSTEM AND METHOD OF CALIBRATING A PHASE-LOCKED LOOP WHILE MAINTAINING LOCK - A method of calibrating a phase-locked loop (PLL) while maintaining lock includes detecting that a control signal to an oscillator in a PLL has exceeded a threshold value while the PLL is locked to an input signal. In response, an operating current of the oscillator is adjusted to return the control signal below the threshold value while maintaining lock of the PLL to the input signal. Adjusting the operating current includes slowly varying an output current of a calibration circuit coupled to the PLL, enabling the PLL to maintain lock to the input signal during adjustment of the operating current. | 05-16-2013 |
20130187717 | RECEIVER EQUALIZATION CIRCUIT - A receiver equalization circuit includes a first output transistor having a gate coupled to an input signal. The receiver equalization circuit may also include a second output transistor having a drain coupled to a drain of the first output transistor. The receiver equalization circuit may also include a resistor coupled between a gate and a drain of the second output transistor to provide a direct current (DC) bias to the gate of the second output transistor. The receiver equalization circuit may further include a feed-through capacitor coupled between the gate of the second output transistor and an input signal source. The feed-through capacitor feeds the input signal to the gate of the second output transistor when a frequency of the input signal is above a predetermined threshold. The feed-through capacitor and the resistor define a signal gain amplification point. | 07-25-2013 |
20130191679 | DUAL MODE CLOCK/DATA RECOVERY CIRCUIT - A clock/data recovery circuit includes an edge detector circuit operable to receive a serial data burst and to generate a reset signal in response to a first edge of the serial data burst. The clock/data recovery circuit may also include an oscillator coupled to the edge detector circuit. The oscillator locks onto a target data rate prior to receipt of the serial data burst and locks onto a phase of the serial data burst in response to the reset signal. The clock/data recovery circuit may also include a phase detector circuit that receives the serial data burst. The phase detector circuit is coupled to the oscillator. The phase detector circuit adjusts the oscillator to maintain the lock onto the phase of the serial data burst during the serial data burst. | 07-25-2013 |
20130216014 | AUTOMATIC DETECTION AND COMPENSATION OF FREQUENCY OFFSET IN POINT-TO-POINT COMMUNICATION - Systems and methods for automatic detection and compensation of frequency offset in point-to-point communication. A burst mode clock and data recovery (CDR) system comprises input data received at a first frequency and a reference clock operating at a second frequency. A master phase-locked loop (PLL) comprising a first gated voltage controlled oscillator (GVCO) is configured to align the phases of reference clock and the input data, and provide phase error information and a recovered clock. A second GVCO is controlled by the recovered clock to sample the input data. A frequency alignment loop comprising a feedback path from the second GVCO to the master PLL is configured to use the phase error information to correct a frequency offset between the first frequency and the second frequency. | 08-22-2013 |
20130285696 | ON-CHIP SENSOR FOR MEASURING DYNAMIC POWER SUPPLY NOISE OF THE SEMICONDUCTOR CHIP - An on-chip sensor measures dynamic power supply noise, such as voltage droop, on a semiconductor chip. In-situ logic is employed, which is sensitive to noise present on the power supply of functional logic of the chip. Exemplary functional logic includes a microprocessor, adder, and/or other functional logic of the chip. The in-situ logic performs some operation, and the amount of time required for performing that operation (i.e., the operational delay) is sensitive to noise present on the power supply. Thus, by evaluating the operational delay of the in-situ logic, the amount of noise present on the power supply can be measured. | 10-31-2013 |
20140035549 | MULTI-STANDARD, AUTOMATIC IMPEDANCE CONTROLLED DRIVER WITH SUPPLY REGULATION - A pre-driver circuit generates a driver bias signal based on a swing command, a driver impedance characteristic, and an input signal. A driver receives the driver bias signal and generates, in response, a driver signal having a swing and having an output impedance corresponding to the bias signal. Optionally, the driver receives power from a switchable one of multiple supply rails, according to the swing. Optionally, the driver has voltage controlled resistor elements and the driver bias signal is generated based on the swing command and a replica of the driver voltage controlled resistor elements. | 02-06-2014 |
20140098843 | DIGITALLY CONTROLLED JITTER INJECTION FOR BUILT IN SELF-TESTING (BIST) - A digitally controlled jitter injection apparatus for built in self-testing includes a transceiver circuit having a transmitter circuit and a receiver circuit. The digitally controlled jitter injection apparatus also includes a generator that generates a composite jitter including multi-tone jitter components. The digitally controlled jitter injection apparatus also includes a processor operable to digitally inject the composite jitter into a receiver circuit and/or a transmitter circuit of the transceiver circuit. | 04-10-2014 |
20140101507 | HIGH SPEED DATA TESTING WITHOUT HIGH SPEED BIT CLOCK - System and method for testing a high speed data path without generating a high speed bit clock, includes selecting a first high speed data path from a plurality of data paths for testing. Coherent clock data patterns are driven on one or more of remaining data paths of the plurality of data paths, wherein the coherent clock data patterns are in coherence with a low speed base clock. The first high speed data path is sampled by the coherent clock data patterns to generate a sampled first high speed data path, which is then tested at a speed of the low speed base clock. | 04-10-2014 |
20140149756 | POWER SAVING DURING A CONNECTION DETECTION - In a particular embodiment, an electronic device includes a direct current (DC) voltage source coupled to a DC interface. The electronic device includes a receiver sense circuit configured to detect a connection of the electronic device to a sink device via a connector without consuming power from the DC voltage source. The electronic device further includes a controller coupled to a hot plug detect (HPD) interface. The controller is configured to receive a detection signal from the receiver sense circuit, selectively control a switch to enable and disable the DC voltage source based on the detection signal, detect an HPD signal at the HPD interface after enabling the DC voltage source, and disable the receiver sense circuit in response to detecting the HPD signal. | 05-29-2014 |
20140176196 | METHOD AND APPARATUS FOR MULTI-LEVEL DE-EMPHASIS - A distribution current is split into a first control current, a second control current, and a third control current, in an apportionment according to a distribution command. A first control voltage is generated in response to the third control current. A second control voltage is generated as indication of the first control current, and a third control voltage is generated as indication of the second control current. Optionally, de-emphasis contribution of a first driver, a second driver and a third driver to an output is controlled based, at least in part, on the first control voltage, the second control voltage and the third control voltage, respectively. | 06-26-2014 |
20140256276 | UNIFIED FRONT-END RECEIVER INTERFACE FOR ACCOMMODATING INCOMING SIGNALS VIA AC-COUPLING OR DC-COUPLING - Techniques for accommodating an incoming signal at a front-end receiver via AC-coupling or DC-coupling are described herein. In one aspect, a front-end receiver comprises a differential input with a first data line and a second data line for receiving an incoming signal. The front-end receiver also comprises an AC-coupled switch coupled to the differential input, wherein the AC-coupled switch is configured to both perform high-pass filtering on the incoming signal and offset the filtered incoming signal with a DC-offset voltage if an AC-coupling mode of the receiver is enabled. The front-end receiver further comprises a DC-coupled switch coupled to the differential input, wherein the DC-coupled switch is configured to shift a common-mode voltage of the incoming signal if a DC-coupling mode of the receiver is enabled. | 09-11-2014 |
20150261249 | CLOCK PULSE GENERATOR FOR MULTI-PHASE SIGNALING - A clock generator is provided that is immune to skew between bits in digital words generated by a multi-phase receiver. | 09-17-2015 |
20150280695 | SYSTEMS AND METHODS FOR COMMON MODE LEVEL SHIFTING - A common mode voltage level shifting circuit including: input nodes configured to receive a differential signal with a first common mode voltage, a pair of shunt capacitors coupled between the input nodes and a corresponding pair of output nodes, a threshold voltage circuit, including the output nodes, coupled to the differential signal though the shunt capacitors, the threshold voltage circuit configured to provide a second common mode voltage for the differential signal at the output nodes, and current sources that are controlled according to a level of the first common mode voltage, the current sources coupled to the output nodes to effect the second common mode voltage. | 10-01-2015 |
Xiaohua Kong, Irvine, CA US
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20090172452 | System and Method of Leakage Control in an Asynchronous System - Systems and methods of leakage control in an asynchronous pipeline are disclosed. In an embodiment, a signal is received from a preceding stage at an operative stage of an asynchronous circuit device, and a switch associated with the operative stage is activated in response to the control signal being sent to the operative stage to enable power to the operative stage. | 07-02-2009 |
20110084685 | Power Saving for Hot Plug Detect - Power saving for hot plug detect (HPD) is disclosed. In a particular embodiment, a method includes detecting, at a source device that is connectable to a sink device, a connection of the source device to the sink device via a connector. The source device includes a DC voltage source and the connection is detected without consuming power from the DC voltage source. | 04-14-2011 |
Yanhong Kong, Hercules, CA US
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20120122158 | PCR FOR DNA THAT IS RESISTANT TO AMPLIFICATION - DNA that is difficult to amplify by conventional PCR is amplified by a modified PCR process that includes a high-temperature, short-term heating step as the last step of each thermal cycle, following the conventional denaturing and annealing/elongation steps. | 05-17-2012 |
20130035239 | FILTERING SMALL NUCLEIC ACIDS USING PERMEABILIZED CELLS - Filtering small nucleic acids using permeabilized cells and methods for using the filtering to detect genomic DNA accessibility are described. | 02-07-2013 |
20140220586 | FILTERING SMALL NUCLEIC ACIDS USING PERMEABILIZED CELLS - Filtering small nucleic acids using permeabilized cells and methods for using the filtering to detect genomic DNA accessibility are described. | 08-07-2014 |
Yen Peng Kong, Irvine, CA US
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20080210757 | Identification Tag, Object Adapted to Be Identified, and Related Methods, Devices, and Systems - Disclosed is an object ( | 09-04-2008 |