Yasushige
Yasushige Abe, Oita JP
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20150053239 | WAFER CARRIER CLEANING METHOD - According to one embodiment, a wafer carrier cleaning method is provided. The wafer carrier cleaning method includes cleaning a wafer carrier with a chemical solution containing a weak acid that can dissolve metals, and cleaning the wafer carrier cleaned with the chemical solution, with pure water. The weak acid contained in the chemical solution is preferably citric acid that can dissolve heavy metals and does not damage the wafer carrier. | 02-26-2015 |
Yasushige Baba, Hyogo JP
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20160137043 | DOOR SEAL, AND VEHICLE DOOR - The present invention suppresses sudden increases and decreases of the atmospheric pressure inside a door even when the atmospheric pressure difference between outside and inside of the door is suddenly increased. A door seal includes: a first seal mechanism including a first seal portion provided at a door end of the door and a second seal portion configured to contact the first seal portion when the door is closed; and a second seal mechanism including a third seal portion provided at the door end of the door and positioned differently in a thickness direction of the door from the first seal portion and a fourth seal portion configured to contact the third seal portion when the door is closed. | 05-19-2016 |
Yasushige Hori, Nagano-Ken JP
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20080267666 | Developing Device, Image Forming Apparatus, Image Forming System, Cartridge, Developing Unit and Photoconductor Unit - A developing device that can be mounted to and dismounted from a mounting and dismounting section provided in an image forming apparatus main unit, the developing device includes: a developing device main unit; a positioning member for positioning the developing device main unit with respect to the mounting and dismounting section by engaging the mounting and dismounting section when the developing device is mounted to the mounting and dismounting section, the positioning member being fixed on a one end side in a longitudinal direction of the developing device main unit; a coupling member that is to be coupled to the mounting and dismounting section when the developing device is mounted to the mounting and dismounting section, the coupling member being attached to the other end side in the longitudinal direction of the developing device main unit in such a manner that its relative position to the developing device main unit can be changed; and an element capable of communication in a noncontacting manner with the image forming apparatus main unit side when the developing device is mounted to the mounting and dismounting section, the element being provided at the one end side in the longitudinal direction of the developing device main unit. | 10-30-2008 |
Yasushige Ishii, Shimizu-Cho JP
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20150144220 | PIPE HAVING HEAT-RESISTANT AND CORROSION-RESISTANT PLATING LAYER THAT HAS EXCELLENT WORKABILITY - Provided is a pipe having a heat-resistant and corrosion-resistant multi-layered plated layer excellent in workability. The pipe includes a multi-layered plated layer including: a ZnNi alloy plated layer that has a Ni content of 5% to 9% and a layer thickness of 3 μm to 9 μm and is formed as a first layer on a surface of a base steel pipe; another ZnNi alloy plated layer that has a Ni content of 10% to 15% and a layer thickness of 1 μm to 3 μm and is deposited as a second layer on the ZnNi alloy plated layer formed as the first layer; and a chromate film that is formed on the ZnNi alloy plated layer formed as the second layer. | 05-28-2015 |
Yasushige Kuroda, Okayama JP
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20090274617 | Adsorbent - An absorbent of ZSM-5 zeolite ion-exchanged with copper ion, characterized in that at least 60% or more of the copper sites in the copper ion-exchanged ZSM-5 zeolite are copper (I) sites and preferably at least 70% or more of the copper (I) sites are three-oxygen-coordinated copper (I) sites. | 11-05-2009 |
20150202592 | CARBON DIOXIDE ADSORBENT - Provided is a carbon dioxide adsorbent with which large quantities of carbon dioxide can be adsorbed and removed even under conditions having low carbon dioxide concentrations such as when under subatmospheric pressure or when under an environment having a carbon dioxide partial pressure of less than atmospheric pressure, said carbon dioxide adsorbent exhibiting excellent adsorption activity. A carbon dioxide adsorbent including at least a ZSM-5 zeolite including barium (Ba) or strontium (Sr) is characterized in that the ZSM-5 zeolite includes M-O-M bonds (M being Ba or Sr, and O being oxygen). The M-O-M bonds interact strongly with carbon dioxide, and thus carbon dioxide can be adsorbed effectively and in large volumes even under conditions having low carbon dioxide concentrations. | 07-23-2015 |
Yasushige Nakamura, Ebina-Shi JP
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20080260441 | TONER CARTRIDGE - The toner cartridge is provided with: a toner storing container of a rectangular shape having a toner feeding opening in an angular portion of the toner storing container; a stirring conveying member that is disposed so as to rotate in a predetermined rotation direction in the toner storing container and stirs and conveys toner in the toner storing container toward the toner feeding opening; a waste toner storing container that stores reclaimed toner; and a partition member that is held by the toner storing container, partitions between the toner storing container and the waste toner storing containers and has a bearing portion axially supporting a rotating shaft of the stirring conveying member and extending into inside of the waste toner storing container. The toner stored in the toner storing container has an average value of a shape factor (SF1) of about 130 or less. | 10-23-2008 |
Yasushige Ogawa, Kasugai JP
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20080204067 | SYNCHRONOUS SEMICONDUCTOR DEVICE, AND INSPECTION SYSTEM AND METHOD FOR THE SAME - The present invention provides a synchronous semiconductor device suitable for improving the efficiency of application of electrical stresses to the device, an inspection system and an inspection method thereof in order to efficiently carrying out a burn-in stress test. A command latch circuit having an access command input will output a low-level pulse in synchronism with an external clock. The pulse will pass through a NAND gate of test mode sequence circuit and a common NAND gate to output a low-level internal precharge signal, which will reset a word line activating signal from the control circuit. Simultaneously, an internal precharge signal passing through the NAND gate will be delayed by an internal timer a predetermined period of time to output through the NAND gate a low-level internal active signal, which will set a word line activating signal from the control circuit. | 08-28-2008 |
20100026335 | LEAK CURRENT DETECTION CIRCUIT, BODY BIAS CONTROL CIRCUIT, SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR DEVICE TESTING METHOD - A leak current detection circuit that improves the accuracy for detecting a leak current in a MOS transistor without enlarging the circuit scale. The leak current detection circuit includes at least one P-channel MOS transistor which is coupled to a high potential power supply and which is normally inactivated and generates a first leak current, at least one N-channel MOS transistor which is coupled between a low potential power and at least the one P-channel MOS transistor and which is normally inactivated and generates a second leak current, and a detector which detects a potential generated at a node between the at least one P-channel MOS transistor and the at least one N-channel MOS transistor in accordance with the first and second leak currents. | 02-04-2010 |
20100052727 | SYNCHRONOUS SEMICONDUCTOR DEVICE, AND INSPECTION SYSTEM AND METHOD FOR THE SAME - The present invention provides a synchronous semiconductor device suitable for improving the efficiency of application of electrical stresses to the device, an inspection system and an inspection method thereof in order to efficiently carry out a burn-in stress test. A command latch circuit having an access command input will output a low-level pulse in synchronism with an external clock. The pulse will pass through a NAND gate of test mode sequence circuit and a common NAND gate to output a low-level internal precharge signal, which will resent a word line activating signal from the control circuit. Simultaneously, an internal precharge signal passing through the NAND gate will be delayed by an internal timer a predetermined period of time to output through the NAND gate a low-level internal active signal, which will set a word line activating signal from the control circuit. | 03-04-2010 |
20110012672 | BODY-BIAS VOLTAGE CONTROLLER AND METHOD OF CONTROLLING BODY-BIAS VOLTAGE - A body-bias voltage controller includes: a plurality of transistors at least one of which is supplied with a body-bias voltage; a monitor circuit to detect voltage characteristics of the plurality of transistors and to output a indicator signal; and a body-bias voltage generator to generate the body-bias voltage based upon the indicator signal. | 01-20-2011 |
20120133416 | LEVEL SHIFT CIRCUIT AND SEMICONDUCTOR DEVICE - A level shift circuit including a level conversion unit that converts an input signal having a signal level of a first voltage into a signal having a signal level of a second voltage that is higher than the first voltage. The level conversion unit includes first and second MOS transistors of a first conductivity type and third and fourth MOS transistors of a second conductivity type, which differs from the first conductivity type and of which switching is controlled in accordance with the input signal. The third and fourth MOS transistors include drains supplied with the second voltage via the first and second MOS transistors, respectively. A control unit, when detecting a decrease in the first voltage, controls a body bias of the third and fourth MOS transistors to decrease a threshold voltage of the third and fourth MOS transistors. | 05-31-2012 |
Yasushige Ogawa, Kasuga-Shi JP
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20160056816 | SWITCHING CIRCUIT - A switching circuit is provided by using an FET with a low gate-source breakdown voltage. The switching circuit includes a PLDMOS with a gate-source breakdown voltage that is lower than a gate-drain breakdown voltage and an impedance converting circuit coupled to the source of the PLDMOS and configured to output substantially the same voltage as an input voltage from the source of the PLDMOS. An input impedance of the converting circuit is higher than an output impedance thereof. The switching circuit further includes a gate voltage generating circuit configured to switch voltage applied to the gate of the PLDMOS between a first voltage and a second voltage, wherein the first voltage is substantially the same as an input voltage from the converting circuit, and wherein a difference between the first voltage and the second voltage is lower than the gate-source breakdown voltage of the PLDMOS. | 02-25-2016 |
Yasushige Sakamoto, Ota-Shi JP
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20110304046 | SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME - A semiconductor element ( | 12-15-2011 |
Yasushige Tsuchiya, Tokyo JP
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20150136161 | BASIS WEIGHT MEASURING APPARATUS AND METHOD FOR SHEET TOBACCO, AND MANUFACTURING SYSTEM AND METHOD FOR SHEET TOBACCO - A measuring apparatus for performing a basis weight measuring method for sheet tobacco according to the present invention includes: a light source ( | 05-21-2015 |