Cheol-Ho
Cheol Ho Cho, Bucheon-Si KR
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20100123196 | LDMOS Transistor and Method for Manufacturing the Same - A LDMOS transistor and a method for manufacturing the same are disclosed. A lateral double diffused metal oxide semiconductor (LDMOS) transistor includes a first dielectric layer formed on a top surface of a substrate; a plurality of second dielectric layers on a top surface of the first dielectric layer; a plurality of contact plugs spaced apart by a predetermined distance in an active region of the substrate, passing through the first and second dielectric layers; and a bridge metal line formed in the second dielectric layers, inter-connecting the contact plugs in a horizontal direction. The bridge metal line formed to inter-connect the contact plugs allows for more current to flow in the presently disclosed LDMOS transistor than in a conventional LDMOS transistor of identical size. | 05-20-2010 |
20130082327 | SEMICONDUCTOR DEVICE - A semiconductor device including a first conductive epitaxial layer, a second conductive type first well provided in the first conductive epitaxial layer, a first conductive body provided in the first conductive epitaxial layer, a second conductive type drain extension region provided in the first conductive epitaxial layer and interposed between the first conductive body and the second conductive type first well, a second conductive type second well provided in the second conductive type first well, and a gate provided in the first conductive epitaxial layer. | 04-04-2013 |
Cheol Ho Cho, Gyeonggi-Do KR
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20100148258 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Disclosed are a semiconductor device and a method of manufacturing the same. The semiconductor device includes a substrate formed therein with a first conductive type well, and an LDMOS device formed on the substrate. The LDMOS device includes a gate electrode, gate oxides formed below the gate electrode, a source region formed in the substrate at one side of the gate electrode, and a drain region formed in the substrate at an opposite side of the gate electrode. The gate oxide includes first and second gate oxides disposed side-by-side and having thicknesses different from each other. | 06-17-2010 |
Cheol Ho Choi, Gyeonggi-Do KR
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20120030942 | Method for manufacturing multi-layer printed circuit board - Disclosed herein is a method for manufacturing a multi-layer printed circuit board. The method for manufacturing the multi-layer printed circuit board according to an exemplary embodiment of the present invention includes manufacturing a core substrate on which circuit patterns are formed by patterning copper clads on both sides thereof; laminating insulating films on top and bottom surfaces of the core substrate; and stacking the copper clads provided with bumps on the top and bottom surfaces of the core substrate, respectively, on which the insulating films are laminated. | 02-09-2012 |
20120103662 | Printed circuit board and manufacturing method thereof - Disclosed herein are a printed circuit board including a first low-viscosity solder resist layer formed on one surface of a substrate having circuit patterns formed thereon and a second high-viscosity solder resist layer stacked on the first solder resist layer, thereby being advantageous in controlling the deviation in application thickness of solder resist (SR), while having excellent adhesion to the substrate, and a manufacturing method thereof. | 05-03-2012 |
20130026626 | METHOD FOR FORMING BUMPS AND SUBSTRATE INCLUDING THE BUMPS - Disclosed herein are a method for forming bumps and a substrate including the bumps. The method includes: coating a solder resist on a substrate and electrodes formed on the substrate: performing laser etching treatment on the solder resist to form openings for forming bumps; printing a composition for forming bumps in the openings for forming bumps; and performing a reflowing process. | 01-31-2013 |
Cheol Ho Choi, Hwasung KR
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20140183726 | PACKAGE SUBSTRATE, METHOD FOR MANUFACTURING THE SAME, AND PACKAGE ON PACKAGE SUBSTRATE - The present invention relates to a package substrate, a method for manufacturing the same, and a package on package substrate. In accordance with an embodiment of the present invention, a package substrate including: an inner insulating layer; a circuit pattern layer formed on the inner insulating layer; an outer insulating layer formed on the inner insulating layer to protect the circuit pattern layer and expose portions of external and internal patterns of the circuit pattern layer; a mixed pattern layer consisting of post bumps and outermost layer patterns formed on the portions of the internal and external patterns exposed by the outer insulating layer; and a resist layer formed on the outer insulating layer to protect the outermost layer patterns of the mixed pattern layer and expose the outermost layer patterns by an open region. | 07-03-2014 |
20150062850 | PRINTED CIRCUIT BOARD - Disclosed herein is a printed circuit board of a build-up structure in which an insulating layer and a circuit layer are stacked on a core layer, the core layer including: an electronic chip cavity in which an electronic chip is accommodated; and a dummy chip cavity in which a dummy chip is accommodated to offset warpage by the electronic chip. | 03-05-2015 |
Cheol Ho Choi, Suwon KR
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20140041911 | FLAT DAM AND METHOD FOR MANUFACTURING CHIP PACKAGE USING THE SAME - Disclosed herein is a flat dam formed in a package region of an insulation layer provided on a board to limit movement of an underfill and made of the hydrophobic material including any one of or at least two of perfluorooctyl acrylate (PFAC), polypropylene, polytetrafluoroethylene (PTFE), and fluorine compound. | 02-13-2014 |
20140054073 | METHOD FOR FORMING SOLDER RESIST AND SUBSTRATE FOR PACKAGE - The present invention relates to a method for forming solder resist and a substrate for a package. The method for forming solder resist including: forming a first solder resist inner region by primarily coating, exposing, and developing a solder resist on a substrate on which an outer PoP pad and an inner chip pad are formed, and removing the solder resist's outer portion on the substrate's outer region and curing the solder resist's inner portion on the substrate's inner region; forming a plugged SR region which does not expose the substrate; changing a surface roughness by performing a desmear process on a surface of the first solder resist inner region in which the plugged SR region is formed; and forming a second solder resist SMD region which covers an edge of the PoP pad, exposing, and developing the solder resist on the substrate after the desmear process is provided. | 02-27-2014 |
Cheol Ho Choi, Gwangsan-Gu KR
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20130055691 | VACUUM CLEANER AND DUST SEPARATING APPARATUS THEREOF - A vacuum cleaner provided with a dust separating apparatus which has an improved aesthetic quality and has an increased size without increasing the height of the vacuum cleaner. The dust-separating apparatus is easily detachable with respect to a vacuum cleaner body, and is provided with a cover that is easily detachable when dirt collected in the dust collecting compartment is discarded. The vacuum cleaner includes a first cyclone part and a second cyclone part, and a first dust collecting compartment configured to collect dirt separated from the first cyclone part is formed at a lower side of the first cyclone part and the second cyclone part. | 03-07-2013 |
Cheol Ho Heo, Suwon KR
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20130256709 | METHOD OF MANUFACTURING SUBSTRATE FOR LED MODULE AND SUBSTRATE FOR LED MODULE MANUFACTURED BY THE SAME - Disclosed herein are a method of manufacturing a substrate for an LED module and a substrate for an LED module manufactured by the same, including: providing a base substrate having metal layers formed on both surfaces thereof; forming circuit patterns on the metal layers; applying a solder resist layer onto the circuit patterns; forming a through hole penetrating through the base substrate; separating the base substrate up and down; and bonding each of the separated base substrates to a parent substrate, thereby preventing light reflectivity of a parent substrate from being degraded due to a resist applying process and a surface treatment process. | 10-03-2013 |
20140021851 | SUBSTRATE FOR LED MODULE AND METHOD FOR MANUFACTURING THE SAME - As a substrate for an LED module and a method for manufacturing the same, they teach a substrate for an LED module and a method for manufacturing the same which including a base substrate, an insulating layer formed on a remaining region except a chip mounting region A in the base substrate, an electrode layer formed on the insulating layer, an oxide layer formed on the chip mounting region A of the base substrate and a high reflection layer formed on a top surface of the oxide layer. | 01-23-2014 |
Cheol Ho Kim, Gunpo-Si KR
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20150214608 | PLASMA ANTENNA - Provided is a plasma antenna. The plasma antenna includes a radiation portion formed by stacking a plurality of radiation disks generating plasma based on provided energy and radiating a signal using the generated plasma, an energy generation portion configured to provide the energy to at least one of the plurality of radiation disks, and a signal transmission portion configured to provide the signal to the at least one radiation disk provided with the energy. Therefore, it is possible to support multiple frequency bands. | 07-30-2015 |
20150214610 | SOLID-STATE PLASMA ANTENNA - Disclosed is a solid-state plasma antenna that has an adjustable azimuth angle and declination angle and is applied even to a solid-state plasma antenna, which includes an electrode interconnection layer having a curve shape and an electronic path formed therein; a solid-state plasma cell array positioned at an inner side of the curve shape; a plasma activation controller electrically connected with the solid-state plasma cell array through the electrode interconnection layer and configured to activate at least one solid-state plasma cell in the solid plasma cell array based on an input signal; and an RF feed installed a predetermined distance from the inner side of the curve shape and configured to emit an RF signal to the solid-state plasma cell array. | 07-30-2015 |
20150214621 | MULTI-BAND PLASMA LOOP ANTENNA - Disclosed is a multi-band plasma loop antenna that may reduce radio interference and provide multiple bands. First, the multi-band plasma loop antenna includes an antenna element including a plurality of plasma loop patterns; a plasma activation controller configured to activate a specific plasma loop pattern among the plurality of plasma loop patterns based on an input signal; and at least one RF feed configured to apply an RF signal to the antenna element. Accordingly, a selective multi-frequency band antenna may be easily implemented, and interference between loops may be minimized. In addition, antenna radiation efficiency may be increased by taking a stacked structure. | 07-30-2015 |
20150228807 | VERTICAL PIN DIODE - Disclosed is a vertical positive-intrinsic-negative (PIN) diode. The vertical PIN diode includes an intrinsic layer, an N-type layer located on a first surface of the intrinsic layer, a P-type layer located on a second surface of the intrinsic layer, wherein the second surface is opposite to the first surface, a connection layer formed to extend to the first surface from the P-type layer, a first electrode located on the N-type layer, and a second electrode located in the connection area formed on the first surface. Thus, plasma can be easily generated. | 08-13-2015 |
Cheol Ho Kim, Uiwang-Si KR
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20120133862 | LIGHT DIFFUSER FILM AND LIQUID CRYSTAL DISPLAY PANEL USING THE SAME - The present invention discloses a light diffuser film including a transparent thermoplastic resin, the light diffuser film having an embossed pattern on at least one side thereof, the embossed pattern having an average roughness (Ra) of about 1.5 μm or less, and a peak count (Rpc) of about 100 peaks/cm or more. | 05-31-2012 |
20120252947 | POLYCARBONATE RESIN COMPOSITION FOR FLAME RETARDANT FILM, FLAME RETARDANT FILM INCLUDING THE RESIN COMPOSITION AND METHOD FOR PRODUCING THE FLAME RETARDANT FILM - A polycarbonate resin composition for a flame retardant film includes 100 parts by weight of a polycarbonate resin, about 0.01 to about 10 parts by weight of a silicon compound, about 0.01 to about 1.5 parts by weight of an organic sulfonic acid metal salt having an average particle diameter of about 100 to about 400 μm, and about 0.01 to about 1 part by weight of a polyfluoroethylene resin. | 10-04-2012 |
Cheol Ho Kim, Seoul KR
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20080316170 | Computer Mouse - Provided is a computer mouse including a grip portion having a flat bottom surface and a longitudinal central grip axis; a grip central point located at the center of the longitudinal central grip axis; the grip portion standing on a surface on which the computer mouse moves; a vertical axis perpendicular to the surface and including the central point; a sensor portion which includes a sensor having a sensor central point located at the center of the sensor; the sensor being located distant in a forward direction from the grip portion; a vertical plane containing the vertical axis and the sensor central point; wherein the longitudinal central axis is angled from the vertical axis and tilted to the left or right with reference to the forward direction; a bottom grip point defined by the intersection between the vertical axis and the bottom surface; and wherein the bottom grip point is located substantially at the center of the bottom surface. | 12-25-2008 |
Cheol Ho Kim, Yuseong-Gu KR
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20120315494 | Polyamic Acid Resin Composition, Method for Preparing the Same and Polyimide Metal Clad Laminate Using the Same - There is provided a polyamic acid resin composition, a method for preparing the same and a polyimide metal clad laminate using the same, in which the polyamic acid resin composition includes an epoxy compound represented by Chemical Formula 1 is defined in specification. | 12-13-2012 |
Cheol Ho Kim, Gyeonggi-Do KR
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20100238283 | LANE DEPARTURE WARNING METHOD AND SYSTEM USING VIRTUAL LANE-DIVIDING LINE - The present invention relates to a lane departure warning system and method, which use a virtual lane-dividing line generated using lane width information that is calculated using previously detected lane-dividing lines even when it is difficult to detect a lane-dividing line according to the weather, illuminance, road surface conditions, etc. present during travel of a vehicle, thus allowing a lane departure warning to be provided to a driver on the basis of the virtual lane-dividing line. | 09-23-2010 |
Cheol Ho Lee, Gyeonggi-Do KR
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20150381048 | METHOD AND ELECTRONIC DEVICE FOR CONTROLLING SWITCHING REGULATOR - An electronic device includes: a first switching regulator configured to output a predetermined voltage to a first unit of an electronic device through on/off switching corresponding to a control signal received from a switching control unit; a second switching regulator configured to output a predetermined voltage to a second unit of the electronic device through on/off switching corresponding to a control signal received from the switching control unit; and a switching control unit configured to determine an off timing of each switching regulator corresponding to an on/off duty ratio of the each switching regulator and control on/off of the each switching regulator in order to turn on the second switching regulator at an off timing of the first switching regulator. | 12-31-2015 |
Cheol Ho Lee, Daejeon KR
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20110219454 | METHODS OF IDENTIFYING ACTIVEX CONTROL DISTRIBUTION SITE, DETECTING SECURITY VULNERABILITY IN ACTIVEX CONTROL AND IMMUNIZING THE SAME - Provided is a method of identifying an ActiveX control distribution site, detecting a security vulnerability in an ActiveX control and immunizing the same. A security vulnerability existing in an ActiveX control may be automatically detected, effects brought on by the corresponding security vulnerability may be measured, and abuse of the detected security vulnerability in a user PC to be protected may be immediately prevented. Therefore, since the user PC may be protected regardless of a security patch, it is anticipated that security problems in the Internet environment caused by imprudent use of the ActiveX control may be significantly enhanced. | 09-08-2011 |
20150143454 | SECURITY MANAGEMENT APPARATUS AND METHOD - A security management apparatus and method are provided. The security management apparatus includes a user authentication unit, a packet inspection unit, a packet extraction unit, a file analysis unit, and an agent generation unit. The user authentication unit receives user information from a terminal of a user, and performs a user authentication procedure. The packet inspection unit inspects a packet based on rules, and transfers the inspected packet to a destination over the Internet. The packet extraction unit recognizes a specific protocol in a packet transferred to the destination or a packet returned from the destination and extracts a file based on the results of the recognition. The file analysis unit determines whether or not the extracted file is a malicious file. If the extracted file is the malicious file, the agent generation unit generates a malware removal agent, and removes malware by executing the malware removal agent. | 05-21-2015 |
20150242627 | APPARATUS AND METHOD FOR BLOCKING ACTVITY OF MALWARE - An apparatus and method for blocking the activity of malware are disclosed. The apparatus for blocking the activity of malware includes a storage unit, a posting unit, and a control unit. The storage unit stores an automatic execution permission list and a set security level. The posting unit posts a predetermined control time immediately after user terminal booting and a predetermined control time immediately after user login. The control unit permits or blocks the execution of an execution attempt file for the predetermined control time immediately after the booting and the predetermined control time immediately after the user login based on the automatic execution permission list and the set security level. | 08-27-2015 |
20150256552 | IMALICIOUS CODE DETECTION APPARATUS AND METHOD - Disclosed herein is a malicious code detection apparatus and method, which detect malicious code based on the states of a system before and after a malicious code sample is executed. A state of a sample execution system before a malicious code sample is executed. Static analysis and dynamic analysis of the malicious code sample are performed. After the malicious code sample has been executed, a state of the sample execution system is extracted, the results of extraction of the state are compared with results of extraction of the state of the sample execution system before the malicious code sample is executed, and change information of the system is acquired. It is detected whether malicious behavior of the malicious code sample has been conducted, using static analysis information and dynamic analysis information corresponding to results of performing static analysis and dynamic analysis and the system change information. | 09-10-2015 |
20150324580 | APPARATUS AND METHOD FOR ANALYZING MALICIOUS CODE IN REAL ENVIRONMENT - An apparatus and method for analyzing malicious code in a real environment are provided. The apparatus for analyzing malicious code in a real environment includes a storage unit, a VHD control unit, and an analysis unit. The storage unit stores an original virtual hard disk (VHD) and a child VHD. The VHD control unit performs booting using an uninfected clean VHD. The analysis unit executes an object of analysis after the booting, generates the first results of the analysis based on static, dynamic and state analyses, generates the second results of the analysis by comparing the state of an infected VHD with the state of the clean, generates the results of malicious code analysis based on the first results of the analysis and the second results of the analysis, and sends the results of the malicious code analysis to the VHD control unit. | 11-12-2015 |
Cheol Ho Lim, Daejeon KR
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20140250665 | Z-PIN PATCH AND METHOD FOR MANUFACTURING OR COUPLING A COMPOSITE LAMINATED STRUCTURE USING SAME - Provided are a Z-pinning patch capable of improving process efficiency, productivity, and the like, by allowing Z-pinning of a composite laminated structure to be realized using a structure as simple as possible, and a method for manufacturing or jointing composite laminated structures using the same. The Z-pinning patch used for Z-pinning for reinforcing delamination performance of composite laminated structures or connecting between a plurality of laminated members, includes: a base plate formed in a plate form; and a plurality of pins fixed to one side of the base plate. | 09-11-2014 |
20150024203 | METHOD OF MANUFACTURING UNEVENNESS SHAPED Z-PIN AND Z-PIN MANUFACTURED USING THE SAME AND COMPOSITE STRUCTURE INCLUDING THE Z-PIN - Provided are a method of manufacturing a Z-pin having an unevenness shape formed on a surface thereof so as to economically and effectively increase coupling force in the Z-pin for coupling of a composite material laminated structure in a laminated direction, and a Z-pin manufactured using the same and a composite structure including the Z-pin. | 01-22-2015 |
Cheol Ho Ohk, Seoul KR
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20090067682 | Facial region detection device and correction method for photoprinting - Disclosed is a method for correcting a facial region detected from image data for photoprinting of improved image quality. The method includes an image data input step of inputting the image data to an image processing device; facial region detection step of extracting a skin color region from the inputted image data and detecting a planar face or a rotated planar face from a face-existing candidate region; a region division step of dividing the facial region detected in the facial region detection step; a correction step of extracting a distortion data value from the region divided in the region division step and conducting correction; and a photoprinting step of visually outputting the image data finally corrected in the correction step. Various types of distortion of the facial image is effectively corrected before it is printed by a photoprinter so that the image quality is improved. | 03-12-2009 |
Cheol Ho Yang, Gyeonggi-Do KR
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20100043542 | SENSOR FOR TIRE PRESSURE AND TIRE PRESSURE MONITORING SYSTEM HAVING THE SAME - Provided is a tire pressure monitoring system including: a tire pressure measurement sensor including a pressure detection means for detecting an air pressure in a tire, a connection pipe for connecting an air injection valve of the tire to the pressure detection means, a fixing means for fixing the connection pipe to the air injection valve of the tire, and an air injection means connected to the pressure detection means to inject air into the tire through the pressure detection means; and a display for showing the air pressure of each tire of a vehicle to a driver, wherein the tire pressure measurement sensor is mounted in the air injection valve of the tire and transmits a pressure value of the tire to the display through wireless communication. | 02-25-2010 |
Cheol-Ho Cho, Seoul KR
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20120187484 | LATERAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE - A lateral double diffused metal oxide semiconductor (LDMOS) device includes a first buried layer having a second conduction type formed in an epitaxial layer having a first conduction type, a first high-voltage well having the second conduction type formed above one region of the first buried layer, a first drain diffusion region having the first conduction type formed above another region of the first buried layer, a second drain diffusion region having the second conduction type formed in a partial region of the first drain diffusion region, the second drain diffusion region including a gate pattern and a drain region, and a first body having the first conduction type including a source region and having a surface in contact with the second drain diffusion region. | 07-26-2012 |
20130093014 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A semiconductor device includes a laterally double diffused metal oxide semiconductor (LDMOS) transistor formed on a partial region of a epitaxial layer of a first conductive type, a bipolar transistor formed on another partial region of the epitaxial layer of the first conductive type, and a guard ring formed between the partial region and the another partial region. The guard ring serves to restrain electrons generated by a forward bias operation of the LDMOS transistor from being introduced into the bipolar transistor. | 04-18-2013 |
20130093016 | LATERAL DOUBLE DIFFUSED METAL OXIDE SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - An LDMOS device may include at least one of a second conduction type buried layer and a first conduction type drain extension region. An LDMOS device may include a second conduction type drain extension region configured to be formed in a portion of the first conduction type drain extension region. The second conduction type drain extension region may include a gate pattern and a drain region. An LDMOS device may include a first conduction type body having surface contact with the second conduction type drain extension region and may include a source region. An LDMOS device may include a first guard ring formed around the second conduction type drain extension region. An LDMOS device may include a second guard ring configured to be formed around the first guard ring and configured to be connected to a different region of the second conduction type buried layer. | 04-18-2013 |
Cheol-Ho Cho, Cheongju-Si KR
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20100258865 | TRANSISTOR HAVING RECESS CHANNEL AND FABRICATING METHOD THEREOF - A transistor includes a substrate including a trench, an insulation layer filled in a portion of the trench, the insulation layer having a greater thickness over an edge portion of a bottom surface of the trench than over a middle portion of the bottom surface of the trench, a gate insulation layer formed over inner sidewalls of the trench, the gate insulation layer having a thickness smaller than the insulation layer, and a gate electrode filled in the trench. | 10-14-2010 |
Cheol-Ho Choi, Suwon-Si KR
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20100291488 | Manufacturing method for multilayer core board - A method for manufacturing a cone board including: preparing a core insulation layer including one or more resins selected from the group consisting of epoxy resins and bismaleimide triazine resins; and forming a first nickel layer on at least one surface of the core insulation layer by electroless plating | 11-18-2010 |
Cheol-Ho Choi, Gwangju-City KR
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20090044501 | Dust separating apparatus - A dust separating apparatus is provided, including a main body having a cylindrical shape and including a suction port on a bottom surface and an open upper part, a cover that covers the upper part of the main body and includes a discharge port formed on the same axis as the suction port; and an air guide member protruding from the suction port to the inside of the main body, wherein the air guide member allows the suction port to be in fluid communication with the main body when suction force is generated in the main body and does not allow the suction port to be in fluid communication with the main body when suction force is not generated in the main body. | 02-19-2009 |
Cheol-Ho Jang, Pyeongtaek-Si KR
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20130233328 | Portable Tabacco Fume Combustor - A portable cigarette smoke combustor that can prevent spread of cigarette smoke to the air during smoking is disclosed. The portable cigarette smoke combustor includes: includes: a smoking portion including the first chamber for insertion of a cigarette and a lighter; a cigarette smoke injection portion disposed adjacent to the smoking portion and forming the second chamber for receiving mainstream smoke in the mouth of a smoker; a cigarette smoke combustion portion including a means for combusting cigarette smoke flown into the second chamber; and a sidestream smoke emitting means controlling sidestream smoke generated from the first chamber to flow to the second chamber. | 09-12-2013 |
Cheol-Ho Jeon, Seoul KR
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20140034899 | GRAPHENE SEMICONDUCTOR AND ELECTRICAL DEVICE INCLUDING THE SAME - A graphene semiconductor including graphene and a metal atomic layer disposed on the graphene, wherein the metal atomic layer includes a metal, which is capable of charge transfer with the graphene. | 02-06-2014 |
Cheol-Ho Jeong, Suwon-Si KR
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20080286006 | IMAGE FORMING APPARATUS AND IMAGE FORMING METHOD - An image forming apparatus and an image forming method are provided, in which a drum itself forms an electrostatic latent image on a surface of the drum by charging plates included in the drum surface among plates of capacitors of a plurality of cells based onprint data, wherein the cells constitute a circumference of the drum, the electrostatic latent image is developed so as to generate a developed image, the developed image is transferred onto a printing medium, and the developed image is fixed to the printing medium. Accordingly, the time required to print the print data is drastically reduced, it is possible to reduce the size of an image forming apparatus, and high quality print outs can be obtained. | 11-20-2008 |
20080286007 | IMAGE FORMING APPARATUS AND IMAGE FORMING METHOD - An image forming apparatus and an image forming method are provided, in which a drum itself forms an electrostatic latent image corresponding to print data that is to be printed, on a surface of the drum, the electrostatic latent image is developed so as to generate a developed image, the developed image is transferred onto a printing medium, and the transferred image is fixed to the printing medium. Accordingly, the time required to print the print data is drastically reduced, it is possible to reduce the size of an image forming apparatus, and high quality print outs can be obtained. | 11-20-2008 |
20080317502 | IMAGE FORMING APPARATUS AND IMAGE FORMING METHOD USING LATENT IMAGES - An image forming apparatus and an image forming method are provided, in which a drum itself forms an electrostatic latent image for each of one or more basic colors in accordance with print data on a surface of the drum while making the polarities of the electrostatic latent images different, the electrostatic latent images are developed so as to generate developed images, the developed images are transferred onto a printing medium, and the transferred images are fixed to the printing medium. Accordingly, color printing can be rapidly completed even by using a number of drums less than the number of basic colors for use in representing colors to be printed, it is possible to reduce the size of an image forming apparatus, and high quality print outs can be obtained. | 12-25-2008 |
Cheol-Ho Lee, Hwaseong-Si KR
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20130135285 | POLARIZATION SWITCHING DEVICE, DRIVER OF POLARIZATION SWITCHING DEVICE, AND METHOD OF DRIVING THE SAME - A polarization switching device includes a lower panel; an upper panel facing the lower panel; a liquid crystal layer disposed between the lower panel and the upper panel; and a driver to apply a first driving voltage and a second driving voltage to the lower panel and the upper panel, respectively, the first driving voltage to transition among a center voltage, a first voltage and a second voltage. The first voltage and the second voltage have the same difference in value from the center voltage. The driver includes a voltage changing unit to generate the first voltage and the second voltage based on a digital data input to a first digital-analog converter. | 05-30-2013 |
Cheol-Ho Lee, Suwon-Si KR
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20100005253 | MEMORY CONTROLLER, PCB, COMPUTER SYSTEM AND MEMORY ADJUSTING METHOD - A memory controller, a PCB and a computer system employing the memory controller, and a memory adjusting method using the memory controller. The memory controller interfaces data reading from and writing to a memory and includes: a characteristic estimating part estimating a characteristic of a memory output signal outputted from the memory for the data reading and writing; and a characteristic adjusting part controlling the memory so that the characteristic of the memory output signal is within a predetermined reference range if the characteristic of the memory output signal estimated by the characteristic estimating part is beyond the predetermined reference range. | 01-07-2010 |
20110231620 | MEMORY CONTROLLER, PCB, COMPUTER SYSTEM AND MEMORY ADJUSTING METHOD - A memory controller, a PCB and a computer system employing the memory controller, and a memory adjusting method using the memory controller. The memory controller interfaces data reading from and writing to a memory and includes: a characteristic estimating part estimating a characteristic of a memory output signal outputted from the memory for the data reading and writing; and a characteristic adjusting part controlling the memory so that the characteristic of the memory output signal is within a predetermined reference range if the characteristic of the memory output signal estimated by the characteristic estimating part is beyond the predetermined reference range. | 09-22-2011 |
20130124887 | COMPUTER SYSTEM AND CONTROL METHOD THEREOF - A computer system includes memory units; a power supply to supply power to the memory units; and a controller to control the supply of power to the plurality of memory units so as to intercept power supplied from the power supply to at least one of the memory units, among the plurality of memory units according to user input. | 05-16-2013 |
20140044160 | SIGNAL PROCESSOR, ELECTRONIC APPARATUS, METHOD OF SIGNAL PROCESSING, AND COMPUTER-READABLE RECORDING MEDIUM - A signal processor includes a receiver to receive data to be transmitted to an external device, a signal generator to process de-emphasis of the received data using a preset de-emphasis value and to output the resultant data to the external device, an information acquisition unit to receive equalizer information from the external device, and a controller to control the de-emphasis value of the signal generator based on the received equalizer information. | 02-13-2014 |
Cheol-Ho Lee, Uiwang-Si KR
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20120168894 | HARD MASK COMPOSITION, METHOD OF FORMING A PATTERN, AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE INCLUDING THE PATTERN - A hard mask composition, a method of forming a pattern, and a semiconductor integrated circuit device, the hard mask composition including a solvent; and an aromatic ring-containing compound, the aromatic ring-containing compound including at least one of a moiety represented by the following Chemical Formula 1 and a moiety represented by the following Chemical Formula 2: | 07-05-2012 |
Cheol-Ho Moon, Daejeon KR
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20150098889 | CARBON DIOXIDE ABSORBING COMPOSITION INCLUDING TERTIARY ALKANOLAMINE, AND METHOD AND APPARATUS FOR ABSORBING CARBON DIOXIDE USING THE SAME - This invention relates to a carbon dioxide absorbing composition including a tertiary alkanolamine, and to a method and apparatus for absorbing carbon dioxide using the same, wherein in a process and apparatus for absorbing and recovering carbon dioxide from a gas mixture including carbon dioxide, a solid-phase bicarbonate crystal including high-concentration carbon dioxide is crystallized from a carbon dioxide absorbing composition having absorbed carbon dioxide and is then selectively separated, thereby efficiently recovering and regenerating carbon dioxide. | 04-09-2015 |
20150098890 | CARBON DIOXIDE ABSORBING COMPOSITION INCLUDING STERICALLY HINDERED ALKANOLAMINE, AND METHOD AND APPARATUS FOR ABSORBING CARBON DIOXIDE USING THE SAME - This invention relates to a carbon dioxide absorbing composition including a sterically hindered alkanolamine, and to a method and apparatus for absorbing carbon dioxide using the same, wherein in a process and apparatus for absorbing and recovering carbon dioxide from a gas mixture including carbon dioxide, a solid-phase bicarbonate crystal including high-concentration carbon dioxide is crystallized from a carbon dioxide absorbing composition having absorbed carbon dioxide and is then selectively separated, thereby efficiently recovering and regenerating carbon dioxide. | 04-09-2015 |
Cheol-Ho Pan, Gangwon-Do KR
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20110033890 | METHOD FOR THE SECRETORY PRODUCTION OF HETEROLOGOUS PROTEIN IN ESCHERICHIA COLI - The present invention relates to a signal sequence peptide for the improvement of extracellular secretion efficiency of a heterologous protein in | 02-10-2011 |
Cheol-Ho Park, Gyeonggi-Do KR
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20090203230 | Mask for crystallizing a semiconductor layer and method of crystallizing a semiconductor layer using the same - A mask for crystallizing a semiconductor layer includes a plurality of first main-slit portions, a plurality of second main-slit portions, upper slit portion and lower slit portion. The first main-slit portions extend along an inclined direction with respect to a first direction. The second main-slit portions are spaced apart from the first main-slit portions. The upper slit portion is disposed on the first main-slit portions along a second direction to be parallel to the first main-slit portions, and extends partway over the second main-slit portions to be longer than the first main-slit portions. The lower slit portion is disposed under the second main-slit portions along the second direction to be parallel to the second main-slit portions, and extends partway under the first main-slit portions to be longer than the second main-slit portions. | 08-13-2009 |
20120184112 | MASK FOR CRYSTALLIZING A SEMICONDUCTOR LAYER AND METHOD OF CRYSTALLIZING A SEMICONDUCTOR LAYER USING THE SAME - A mask for crystallizing a semiconductor layer includes a plurality of first main-slit portions, a plurality of second main-slit portions, upper slit portion and lower slit portion. The first main-slit portions extend along an inclined direction with respect to a first direction. The second main-slit portions are spaced apart from the first main-slit portions. The upper slit portion is disposed on the first main-slit portions along a second direction to be parallel to the first main-slit portions, and extends partway over the second main-slit portions to be longer than the first main-slit portions. The lower slit portion is disposed under the second main-slit portions along the second direction to be parallel to the second main-slit portions, and extends partway under the first main-slit portions to be longer than the second main-slit portions. | 07-19-2012 |
Cheol-Ho Park, Yongin-Si KR
Patent application number | Description | Published |
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20110143174 | LITHIUM SECONDARY BATTERY AND METHOD OF CONTROLLING SHORT RESISTANCE THEREOF - Provided is a lithium secondary battery including a positive electrode having a positive electrode active material, a negative electrode having a negative electrode active material, and a polymer electrolyte composition having a polymer electrolyte, a non-aqueous organic solvent, and a lithium salt. The content of the polymer electrolyte is 9 to 20 wt %, based on the total weight of the polymer electrolyte composition. | 06-16-2011 |
20130166233 | DEVICE FOR ESTIMATING A LIFETIME OF A SECONDARY BATTERY AND METHOD THEREOF - Embodiments of the present invention provide an accelerated lifetime estimation device for predicting the lifetime of a secondary battery, and a method thereof. The accelerated lifetime estimation device can accurately estimate a normal lifetime of the secondary battery while reducing an evaluation time period of the secondary battery. | 06-27-2013 |
20130268466 | SYSTEM FOR PREDICTING LIFETIME OF BATTERY - A system for predicting a lifetime of a battery cell, including a learning data input unit, the learning data input unit being configured to receive at least one learning measurement factor and at least one learning factor, a target data input unit, the target data input unit being configured to receive at least one target factor, a machine learning unit, the machine learning unit being coupled to the learning data input unit, the machine learning unit assigning weights to respective ones of the learning factors input to the learning data input unit, and a lifetime prediction unit, the lifetime prediction unit being coupled to the target data input unit and the machine learning unit, the lifetime prediction unit using the weights assigned by the machine learning unit to predict one or more characteristics indicative of the lifetime of the target battery cell. | 10-10-2013 |
20130344398 | LITHIUM SECONDARY BATTERY AND METHOD OF CONTROLLING SHORT RESISTANCE THEREOF - Provided is a lithium secondary battery including a positive electrode having a positive electrode active material, a negative electrode having a negative electrode active material, and a polymer electrolyte composition having a polymer electrolyte, a non-aqueous organic solvent, and a lithium salt. The content of the polymer electrolyte is 9 to 20 wt %, based on the total weight of the polymer electrolyte composition. | 12-26-2013 |
20140351177 | SYSTEM FOR PREDICTING THICKNESS OF BATTERY AND METHOD FOR PREDICTING THICKNESS OF BATTERY - A system for predicting the thickness of a battery is disclosed. In one aspect, the battery thickness predicting system includes a learning data input unit for receiving data on a previously manufactured battery. The thickness predicting system further includes an object data input unit for receiving data on a battery whose thickness is to be predicted. The system further comprises a mechanical learning unit connected to the learning data input unit to obtain a predicting function based on learning factors input to the learning data input unit and to provide weight values to the learning factors, respectively. The system further includes a thickness predicting unit connected to the object data input unit and the mechanical learning unit and using the weight values provided by the mechanical learning unit in order to predict the thickness of the battery whose thickness is to be predicted. | 11-27-2014 |
Cheol-Ho Shin, Daejeon KR
Patent application number | Description | Published |
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20090154532 | APPARATUS AND METHOD FOR RECEIVING SIGNAL FOR EXTENT LIMITATION OF TIMING SYNCHRONIZATION IN MB-OFDM UWB SYSTEM - The present invention relates to an apparatus and a method for receiving signal for extent of timing synchronization in MB-OFDM UWB System. The invention divides the digital samples completed of sampling twice as much as minimum sampling clock required to restore the MB-OFDM received signal into ODD data path and EVEN data path, executes the packet detection and timing synchronization for each of divided path and selects the data of path with larger cross correlation value at the timing synchronization point to secure the stable receiving performance in system environment with severe frequency offset and prevent the FTT window shift within preamble section through adding minimum hardware and structural change without increasing the system clock. | 06-18-2009 |
20100124252 | APPARATUS AND METHOD FOR COMMUNICATION - A communication apparatus generates a digital detection signal including a plurality of time symbols by digital-converting a detection signal corresponding to a received signal, estimates an average power value of the detection signal by calculating average power of the digital detection signal based on the digital detection signal, and performs UWB communication through a predetermined first channel when a predetermined reference power value is greater than the average power value. | 05-20-2010 |
20110002416 | METHOD OF COMMUNICATING FOR SMART UTILITY NETWORK USING TV WHITE SPACE AND APPARATUS FOR THE SAME - There are disclosed a method of communicating for a smart utility network using a TV white space and an apparatus for the same. The method of communicating for a smart utility network using a TV white space according to the present invention includes: generating a time domain sequence repeated every predetermined number of samples; generating an OFDM symbol having a cyclic prefix length corresponding to an FFT size divided by a natural number of 2 or more and including samples of a number corresponding to the sum of the FFT size and the cyclic prefix length; and generating an SUN packet to be transmitted through a TV channel band selected in the TV white space by using the time domain sequence and the OFDM symbol. Accordingly, it is possible to satisfy all requirements required by the IEEE 802.15.4g SUN standardization group. | 01-06-2011 |
20120057618 | SYSTEM AND METHOD FOR DETECTING VICTIM SIGNAL IN MB-OFDM UWB COMMUNICATION SYSTEM - To detect a victim signal in an ultra wideband communication system, fast Fourier transform of a received signal including a plurality of time symbols is performed to generate a signal including a plurality of frequency symbols, it is determined whether a first signal is present in a first region of the signal, and if a first signal is present, the first signal is detected as a first victim signal. Next, an error signal is generated based on the signal including the plurality of frequency symbols, it is determined whether a second signal is present in a second region of the error signal, and if a second signal is present, the second signal is detected as a second victim signal. | 03-08-2012 |
20120163263 | BASE STATION, TERMINAL, AND OPERATING METHOD THEREOF - A base station and a terminal for supporting a low power mode are provided. The base station transmits a first type of beacon signal for a terminal operating in a normal mode, a second type of beacon signal for a terminal operating in a low power mode, and a charging signal for a terminal in a low power mode. The terminal harvests energy from a charging signal and receives the second type of beacon signal using the harvested energy. The terminal confirms a communication request through the second type of beacon signal, enters into an active period, and communicates with the base station. | 06-28-2012 |
20120163444 | APPARATUS AND METHOD FOR TRANSMITTING AND RECEIVING - A transmitting apparatus groups a data bit sequence to groups each formed of a predetermined number of bits, modulates predetermined bits of one of groups through a frequency shift keying (FSK) modulation method, non-continuously aligns the FSK modulation signals, and transmits the non-continuous FSK modulation signals. | 06-28-2012 |
20130043920 | DIGITAL PHASE-LOCKED LOOP APPARATUS USING FREQUENCY SHIFT KEYING AND METHOD OF CONTROLLING THE SAME - A digital phase-locked loop apparatus using FSK includes a PFD detecting phase differences between a reference clock and a frequency-divided signal, and a first adder for generating first digital control codes by adding first digital codes, second digital codes, and channel frequency codes including channel information to each other, the first digital codes being converted from time differences between first and second pulses. The apparatus further includes a digital filter correcting errors of the first digital control codes to generate second digital control codes, a DCO for varying an oscillating frequency in accordance with a digital tuning word based on the second digital control codes, and a dual modulus division unit dividing the oscillating frequency into a frequency-divided signal. | 02-21-2013 |
20130058360 | METHOD OF GENERATING AND RECEIVING PACKETS IN LOW ENERGY CRITICAL INFRASTRUCTURE MONITORING SYSTEM - A method of generating a packet for low energy critical infrastructure monitoring (LECIM) wireless communication is provided. The method includes steps of generating a first bit string by multiplexing a physical layer header (PHR) bit and a physical layer service data unit (PSDU) bit; convolution encoding the first bit string; interleaving the convolution-encoded first bit string; generating a second bit string by multiplexing the interleaved first bit string with a synchronization header (SHR) bit; and modulating the second bit string with a frequency shift keying (FSK) method and a position-based FSK method. | 03-07-2013 |
20130070750 | METHOD AND APPARATUS FOR ACQUIRING RECEPTION SYNCHRONIZATION IN LOCAL WIRELESS COMMUNICATION SYSTEM - In a local wireless communication system, a reception signal including an STF (short training field) in which a plurality of patterns are repeatedly transmitted is received, the STF including a first number of STF patterns and a second number of STF patterns, the second number of STF patterns having an opposite code to that of the first number of STF patterns. In a first frequency offset estimation and correction process and a second frequency offset estimation and correction process, frequency offset estimation is performed on a plurality of STF patterns to acquire a phase error of each sample constituting the STF patterns, and the frequency of the STF patterns is corrected based on the acquired phase error. Cross correlation is performed on a predetermined number of STF patterns, among a plurality of STF patterns output subsequent to the frequency offset estimation and correction, to detect frame timing. | 03-21-2013 |
20130070812 | DETECTION AND AVOIDANCE APPARATUS AND METHOD FOR USE IN UWB RECEIVER - A DAA (Detection And Avoidance) apparatus for use in a UWB receiver includes a frequency offset unit for adding a preset frequency offset to a UWB signal including a victim signal and an FFT unit for performing a fast-Fourier-transformation on the UWB signal with the frequency offset added thereto. The DAA apparatus further includes a DAA unit for detecting a victim signal from the fast-Fourier-transformed UWB signal and, when reception power of the victim signal is higher than a predetermined reference power level, changing a communication channel for the UWB signal to avoid interference. | 03-21-2013 |
20130303091 | METHOD AND APPARATUS FOR TRANSMITTING AND RECEIVING HIGH FREQUENCY - A high frequency transmitting and receiving apparatus of a wireless communication system low-noise amplifies a signal that is received from a transmitting and receiving antenna through a low noise amplifier in a reception mode, and amplifies a signal be transmitted through a power amplifier in a transmission mode and transmits the signal through the transmitting and receiving antenna, and the high frequency transmitting and receiving apparatus is connected between the transmitting and receiving antenna and the low noise amplifier and turns on a switch in a reception mode and turns off the switch in a transmission mode, thereby separating transmitting and receiving signals. | 11-14-2013 |
20140016653 | METHOD OF GENERATING PACKET, METHOD OF TRANSMITTING PACKET, AND METHOD OF RANGING OF PHYSICAL LAYER TRANSMITTER OF WIRELESS PERSONAL AREA NETWORK SYSTEM - A method of generating a packet of a physical layer transmitter of a TV white space (TVWS) wireless personal area network (WPAN) system operating a WPAN service in TVWS is provided. A packet that is generated by the method of generating the packet includes a preamble, a start frame delimiter that is positioned after the preamble, a first physical layer header that is positioned after the start frame delimiter, and a physical layer service data unit that is positioned after the first physical layer header. Here, the first physical layer header represents whether the packet is a ranging packet for ranging, and includes a ranging packet identification bit corresponding to a reserved bit of the second physical layer header in a SUN system and a LECIM system, and a parity bit. | 01-16-2014 |
20140023164 | RECEIVING APPARATUS AND METHOD IN SMART UTILITY NETWORK COMMUNICATION SYSTEM - A receiving apparatus receives an FSK signal, converts the FSK signal into a phasor including amplitude and phase, estimates and compensates for a CFO (carrier frequency offset) from the converted phasor, and recovers a data bit from the converted phasor. | 01-23-2014 |
20140301412 | METHOD OF CREATING PREAMBLE, AND METHOD AND APPARATUS FOR DETECTING FRAME BOUNDARY - A method and apparatus of detecting a frame boundary by using a preamble are provided. The method includes delaying the preamble by a predetermined length of time, wherein the preamble includes an LTF and a code of the (n+1)th one of 2n sync sequences of the LTF is the inverse of a code of the last one of the sync sequences of STF; calculating a correlation value between the preamble and the delayed preamble; and detecting a frame boundary by comparing the correlation value with a threshold correlation value. | 10-09-2014 |
20150201296 | METHOD AND APPARATUS FOR TRANSMITTING WIRELESS PERSONAL AREA NETWORK COMMUNICATION SYSTEM - A transmitting apparatus of a WPAN communication system generates a synchronization header, a physical layer header, and a physical layer service data unit, multiplexes the synchronization header and the physical layer header into a bit stream and then modulates the multiplexed bit stream by a first differential phase modulation scheme, modulates the physical layer service data unit by a second differential phase modulation scheme, and multiplexes and transmits a symbol modulated by the first differential phase modulation scheme and a symbol modulated by the second differential phase modulation scheme into a symbol stream. | 07-16-2015 |