Patent application number | Description | Published |
20080204050 | Method of Measuring Electronic Device and Measuring Apparatus - In a method for measuring an electronic device which is an object to be measured, a passive element is connected to the electronic device in parallel, and electric parameters of the electronic device are extracted by measuring an impedance of the entire circuit. | 08-28-2008 |
20080224725 | TEST CIRCUIT, WAFER, MEASURING APPARATUS, MEASURING METHOD, DEVICE MANUFACTURING METHOD AND DISPLAY APPARATUS - There is provided a wafer on which a plurality of electronic devices and circuits under test are to be formed, where each circuit under test includes a plurality of transistors under measurement provided in electrically parallel, a selecting section which sequentially selects the respective transistors under measurement, and an output section which sequentially outputs the source voltages of the transistors under measurement sequentially selected by the selecting section. | 09-18-2008 |
20080268657 | Plasma Processing Method and Method for Manufacturing an Electronic Device - The application of oxynitriding treatment to electronic appliances involve the problem that N | 10-30-2008 |
20090001471 | Semiconductor Device - For equalizing the rising and falling operating speeds in a CMOS circuit, it is necessary to make the areas of a p-type MOS transistor and an n-type MOS transistor different from each other due to a difference in carrier mobility therebetween. This area unbalance prevents an improvement in integration degree of semiconductor devices. | 01-01-2009 |
20090050895 | SEMICONDUCTOR MANUFACTURING METHOD, SEMICONDUCTOR MANUFACTURING APPARATUS, AND DISPLAY UNIT - In a semiconductor manufacturing method that manufactures a coplanar type thin film transistor, a microcrystalline film | 02-26-2009 |
20090058456 | MANUFACTURING SYSTEM, MANUFACTURING METHOD, MANAGING APPARATUS, MANAGING METHOD AND COMPUTER READABLE MEDIUM - There is provided a manufacturing system for manufacturing an electronic device through a plurality of manufacturing stages. The manufacturing system includes a plurality of manufacturing apparatuses performing processes corresponding to the plurality of manufacturing stages. The manufacturing system includes a manufacturing line that manufactures the electronic device, a manufacturing control section that causes the manufacturing line to manufacture a wafer having therein a test circuit including a plurality of transistors under measurement, a measuring section that measures an electrical characteristic of each of the plurality of transistors under measurement in the test circuit, an identifying section that identifies, among the plurality of manufacturing stages, a manufacturing stage in which a defect is generated, with reference to a distribution, on the wafer, of one or more transistors under measurement whose electrical characteristics do not meet a predetermined standard, and a setting changing section that changes a setting for a manufacturing apparatus that performs a process corresponding to the manufacturing stage in which the defect is generated. | 03-05-2009 |
20090072327 | Semiconductor Storage Device and Method for Manufacturing the Same - [Problems] To provide a semiconductor storage device with excellent electrical characteristics (write/erase characteristics) by means of favorable nitrogen concentration profile of a gate insulating film, and to provide a method for manufacturing such a device. | 03-19-2009 |
20090081819 | METHOD AND APPARATUS FOR MANAGING MANUFACTURING EQUIPMENT, METHOD FOR MANUFACTURING DEVICE THEREBY - Provided is a method for managing manufacturing apparatuses used in a managed production line including a plurality of manufacturing processes for manufacturing an electronic device, each of the apparatuses being used in each of the processes, the method including: acquiring a property of a reference device manufactured in a predetermined reference production line including the manufacturing processes to be performed; performing at least one of the manufacturing processes in the managed production line, performing the other manufacturing processes in the reference production line, and manufacturing a comparison device; measuring a property of the comparison device; comparing the measured properties between the reference and the comparison devices; and judging whether the manufacturing apparatus used in the at least one manufacturing process is defective or not, based on a property difference between the reference and the comparison devices. | 03-26-2009 |
20090104787 | PLASMA NITRIDING METHOD, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND PLASMA PROCESSING APPARATUS - A nitriding process is performed at a process temperature of 500° C. or more by causing microwave-excited high-density plasma of a nitrogen-containing gas to act on silicon in the surface of a target object, inside a process container of a plasma processing apparatus. The plasma is generated by supplying microwaves into the process container from a planar antenna having a plurality of slots. | 04-23-2009 |
20090107521 | CHEMICAL SOLUTION OR PURE WATER FEEDER, SUBSTRATE PROCESSING SYSTEM, SUBSTRATE PROCESSING APPARATUS, OR SUBSTRATE PROCESSING METHOD - By adding a perfluoromonomer to PVDF being a fluororesin to soften it, the oxygen permeability can be significantly reduced and a flexible fluororesin tube can be obtained. The oxygen permeability can also be reduced by providing a nylon tube as an outer layer. The tube is used between a chemical solution or ultrapure water feeder and a chemical solution or ultrapure water utilizing apparatus such as a cleaning apparatus or a wet etching apparatus. | 04-30-2009 |
20090120673 | Multilayer circuit board and electronic device - A multilayered circuit board which is provided with a low-permittivity interlayer insulating film, and which can significantly improve the performance such as signal transmission characteristics of the multilayered circuit board such as a package and a printed board, because the surface in contact with the interlayer insulating film of the circuit board has no unevenness to eliminate the lowering of production yield and the deterioration of high-frequency signal transmission characteristics; and electronic equipment using the circuit board. The multilayered circuit board comprises, mounted on a substrate, plural wiring layers and plural insulating layers positioned between the plural wiring layers, wherein at least part of the plural insulating layers are composed of a porous insulating layer containing at least any of materials selected from a porous material group consisting of porous material, aerogel, porous silica, porous polymer, hollow silica and hollow polymer, and a non-porous insulating layer formed on at least one surface of the porous insulating layer and not containing the porous material group. | 05-14-2009 |
20090133713 | Multilayer structural body and method for cleaning the same - It has been difficult to provide a large-sized ceramic member quickly and economically. A multilayer structure is produced by forming a ceramic film on a base which is made of a material that can be shaped comparatively easily. The ceramic film is formed by a plasma spraying method, CVD method, PVD method, sol-gel method or the like. Alternatively, the ceramic film may be formed by a method combined with a spray deposit film. | 05-28-2009 |
20090134120 | Plasma Processing Method and Plasma Processing Apparatus - A plasma processing apparatus in which consumption of expensive krypton and xenon gases is suppressed as much as possible while reducing damage on a workpiece during plasma processing. In plasma processing of a substrate using a rare gas, two or more kinds of different rare gases are employed, and an inexpensive argon gas is used as one rare gas and any one or both of krypton and xenon gases having a larger collision cross-sectional area against electron than that of the argon gas is used as the other gas. Consequently, consumption of expensive krypton and xenon gases is suppressed as much as possible and damage on a workpiece is reduced during plasma processing. | 05-28-2009 |
20090162995 | Semiconductor Device Manufacturing Method and Semiconductor Manufacturing Apparatus - By hydrogen-terminating a semiconductor surface using a solution containing HF | 06-25-2009 |
20090166739 | Semiconductor Device - In order to obtain substantially the same operating speed of a p-type MOS transistor and an n-type MOS transistor forming a CMOS circuit, the n-type MOS transistor has a three-dimensional structure having a channel region on both the (100) plane and the (110) plane and the p-type MOS transistor has a planar structure having a channel region only on the (110) plane. Further, both the transistors are substantially equal to each other in the areas of the channel regions and gate insulating films. Accordingly, it is possible to make the areas of the gate insulating films and so on equal to each other and also to make the gate capacitances equal to each other. | 07-02-2009 |
20090169789 | Resin pipe - A resin pipe has an inner layer made of a fluororesin, an intermediate layer of nylon, and an outermost layer made of a fluororesin and covering the intermediate layer. | 07-02-2009 |
20090250755 | Semiconductor Device - A transistor capable of adjusting a threshold value is obtained by adjusting an impurity concentration of a silicon substrate supporting an SOI layer and by controlling a thickness of a buried insulating layer formed on a surface of the silicon substrate in contact with the SOI layer. | 10-08-2009 |
20090263306 | SILICON CARBIDE SUBSTRATE, SEMICONDUCTOR DEVICE, WIRING SUBSTRATE, AND SILICON CARBIDE MANUFACTURING METHOD - A silicon carbide substrate has a high-frequency loss equal to or less than 2.0 dB/mm at 20 GHz is effective to mount and operate electronic components. The silicon carbide substrate is heated at 2000° C. or more to be reduced to the high-frequency loss equal to 2.0 dB/mm or less at 20 GHz. Moreover, manufacturing the silicon carbide substrate by CVD without flowing nitrogen into a heater enables the high-frequency loss to be reduced to 2.0 dB/mm or less. | 10-22-2009 |
20090263566 | Reduced Pressure Deposition Apparatus and Reduced Pressure Deposition Method - In a deposited thin film for use in a semiconductor device or the like for which a high integration degree and ultrafine machining are required, adsorption of contaminant, and particularly, of organic substances on the deposited thin film has become a problem. A phenomenon has been found out that, in a case where a gas pressure in a chamber is maintained in a viscous flow region, the adsorption of the organic substances is significantly decreased as compared with a case where the gas pressure is maintained in a molecular flow region. Based on this phenomenon, the gas pressure is controlled so that the gas pressure can be set in the molecular flow region at a time of forming the deposited thin film and so that the gas pressure can be set in the viscous flow region while such deposition is not being performed, thus making it possible to form the deposited thin film with less contamination from the organic substances. | 10-22-2009 |
20090302382 | Power Ic Device and Method of Manufacturing Same - In one embodiment of the present invention, a power IC device is disclosed containing a power MOS transistor with a low ON resistance and a surface channel MOS transistor with a high operation speed. There is also provided a method of manufacturing such a device. A chip has a surface of which the planar direction is not less than −8° and not more than +8° off a silicon crystal face. The p-channel trench power MOS transistor includes a trench formed vertically from the surface of the chip, a gate region in the trench, an inversion channel region on a side wall of the trench, a source region in a surface layer of the chip, and a drain region in a back surface layer of the chip. The surface channel MOS transistor has an inversion channel region fabricated so that an inversion channel current flows in a direction not less than −8° and not more than +8° off the silicon crystal direction. | 12-10-2009 |
20090309138 | Transistor and semiconductor device - An accumulation mode transistor has an impurity concentration of a semiconductor layer in a channel region at a value higher than 2×10 | 12-17-2009 |
20100000769 | COMPOSITE MAGNETIC BODY, METHOD OF MANUFACTURING THE SAME, CIRCUIT BOARD USING THE SAME, AND ELECTRONIC APPARATUS USING THE SAME - There are provided a composite magnetic body exhibiting a sufficiently low magnetic loss at frequencies of several hundreds of megahertz to several gigahertz, and a method of manufacturing the same. The composite magnetic body contains a magnetic powder dispersed in an insulating material. The magnetic powder is in a spherical shape or an elliptic shape. The composite magnetic body has any one of the following characteristics (a) to (c):
| 01-07-2010 |
20100025821 | ION IMPLANTING APPARATUS AND ION IMPLANTING METHOD - When positively charged ions are implanted into a target substrate, charge-up damage may occur on the target substrate. In order to suppress charge-up caused by secondary electrons emitted from the target substrate when positively charged ions are implanted, a conductive member is installed at a position facing the target substrate and electrically grounded with respect to a high frequency. Further, a field intensity generated in the target substrate may be reduced by controlling an RF power applied to the target substrate in pulse mode. | 02-04-2010 |
20100038722 | MIS TRANSISTOR AND CMOS TRANSISTOR - A MIS transistor, formed on a semiconductor substrate, assumed to comprise a semiconductor substrate ( | 02-18-2010 |
20100059830 | Semiconductor device - In a semiconductor device, the degree of flatness of 0.3 nm or less in terms of a peak-to-valley (P-V) value is realized by rinsing a silicon surface with hydrogen-added ultrapure water in a light-screened state and in a nitrogen atmosphere and a contact resistance of 10 | 03-11-2010 |
20100072519 | P-CHANNEL POWER MIS FIELD EFFECT TRANSISTOR AND SWITCHING CIRCUIT - In a P-channel power MIS field effect transistor formed on a silicon surface having substantially a (110) plane, a gate insulation film is used which provides a gate-to-source breakdown voltage of 10 V or more, and planarizes the silicon surface, or contains Kr, Ar, or Xe. | 03-25-2010 |
20100173477 | Method of Manufacturing Semiconductor Device and Semiconductor Manufacturing Apparatus - A cause of deteriorating the hydrogen termination on the surface of a wafer is found to be water adsorbed on the surface. By exposing the wafer to an inert gas atmosphere containing an H | 07-08-2010 |
20100193900 | SOI SUBSTRATE AND SEMICONDUCTOR DEVICE USING AN SOI SUBSTRATE - A base is formed of a material, such as SiC, having mechanical characteristics higher than those of silicon for forming a semiconductor layer, and the base and the semiconductor layer are bonded through an insulating layer. After bonding, an SOI substrate is formed by mechanically separating the semiconductor layer from the base, and the separated semiconductor layer is reused for forming the subsequent SOI substrate. Thus, a large SOI substrate having a diameter of 400 mm or more, which has been difficult to obtain by conventional methods, can be obtained. | 08-05-2010 |
20100213516 | SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR DEVICE - On a surface of a semiconductor substrate, a plurality of terraces formed stepwise by an atomic step are formed in the substantially same direction. Using the semiconductor substrate, a MOS transistor is formed so that no step exists in a carrier traveling direction (source-drain direction). | 08-26-2010 |
20100294435 | BONDING APPARATUS AND WIRE BONDING METHOD - A bonding apparatus including a chamber for maintaining an inert gas atmosphere; a first plasma torch for performing a surface treatment on pads and electrodes, the first plasma torch being attached in the chamber, to apply gas plasma to a substrate and a semiconductor chip that is placed inside the chamber; a second plasma torch for performing a surface treatment on an initial ball and/or wire at a tip end of a capillary that is positioned inside the chamber, the second plasma torch being attached in the chamber, to apply gas plasma to the initial ball and/or wire; and a bonding unit for bonding the surface-treated initial ball and/or wire to the surface-treated pads and electrodes in the chamber, thereby cleaning of the surface of the electrodes and pads as well as the wire can be effectively performed. | 11-25-2010 |
20100308839 | ELECTRONIC DEVICE IDENTIFYING METHOD - An electronic device that includes an actual operation circuit that operates during an actual operation of the electronic device, a second test circuit and a third test circuit that operate during a test of the electronic device, and a power supply section. The power supply section, during the actual operation of the electronic device, does not apply a power supply voltage to the second test circuit and applies power supply voltages to the actual operation circuit and the third test circuit. The power supply section, to obtain identification of the electronic device, applies a power supply voltage to the second test circuit. | 12-09-2010 |
20100326511 | SOLAR CELL WHEREIN SOLAR PHOTOVOLATIC THIN FILM IS DIRECTLY FORMED ON BASE - Disclosed is a solar cell comprising a solar cell semiconductor thin film formed on a base, a transparent conductive film formed on the semiconductor thin film, and a nitride-containing moisture diffusion-preventing film which covers the upper surface of the transparent conductive film. The moisture diffusion-preventing film is preferably composed of at least a silicon nitride film or a silicon carbide nitride (SiCN) film. | 12-30-2010 |
20110017501 | COMPOSITE MATERIAL AND MANUFACTURING METHOD THEREOF - This invention provides a composite material useful for size reduction of electronic components and circuit boards mounted on electronic equipment and exhibiting a low magnetic loss (tan δ), and a manufacturing method thereof. The composite material contains an insulating material and particulates dispersed in this insulating material, the particulates being previously coated with an insulating material having substantially the same composition as that of the coating insulating material. The particulates consist of an organic or inorganic substance and preferably have a flat shape. The insulating material may be an insulating material commonly used in the field of electronic components. The composite material of the invention is preferably manufactured by a manufacturing method in which the particulates are previously coated with an insulating material and dispersed in an insulating material having substantially the same composition as that of the coating insulating material. The composite material of the invention can be applied as a material for circuit boards and/or electronic components to realize further reduction in size and power consumption of information and telecommunication equipment in a frequency band of several hundred MHz to 1 GHz. | 01-27-2011 |
20110018577 | TEST CIRCUIT, WAFER, MEASURING APPARATUS, MEASURING METHOD, DEVICE MANUFACTURING METHOD AND DISPLAY APPARATUS - There is provided a wafer on which a plurality of electronic devices and circuits under test are to be formed, where each circuit under test includes a plurality of transistors under measurement provided in electrically parallel, a selecting section which sequentially selects the respective transistors under measurement, and an output section which sequentially outputs the source voltages of the transistors under measurement sequentially selected by the selecting section. | 01-27-2011 |
20110034037 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD FOR CLEANING SEMICONDUCTOR SUBSTRATE - Disclosed is a method for cleaning a semiconductor substrate that can solve a problem of a conventional cleaning method which should include at least five steps for cleaning a substrate such as a semiconductor substrate. The method for cleaning a semiconductor substrate comprises a first step of cleaning a substrate with ultrapure water containing ozone, a second step of cleaning the substrate with ultrapure water containing a surfactant, and a third step of removing an organic compound derived from the surfactant, with a cleaning liquid containing ultrapure water and 2-propanol. After the third step, plasma of noble gas such as krypton is applied to the substrate to further remove the organic compound derived from the surfactant. | 02-10-2011 |
20110042725 | SEMICONDUCTOR DEVICE - With inversion-mode transistors, intrinsic-mode transistors, or semiconductor-layer accumulation-layer current controlled accumulation-mode transistors, variation in threshold voltages becomes large in miniaturized generations due to statistical variation in impurity atom concentrations and thus it is difficult to maintain the reliability of an LSI. Provided is a bulk current controlled accumulation-mode transistor which is formed by controlling the thickness and the impurity atom concentration of a semiconductor layer so that the thickness of a depletion layer becomes greater than that of the semiconductor layer. For example, by setting the thickness of the semiconductor layer to 100 nm and setting the impurity concentration thereof to be higher than 2×10 | 02-24-2011 |
20110062460 | ORGANIC EL LIGHT EMITTING ELEMENT, MANUFACTURING METHOD THEREOF, AND DISPLAY DEVICE - An organic EL light emitting element is provided with a conductive transparent electrode | 03-17-2011 |
20110073922 | CONTACT FORMING METHOD, SEMICONDUCTOR DEVICE MANUFACTURING METHOD, AND SEMICONDUCTOR DEVICE - A semiconductor device manufacturing method includes the steps of ion-implanting a p-type or an n-type impurity into a Si layer portion to become a p-type or an n-type contact region of a semiconductor device, forming a metal film for a contact on a surface of the contact region without performing heat treatment for activating implanted ions after the ion-implanting step, and forming a silicide of a metal of the metal film by causing the metal to react with the Si layer portion by heating. It is desired to simultaneously perform the step of forming the silicide and the step of activating the implanted ions by heat treatment after the metal film is formed. | 03-31-2011 |
20110110052 | MULTILAYER WIRING BOARD - A multilayer wiring board | 05-12-2011 |
20110114708 | METAL NANOINK AND PROCESS FOR PRODUCING THE METAL NANOINK, AND DIE BONDING METHOD AND DIE BONDING APPARATUS USING THE METAL NANOINK - Metal nanoink ( | 05-19-2011 |
20110198702 | Contact Formation Method, Semiconductor Device Manufacturing Method, and Semiconductor Device - A semiconductor device manufacturing method which achieves a contact of a low resistivity is provided. | 08-18-2011 |
20110209567 | DISPLAY APPARATUS - There is provided a wafer on which a plurality of electronic devices and circuits under test are to be formed, where each circuit under test includes a plurality of transistors under measurement provided in electrically parallel, a selecting section which sequentially selects the respective transistors under measurement, and an output section which sequentially outputs the source voltages of the transistors under measurement sequentially selected by the selecting section. | 09-01-2011 |
20110212552 | DEVICE MANUFACTURING METHOD - There is provided a wafer on which a plurality of electronic devices and circuits under test are to be formed, where each circuit under test includes a plurality of transistors under measurement provided in electrically parallel, a selecting section which sequentially selects the respective transistors under measurement, and an output section which sequentially outputs the source voltages of the transistors under measurement sequentially selected by the selecting section. | 09-01-2011 |
20120146102 | TRANSISTOR AND SEMICONDUCTOR DEVICE - An accumulation mode transistor has an impurity concentration of a semiconductor layer in a channel region at a value higher than 2×10 | 06-14-2012 |
20120208375 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - In a semiconductor device formed on a silicon surface which has a substantial (110) crystal plane orientation, the silicon surface is flattened so that an arithmetical mean deviation of surface Ra is not greater than 0.15 nm, preferably, 0.09 nm, which enables to manufacture an n-MOS transistor of a high mobility. Such a flattened silicon surface is obtained by repeating a deposition process of a self-sacrifice oxide film in an oxygen radical atmosphere and a removing process of the self-sacrifice oxide film, by cleaning the silicon surface in deaerated H | 08-16-2012 |
20120234491 | PLASMA PROCESSING METHOD AND PLASMA PROCESSING APPARATUS - A plasma processing apparatus in which consumption of expensive krypton and xenon gases is suppressed as much as possible while reducing damage on a workpiece during plasma processing. In plasma processing of a substrate using a rare gas, two or more kinds of different rare gases are employed, and an inexpensive argon gas is used as one rare gas and any one or both of krypton and xenon gases having a larger collision cross-sectional area against electron than that of the argon gas is used as the other gas. Consequently, consumption of expensive krypton and xenon gases is suppressed as much as possible and damage on a workpiece is reduced during plasma processing. | 09-20-2012 |
20120292743 | SURFACE TREATMENT METHOD FOR ATOMICALLY FLATTENING A SILICON WAFER AND HEAT TREATMENT APPARATUS - In a silicon wafer which has a surface with a plurality of terraces formed stepwise by single-atomic-layer steps, respectively, no slip line is formed. | 11-22-2012 |
20120308714 | REDUCED PRESSURE DEPOSITION APPARATUS AND REDUCED PRESSURE DEPOSITION METHOD - In a deposited thin film for use in a semiconductor device or the like, adsorption of contaminants is a problem. In the case in which a gas pressure in a chamber is maintained in a viscous flow region, the adsorption of the organic substances is significantly decreased as compared with the case in which the gas pressure is maintained in a molecular flow region. The gas pressure is controlled so that it can be set in the molecular flow region when forming the deposited thin film, and set in the viscous flow region when such deposition is not being performed. Thus, the deposited thin film is formed with less contamination from the organic substances. | 12-06-2012 |
20130001280 | METAL NANOINK AND PROCESS FOR PRODUCING THE METAL NANOINK, AND DIE BONDING METHOD AND DIE BONDING APPARATUS USING THE METAL NANOINK - Metal nanoink for bonding an electrode of a semiconductor die and an electrode of a substrate and/or bonding an electrode of a semiconductor die and an electrode of another semiconductor die by sintering under pressure is produced by injecting oxygen into an organic solvent in the form of oxygen nanobubbles or oxygen bubbles either before or after metal nanoparticles whose surfaces are coated with a dispersant are mixed into the organic solvent. Bumps are formed on the electrode of the semiconductor die and the electrode of the substrate by ejecting microdroplets of the metal nanoink onto the electrodes, the semiconductor die is turned upside down and overlapped in alignment over the substrate, and then, the metal nanoparticles of the bumps are sintered under pressure by pressing and heating the bumps between the electrodes. As a result, generation of voids during sintering under pressure is minimized. | 01-03-2013 |
20140312399 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A gate insulating film of a conventional semiconductor device is subjected to dielectric breakdown at a low electric field strength and thus its service life is short. This is because since the size of the asperity of at least one of a semiconductor layer-side interface and an electrode-side interface is large and, an electric field applied to the gate insulating film is locally concentrated and has a variation in its strength. This problem is solved by specifying the sizes of the asperities of both interfaces of the gate insulating film. | 10-23-2014 |
20150041983 | SEMICONDUCTOR-DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE - Provided are a semiconductor device and semiconductor-device manufacturing method that make it possible to improve the contact between an insulating film and a wiring member and the reliability thereof. This method for manufacturing a semiconductor device ( | 02-12-2015 |