Patent application number | Description | Published |
20080285342 | Method of Programming a Nonvolatile Memory Cell and Related Memory Array - A programming method for programming stored bits in floating gates of a flash memory cell or selected flash memory cells of a flash memory array is utilized for applying SSI injection on said flash memory cell or said selected flash memory cells of a flash memory array is disclosed. Constant charges at the drain regions of said flash memory cell or said selected flash memory cells of the flash memory array is implemented with a capacitor and a related switch for suppressing variant injected-charges-related properties in applying the SSI injection. A constant biasing current, which may be implemented with a constant current source or a current mirror equipped with a constant current source, is applied on source regions of said flash memory cell or said selected flash memory cells of the flash memory array for enhancing the suppression of said variant biasing properties. | 11-20-2008 |
20100290282 | METHOD AND SYSTEM FOR ADAPTIVELY FINDING REFERENCE VOLTAGES FOR READING DATA FROM A MLC FLASH MEMORY - A method and system for adaptively finding reference voltages for reading data from a multi-level cell (MLC) flash memory is disclosed. According to one embodiment, information about an initial threshold voltage distribution is firstly provided. A first threshold voltage in the initial threshold voltage distribution is then associated with a second threshold voltage in a shifted threshold voltage distribution to be determined, such that the information corresponding to the first threshold voltage is approximate to the information corresponding to the second threshold voltage. Accordingly, initial reference voltage or voltages of the initial threshold voltage distribution are shifted with an amount approximate to difference between the first threshold voltage and the second threshold voltage, thereby resulting in new reference voltage or voltages for reading the data from the MLC flash memory. | 11-18-2010 |
20100321997 | Method And System For Obtaining A Reference Block For A MLC Flash Memory - A method and system for obtaining a reference block on which reference voltages may be found for a MLC flash memory are disclosed. A first block and a second block are provided in the flash memory. A memory controller alternatively controls one of the first and the second blocks to act as the reference block and the other one as a cycle block in a respective period, during which the reference block stays idle and the cycle block is subjected to program/erase cycles. | 12-23-2010 |
20110038205 | Method Of Reducing Bit Error Rate For A Flash Memory - A method of reducing coupling effect in a flash memory is disclosed. A neighboring page is read, and a flag is set active if the neighboring page is an interfering page. Data are read from the neighboring page at least two more times using at least two distinct read voltages respectively. The threshold-voltage distributions associated with an original page and the neighboring page are transferred according to the read data and the flag. | 02-17-2011 |
20110038209 | Method and System for Adaptively Finding Reference Voltages for Reading Data from a MLC Flash Memory - A method and system for adaptively finding reference voltages for reading data from a multi-level cell (MLC) flash memory is disclosed. According to one embodiment, a first total number of cells of the flash memory above a first threshold voltage in a shifted threshold voltage distribution is provided. Search to find a second threshold voltage such that a second total number of the cells above the second threshold voltage is approximate to the first total number. An initial reference voltage or voltages of the initial threshold voltage distribution are shifted with an amount approximate to a voltage difference between the second threshold voltage and the first threshold voltage, thereby resulting in a new reference voltage or voltages for reading the data from the MLC flash memory. | 02-17-2011 |
20110044101 | METHOD AND SYSTEM OF FINDING A READ VOLTAGE FOR A FLASH MEMORY - A method and system of finding a read voltage for a flash memory is disclosed. Data are read from array cells of the flash memory with a default read voltage, and a recorded state bit number that is recorded during programming is also read. Determine an optimal read voltage if the readout data do not pass the error correction control (ECC). Data are then re-read from the array cells of the flash memory with the determined optimal read voltage. | 02-24-2011 |
20110055659 | Method and System of Dynamic Data Storage for Error Correction in a Memory Device - A method of dynamic data storage for error correction in a memory device is disclosed. Data for storage is received, and the received data is then encoded and associated error correction code (ECC) is generated. The encoded data is stored in a portion of a data partition of the memory device, wherein percentage of the stored data in the data partition is determined according to an amount of corrected errors associated with the data partition or is predetermined. | 03-03-2011 |
20110072191 | Uniform Coding System for a Flash Memory - A uniform coding system for a flash memory is disclosed. A statistic decision unit determines a coding word according to a plurality of inputs. An inverse unit controllably inverts input data to be encoded. The input data are then encoded into encoded data according to a statistic determined by the statistic decision unit. | 03-24-2011 |
20110131459 | Memory Device with Protection Capability and Method of Accessing Data Therein - The present invention is directed to a memory device with protection capability and a method of accessing data therein. A spreader encrypts input user data according to an entered password, and the encrypted data is then stored in a storage area. A despreader performs reverse process of the spreader on the stored data according to the entered password. | 06-02-2011 |