Yu, Hsinchu County
Chao Sheng Yu, Hsinchu County TW
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20100063619 | SYSTEM AND METHOD FOR INSPECTION OF CHIPS ON TRAY - A system for inspection of chips on a tray comprises an unloading arm device, a first support platform, and a plurality of first tray-handling apparatuses. The first support platform is disposed adjacent to the unloading arm device, movable along a first direction. The plurality of first tray-handling apparatuses are arrayed along the first direction on the first support platform. Each of the plurality of first tray-handling apparatuses provides a particular size of tray for inspection, different from the size of tray provided by other first tray-handling apparatuses, wherein the first platform is configured to move a desired one of the plurality of first tray handling apparatuses before the unloading arm device. | 03-11-2010 |
Cheng-Ying Yu, Hsinchu County TW
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20140321279 | RANDOM EARLY DROP BASED PROCESSING CIRCUIT AND METHOD FOR TRIGGERING RANDOM EARLY DROP BASED OPERATION ACCORDING TO AT LEAST TRIGGER EVENT GENERATED BASED ON SOFTWARE PROGRAMMABLE SCHEDULE - A random early drop (RED) based processing circuit includes a scheduler, an RED-based decision logic and a controller. The scheduler generates a trigger event according to an RED-based operation schedule. The scheduler is coupled to a software interface, and the RED-based operation schedule in the scheduler is programmed via the software interface. The RED-based decision logic performs at least a first RED-based operation to generate a first RED decision accordingly. The controller receives at least the trigger event, and triggers the RED-based decision logic to perform the first RED-based operation according to at least the trigger event. | 10-30-2014 |
20160050299 | Flexible Data Packet Information Mapping And Modification - Methods and apparatuses pertaining to flexible information mapping and modification of data packets are described. A method may involve receiving a data packet, modifying one or more attributes of the data packet, and outputting the modified data packet. In modifying the one or more attributes of the data packet, the method may involve extracting information from the data packet, the information including one or more user-defined fields (UDFs) in a header of the data packet. The method may also involve defining one or more source user-defined fields (SUDFs) according to at least one UDF of the one or more UDFs. The method may further involve performing one or more actions with respect to at least one SUDF of the one or more SUDFs. | 02-18-2016 |
Chen-Hai Yu, Hsinchu County TW
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20100281189 | METHOD FOR ENHANCING DATA TRANSMISSION EFFICIENCY - A method for enhancing data transmission efficiency in a data transmission system having a host, a subsystem and a transmission interface, utilized for the host to transmit and receive a data from a memory of the subsystem via the transmission interface includes steps of the host outputting a query command to the subsystem via the transmission interface for querying available memory utilization of the subsystem; the subsystem outputting a return message to the host via the transmission interface for indicating the available memory utilization according to the query command; and controlling data transmission from the host to the subsystem according to the return message. | 11-04-2010 |
Chia-Chi Yu, Hsinchu County TW
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20150325193 | Method for Source Driving Circuit and Display Device Thereof - A method for a source driving circuit utilized in a display device includes receiving an input signal by a first reception module at a first period, receiving the input signal by the first reception module and a second reception module at a second period after the first period, receiving the input signal by the second reception module and a third reception module at a third period after the second period, and outputting the input signal received by the first reception module, the second reception module and the third reception module to a display panel after the third reception module finishes reception of the input signals, wherein the second reception module is disposed between the first reception module and the third reception module. | 11-12-2015 |
Chia-Chun Yu, Hsinchu County TW
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20150108526 | LIGHT EMITTING DIODE - A light emitting diode includes a semiconductor stacked structure, a substrate, a first electrode, a second electrode and a third electrode. The semiconductor stacked structure includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. An undoped semiconductor layer over the first semiconductor layer may be not removed or not completely removed to increase the strength of the semiconductor stacked structure and improve the reliability of the LED and the production yields of manufacturing process. A roughened structure (or a photonic crystal) can be formed on the undoped semiconductor layer when the semiconductor stacked structure to improve the light emitting efficiency of the LED. | 04-23-2015 |
20150108527 | LIGHT EMITTING DIODE - A light emitting diode includes a semiconductor stacked structure, a substrate, a first electrode, a second electrode and a third electrode. The semiconductor stacked structure includes a first semiconductor layer, a second semiconductor layer and a light emitting layer. A light extraction layer with a roughened structure is formed on the doped semiconductor layer to improve the light emitting efficiency of LED. Furthermore, the strength of the semiconductor stacked structure can be enhanced by the light extraction layer, to improve the reliability of the LED and the production yields of manufacturing process. | 04-23-2015 |
Chia-Wei Yu, Hsinchu County TW
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20120301849 | ZIRCONIUM OXIDE DENTAL IMPLANT WITH INTERNAL THREAD AND POLYGONAL TAPERING SECTION, AND THE MOLD FOR MOLDING THE SAME - A zirconium oxide dental implant is manufactured by injecting a zirconium oxide paste in a mold for obtaining a green body and sintering the green body to be the zirconium oxide dental implant. The green body is formed integrally with a first external thread section, a first none-thread section, a second external thread section, second none-thread section, wherein the first external thread section and the second external thread section are formed on the peripheral of the green body and divided by the first none-thread section and the second none-thread section. The mold may include at least a first molding part and a second molding part. The first molding part has a first imprinting inner surface for forming the first external thread section of the green body, and two none-thread inner surfaces for forming a half portion of the first none-thread section and the second none-thread section of the green body respectively. The second molding part has a second imprinting inner surface for forming the second external thread section of the green body, and two none-thread inner surfaces for forming a half portion of the first none-thread section and the second none-thread section of the green body respectively. Preferably, the mold may further include a driving mechanism, a polygonal conical slider and a screw thread forming rod for forming a internal thread and a polygonal tapering section in the green body. The polygonal conical slider is driven for axially sliding into the mold cavity without performing rotation. The screw thread forming rod is coaxially and slidably penetrated the polygonal conical slider and driven by the driving mechanism for screwing into the mold cavity and unscrewing out of the mold cavity. | 11-29-2012 |
Chieh-Chou Yu, Hsinchu County TW
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20130164321 | USE OF ANTRODIA CAMPHORATA FOR TREATING SKIN CONDITIONS - The present invention relates to the use of antrodia camphorata in the treatment of skin conditions, such as acne vulgaris, urticaria and eczema, allergic rhinitis, diabetes mellitus and its complications, cancer cachexia, hypercholesterolemia, gout in a subject in need of such treatment. The present invention is also directed to the use of antrodia camphorata in the prevention and treatment of oral cancer and arterial restenosis, in a subject in need of such prevention. The methods comprise the steps of: identifying a subject in need thereof, and administering to the subject a formulation comprising an effective amount of antrodia camphorata, whereby the symptoms in the subject are reduced or prevented. The composition can be a pharmaceutical composition or a nutraceutical composition. | 06-27-2013 |
20140199341 | USE OF ANTRODIA CAMPHORATA FOR TREATING DISEASES - The present invention relates to the use of | 07-17-2014 |
Chien-Chung Yu, Hsinchu County TW
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20160064122 | Micro-Resistance Structure with High Bending Strength, Manufacturing Method and Semi-Finished Structure Thereof - A micro-resistance structure with high bending strength is disclosed. The micro-resistance structure with high bending strength comprises a multi-layer metallic substrate; a patterned electrode layer disposed on a lower surface of the multi-layer metallic substrate; an encapsulant layer covering a portion of the multi-layer metallic substrate, wherein the encapsulant layer is substantially made of a flexible resin ink; and two external electrodes, which are electrically insulated from each other, covering the exposed portion of the multi-layer metallic substrate. The abovementioned structure is characterized in high bendability and applicable to wearable devices. A manufacturing method and a semi-finished structure of the micro-resistance structure with high bending strength are also disclosed herein. | 03-03-2016 |
Chih-Hsiang Yu, Hsinchu County TW
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20140118503 | STEREO CAMERA APPARATUS, SELF-CALIBRATION APPARATUS AND CALIBRATION METHOD - A stereo camera apparatus including an image capturing device, an optical axis controlling module and a calculating module is provided. The image capturing device is suitable for obtaining a stereo image, and the image capturing device includes a plurality of image capturing units. The optical axis controlling module is coupled to the image capturing device. The calculating module is coupled to the image capturing device and the optical axis controlling module, wherein the calculating module calculates a calibration condition according to the stereo image. The optical axis controlling module adjusts directions of imaging optical axes of the image capturing units. After being adjusted by the optical axis controlling modules, the imaging optical axes of the image capturing units are aligned. Besides, a self-calibration apparatus and a method of calibration are also provided. | 05-01-2014 |
20140139453 | OPTICAL-SEE-THROUGH HEAD MOUNTED DISPLAY SYSTEM AND INTERACTIVE OPERATION - An optical-see-through head mounted display (HMD) system is provided. The optical-see-through HMD system has a camera for generating image frames, a display device and a processor. The processor proceeds an interactive operation on each image frame. In the interactive operation, an image analysis is performed on the image frame to obtain positioning information of a marker and 3-dimensional information of an input device. According to the positioning information, the 3-dimensional information and eye position of an user, an image shielding process is performed to correct a portion of the frame to be displayed which is corresponding to the input device and a collision test is performed according to the positioning information and the 3-dimensional information of an input device to determine whether the input device touches the virtual image displayed by HMD. Then, an event corresponding to the touch position of the virtual image is executed. | 05-22-2014 |
Chih-Shih Yu, Hsinchu County TW
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20080284861 | Image processing method and apparatus thereof - A method for obtaining a still image frame with anti-vibration clearness includes the following steps. Multiple raw image frames are captured during a capturing period according to a capturing instruction. The raw image frames are compressed respectively, according to a predetermined compression rule, into multiple compressed image frames each of which has a data length after such compression. The compressed image frames are stored according to a predetermined sequence. The data lengths of the compressed image frames stored are compared according to the predetermined sequence. The desired still image frame is obtained through the compressed image frame of which the data length has a unique feature among all the compressed image frames. | 11-20-2008 |
Chin-Chu Yu, Hsinchu County TW
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20150192277 | PANEL LAMP WITH AN EASILY ASSEMBLED LAMPSHADE - A panel lamp includes a lamp housing, multiple first punched holes, multiple second punched holes, multiple first protruding bent portions, multiple second protruding bent portions, a light source module, and a lampshade. The lamp housing includes a first side plate and a second side plate opposite thereto. The first and second side plates respectively include a first folded portion and a second folded portion. Each first protruding bent portion is adjacent to each first punched hole. The first protruding bent portions and first folded portion form a first fixing mechanism. Each second protruding bent portion is adjacent to each second punched hole. The second protruding bent portions and second folded portion form a second fixing mechanism. The lampshade includes a first edge and a second edge. The first and second edges are respectively held by the first and second fixing mechanisms and are fixed to the lamp housing. | 07-09-2015 |
Ching-Wen Yu, Hsinchu County TW
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20130065033 | Multilayer Polyimide-Containing Film and Manufacturing Method Thereof - A multilayer polyimide-containing film comprises a coloring layer containing a pigment, and a first protection layer disposed on one surface of the coloring layer, the first protection layer having a thickness between about 0.5 and about 3 micrometers. In some embodiments, methods of manufacturing the multilayer polyimide-containing film are also described. | 03-14-2013 |
Chi-Yao Yu, Hsinchu County TW
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20100167681 | INTERFERENCE-ROBUST RECEIVER FOR A WIRELESS COMMUNICATION SYSTEM - An interference-robust receiver includes an RF signal processor, a frequency conversion interface and an analog signal processor. The RF signal processor provides an RF signal. The frequency conversion interface includes a passive mixer for generating an intermediate frequency signal by down-converting an in-band part of the RF signal to a passband of a filter and down-converting an out-of-band part of the RF signal to a stopband of the filter. The filter can thus filter the intermediate frequency signal with the passband and the stopband. | 07-01-2010 |
20100279641 | RECEIVER FOR WIRELESS COMMUNICATION SYSTEM - One exemplary receiver for a wireless communication system includes a plurality of signal processing components arranged to generate a receiver output according to a radio frequency (RF) signal. The signal processing components include amplifiers having a class-AB biased amplifier included therein. The signal processing components are disposed in a chip, and the class-AB biased amplifier is an amplifier which processes a signal corresponding to the RF signal before any other amplifier included in the chip. Another exemplary receiver for a wireless communication system includes an RF signal processor and a frequency conversion interface. The RF signal processor is to generate an RF signal, and has a class-AB biased amplifier arranged to apply amplification upon the RF signal. The frequency conversion interface is coupled to the RF signal processor, and used for receiving the RF signal generated from the RF signal processor and generating a down-converted result of the RF signal. | 11-04-2010 |
20110287729 | WIRELESS COMMUNICATION RECEIVER HAVING ONE SIGNAL PROCESSING CIRCUIT WHOSE OPERATION MODE IS ADJUSTED BY MONITORING SIGNAL LEVEL OF SPECIFIC SIGNAL OF PRECEDING SIGNAL PROCESSING CIRCUIT AND RELATED WIRELESS COMMUNICATION METHOD - A wireless communication receiver includes a first signal processing circuit, a second signal processing circuit, and a detecting circuit. The first signal processing circuit generates a first processed signal by processing a received radio frequency (RF) signal. The second signal processing circuit is coupled to the first signal processing circuit. The detecting circuit monitors a specific signal of the first signal processing circuit and generates at least a control signal to the second signal processing circuit in response to a signal level of the monitored specific signal. The control signal controls the second signal processing circuit to switch from a first operation mode to a second operation mode. | 11-24-2011 |
20130016796 | SIGNAL MODULATOR AND SIGNAL MODULATING METHODAANM Sun; Chih-HaoAACI New Taipei CityAACO TWAAGP Sun; Chih-Hao New Taipei City TWAANM Yu; Chi-YaoAACI Hsinchu CountyAACO TWAAGP Yu; Chi-Yao Hsinchu County TW - A signal modulator includes: a modulating circuit; a first signal trace block arranged to conduct a first in-phase oscillating signal to the modulating circuit, and conduct a first quadrature-phase oscillating signal to the modulating circuit; and a second signal trace block arranged to conduct a second in-phase oscillating signal to the modulating circuit, and conduct a second quadrature-phase oscillating signal to the modulating circuit, and a phase difference caused by the first signal trace block substantially equals a phase difference caused by the second signal trace block. | 01-17-2013 |
20140335810 | RECEIVER FOR WIRELESS COMMUNICATION SYSTEM - One exemplary receiver for a wireless communication system includes signal processing components arranged to generate a receiver output according to a radio frequency (RF) signal. The signal processing components include amplifiers having a class-AB biased amplifier included therein. The signal processing components are disposed in a chip, and the class-AB biased amplifier is an amplifier which processes a signal corresponding to the RF signal before any other amplifier included in the chip. The class-AB biased amplifier has a first amplifier block, a bias circuit and a second amplifier block. The first amplifier block is arranged to receive an input at the input port and generating a first output. The bias circuit is arranged to bias the first amplifier block for a class-AB operation. The second amplifier block is arranged to generate an output at the output port according to the first output. | 11-13-2014 |
20150156053 | SIGNAL MODULATOR AND SIGNAL MODULATING METHOD - A signal modulator includes: a modulating circuit; a first signal trace block arranged to conduct a first in-phase oscillating signal to the modulating circuit, and conduct a first quadrature-phase oscillating signal to the modulating circuit; and a second signal trace block arranged to conduct a second in-phase oscillating signal to the modulating circuit, and conduct a second quadrature-phase oscillating signal to the modulating circuit, and a phase difference of the first in-phase oscillating signal caused by the first signal trace block substantially equals a phase difference of the second quadrature-phase oscillating signal caused by the second signal trace block, a second quadrature-phase oscillating signal to the modulating circuit, and a phase difference of the second in-phase oscillating signal caused by the second signal trace block substantially equals a phase difference of the first quadrature-phase oscillating signal caused by the first signal trace block. | 06-04-2015 |
Chun-Chi Yu, Hsinchu County TW
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20150049562 | MEMORY CONTROL CIRCUIT AND METHOD OF CONTROLLING DATA READING PROCESS OF MEMORY MODULE - This invention discloses a memory control circuit and method of controlling a data reading process of a memory module. In the data reading process, the memory module transmits a data signal and a data strobe signal used to recover the data signal. The data strobe signal includes a preamble part. The method includes steps of: controlling an impedance matching circuit of the memory module so that the data strobe signal is kept at a fixed level before the preamble part; generating a clock; generating an enabling signal according to the clock; sampling the data strobe signal according to the enabling signal to generate a sampled result; adjusting an enabling time of the enabling signal according to the sampled result; and starting a data recovering process for the data signal according to the enabling signal. | 02-19-2015 |
20160035411 | MEMORY CONTROL CIRCUIT AND ASSOCIATED MEMORY CONTROL METHOD - a memory control circuit includes a comparator, an eye width measuring circuit and a calibration circuit, wherein the comparator is arranged to compare a data signal with a reference voltage to generate a compared data signal; the eye width measuring circuit is coupled to the comparator, and is arranged to measure an eye width of the compared data signal to generate a measuring result; and the calibration circuit is coupled to the comparator and the eye width measuring circuit, and is arranged to adjust a level of the reference voltage according to the measuring result. | 02-04-2016 |
Hsiang-Hsiung Yu, Hsinchu County TW
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20110066818 | STORAGE DEVICE, MEMORY CONTROLLER, AND DATA PROTECTION METHOD - A storage device, a memory controller, and a data protection method are provided. The method includes when receiving a read command sent by a host, adopting a corresponding output flow rate limit to determine an operation that is executed on read data corresponding to the read command by the host according to location information included in the read command or a type of a transmission interface between the host and the storage device. The method also includes executing an interference procedure by the storage device to prevent the read data from being copied to the host or slow down the speed of copying the read data to the host when identifying that the operation is a copy operation. | 03-17-2011 |
20110145480 | FLASH MEMORY STORAGE SYSTEM FOR SIMULATING REWRITABLE DISC DEVICE, FLASH MEMORY CONTROLLER, COMPUTER SYSTEM, AND METHOD THEREOF - A flash memory storage system including a flash memory chip, a connector, and a controller is provided. The flash memory chip has a plurality of physical blocks. The connector is configured to couple to a host system. The controller is coupled to the flash memory chip and the connector. The controller configures a plurality of logical blocks and maps the logical blocks to a portion of the physical blocks. In addition, the controller identifies rewritable disc commands from the host system and writes data from the host system into the physical blocks mapped to the logical blocks according to the rewritable disc commands. Thereby, a rewritable disc device is simulated by using the flash memory storage system. | 06-16-2011 |
20110145482 | BLOCK MANAGEMENT METHOD FOR FLASH MEMORY, AND FLASH MEMORY CONTROLLER AND FLASH MEMORY STORAGE DEVICE USING THE SAME - A block management method for managing blocks of a flash memory storage device is provided. The flash memory storage device includes a flash memory controller. The block management method includes the following steps. At least a part of the blocks is grouped into a first partition and a second partition. Whether an authentication code exists is determined. When the authentication code exists, the blocks belonging to the first partition are provided for a host system to access, so the host system displays the first partition and hides the second partition. An authentication information is received from the host system. Whether the authentication information and the authentication code are identical is authenticated. When the authentication information and the authentication code are identical, the blocks belonging to the second partition are provided for the host system to access, so the host system displays the second partition and hides the first partition. | 06-16-2011 |
20140297936 | NON-VOLATILE MEMORY STORAGE APPARATUS, MEMORY CONTROLLER AND DATA STORING METHOD - A non-volatile memory storage apparatus having a connector, an energy storage circuit, a power regulator and supply circuit, a non-volatile memory module, a memory controller and a buffer memory is provided. The power regulator and supply circuit is configured for transforming an output voltage from the energy storage circuit into a first voltage used for the non-volatile memory module and a second voltage used for the memory controller and the buffer memory. The memory controller is configured for writing data stored temporarily in the buffer memory into the non-volatile memory module with a special writing mode when receiving a detecting signal indicating that an input voltage is continuously smaller than a predetermined voltage for a predetermined period or receiving a detecting signal indicating that an inactive status of the connector or receiving a suspend mode signal, a warm reset signal or a hot reset signal from a host system. | 10-02-2014 |
20150305143 | MULTI-LAYER PRINTED CIRCUIT BOARD STRUCTURE, CONNECTOR MODULE AND MEMORY STORAGE DEVICE - A multi-layer printed circuit board structure, a connector module and a memory storage device are provided. The multi-layer printed circuit board structure includes a first layout layer and a second layout layer. The first layout layer includes a shielding element and at least one pad. The shielding element provides the grounding voltage. The second layout layer is disposed corresponding to the first layout layer and includes at least one wire, and one end of each wire is coupled to one of the pads. A predefined proportion of the wire is covered by a projection plane of the shielding element projected on the second layout layer. | 10-22-2015 |
20150323969 | MEMORY STORAGE DEVICE, MEMORY CONTROL CIRCUIT UNIT AND POWER SUPPLY METHOD - A memory storage device, a memory control circuit unit and a power supply method are provided. The power supply method includes: providing a first power voltage to a host interface circuit of the memory storage device; providing a second power voltage to a memory management circuit of the memory storage device; providing a third power voltage to a memory interface circuit of the memory storage device, wherein a reference voltage terminal of the memory interface circuit is coupled to a power input terminal of the memory management circuit. Thus, the overheat problem of the memory storage device due to the voltage conversion may be improved. | 11-12-2015 |
Hsiao-Hui Yu, Hsinchu County TW
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20150349047 | MIM CAPACITOR AND METHOD OF FORMING THE SAME - According to an exemplary embodiment, a method of forming a MIM capacitor is provided. The method includes the following operations: providing a first metal layer; providing a dielectric layer over the first metal layer; providing a second metal layer over the dielectric layer; etching the second metal layer to define the metal-insulator-metal capacitor; and oxidizing a sidewall of the second metal layer. According to an exemplary embodiment, a MIM capacitor is provided. The MIM capacitor includes a first metal layer; a dielectric layer over the first metal layer; a second metal layer over the dielectric layer; and an oxidized portion in proximity to the second metal layer and made of oxidized second metal layer. | 12-03-2015 |
Hsin-Chih Yu, Hsinchu County TW
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20130023098 | MANUFACTURING METHOD FOR METAL GATE - A manufacturing method for a metal gate includes providing a substrate having a dielectric layer and a polysilicon layer formed thereon, the polysilicon layer, forming a protecting layer on the polysilicon layer, forming a patterned hard mask on the protecting layer, performing a first etching process to etch the protecting layer and the polysilicon layer to form a dummy gate having a first height on the substrate, forming a multilayered dielectric structure covering the patterned hard mask and the dummy gate, removing the dummy gate to form a gate trench on the substrate, and forming a metal gate having a second height in the gate trench. The second height of the metal gate is substantially equal to the first height of the dummy gate. | 01-24-2013 |
Hsing-Cheng Yu, Hsinchu County TW
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20080252241 | SENSORLESS DRIVING METHOD FOR BRUSHLESS DC MOTOR - A sensorless driving method for a brushless DC motor is provided. The time for the motor to rotate an electrical angle 60° is obtained by alternatively counting the occurrences of zero crossings with two counters and comparing the counted values, and the motor is delayed an electrical angle of 30°, by which a precise commutating time is obtained. The driving method provides a mask-based phase shift digital detection mechanism for effectively detecting true zero-crossing points. The driving method further provides an inhabitation mechanism with the function of soft-switch for inhibiting noise caused by transistor switching. By using these two counters, the time for the motor to rotate two electrical angles 30°−Δθ and 30°+Δθ are obtained and stored in two registers. The time period before and after the commutating point is added into a pulse width modulation (PWM) signal to reduce the noise and vibration. | 10-16-2008 |
20110284720 | FLUORESCENCE MICROSCOPY IMAGING SYSTEM - A fluorescence microscopy imaging system is used for detecting a fluorescence signal of a sample, and includes a module for detecting fluorescence and a module for focusing control. The module for detecting fluorescence includes a fluorescence excitation light source generator (FELSG) and a fluorescence detector. The FELSG is capable of generating an excitation light beam having a first wavelength to excite the sample to emit fluorescence. The fluorescence detector is used to read the fluorescence signal of the sample. The module for focusing control generates a servo light beam having a second wavelength. A servo light beam reflecting film disposed on an observation plane is used to reflect the servo light beam. A return beam signal is analyzed using a focusing detection method. An actuator is used to move the objective for focusing, so as to enable the fluorescence excitation light beam to excite the sample to emit fluorescence. | 11-24-2011 |
Hsun Yu, Hsinchu County TW
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20140177189 | CHIP STACKING STRUCTURE - A chip stacking structure including a plurality of microbump structures, a plurality of first substrates, at least one first space layer, a plurality of second substrates and at least one second space layer is provided. The first substrates are stacked upon each other by a portion of the microbump structures, and each of the first substrates includes at least one first redistribution layer. The first space layer is located between the stacked first substrates. The second substrates are stacked on at least one of the first substrates by another portion of the microbump structures, and each of the second substrates includes at least one second redistribution layer. The second space layer is located between the stacked first and second substrates. The first redistribution layers, the second redistribution layers and the microbump structures form a plurality of impedance elements, and the impedance elements provide a specific oscillation frequency. | 06-26-2014 |
Hsu-Sheng Yu, Hsinchu County TW
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20150179514 | CLUSTER SYSTEM FOR ELIMINATING BARRIER OVERHANG - A cluster tool is disclosed that can increase throughput of a wafer fabrication process by facilitating removal of barrier overhang in contact holes of contact film stacks. Individual chambers of the cluster tool provide for deposition of barrier material onto a semiconductor structure, depositing over with an amorphous carbon film (ACF), etching back the ACF, and etching a corner region of the contact hole. Removal of the barrier overhang improves the quality of metal fill-in of the contact hole. An expectedly ensuing feature entails a technique in which filling-in of the contact hole with a metal such as tungsten can be achieved with attenuated or eliminated adverse consequence. | 06-25-2015 |
20150179569 | METHOD OF CONTROLLING CONTACT HOLE PROFILE FOR METAL FILL-IN - A method of eliminating overhang in a contact hole formed in a contact film stack is described. A liner layer is overlaid on the contact film stack, the liner also coating the contact hole. A portion of the liner is removed to expose the overhang, and the exposed overhang is removed. The liner is also used to fill-in a bowing profile of the contact hole, thereby rendering sidewalls of the contact hole smooth and straight suitable for metal fill-in while suppressing piping defects. | 06-25-2015 |
Hung-Sheng Yu, Hsinchu County TW
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20130009328 | ALIGNMENT MARK, SEMICONDUCTOR HAVING THE ALIGNMENT MARK, AND FABRICATING METHOD OF THE ALIGNMENT MARK - An alignment mark with a sheet or a layer of copper, which is compatible with a copper process, is provided herein. In one embodiment, a whole sheet of copper (Cu) is used as a background of the alignment mark, by which the color of the background of the alignment mark is stable and reliable. By such arrangement, the contrast between colors of a main pattern and the background of the alignment mark can be significantly improved, without considering a problem the homogeneity of manufacturing process. If the alignment mark is applied for manufacturing of a display, a recognition successful rate of alignment to attach an integrated circuit (IC) to a panel of the display is increased. | 01-10-2013 |
I-Lung Yu, Hsinchu County TW
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20160074773 | METHOD FOR SEPARATING AND PURIFING FUNCTIONAL INGREDIENTS FROM PLACENTA USING SUPERCRITICAL FLUID TECHNOLOGY - The present invention provides a method to separate and purify functional ingredients in placenta using supercritical fluid technology, where, placenta extract liquid and supercritical CO | 03-17-2016 |
Jen-Yu Yu, Hsinchu County TW
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20150110466 | VIDEO INDEXING METHOD, VIDEO INDEXING APPARATUS AND COMPUTER READABLE MEDIUM - A video indexing method, a video indexing apparatus, and a computer readable medium are disclosed. The video indexing apparatus comprises a generation module, a calculation module and a construction module. The generation module generates a frame movement analysis graphics according to a plurality of analysis points corresponding to a plurality of video frames of a video record. The calculation module calculates a plurality of frame movement velocities corresponding to the video frames according to the frame movement analysis graphics. The construction module constructs an indexing graphics of the video record according to the frame movement velocities. | 04-23-2015 |
Jiun-Lei Jerry Yu, Hsinchu County TW
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20130112986 | Gallium Nitride Semiconductor Devices and Method Making Thereof - The present disclosure relates to an enhancement mode gallium nitride (GaN) transistor device. The GaN transistor device has an electron supply layer located on top of a GaN layer. An etch stop layer (e.g., AlN) is disposed above the electron supply layer. A gate structure is formed on top of the etch stop layer, such that the bottom surface of the gate structure is located vertically above the etch stop layer. The position of etch stop layer in the GaN transistor device stack allows it to both enhance gate definition during processing (e.g., selective etching of the gate structure located on top of the AlN layer) and to act as a gate insulator that reduces gate leakage of the GaN transistor device. | 05-09-2013 |
Kuo-Feng Yu, Hsinchu County TW
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20140179080 | High Voltage Device with Reduced Leakage - A semiconductor device is provided which includes a semiconductor substrate, a gate structure formed on the substrate, sidewall spacers formed on each side of the gate structure, a source and a drain formed in the substrate on either side of the gate structure, the source and drain having a first type of conductivity, a lightly doped region formed in the substrate and aligned with a side of the gate structure, the lightly doped region having the first type of conductivity, and a barrier region formed in the substrate and adjacent the drain. The barrier region is formed by doping a dopant of a second type of conductivity different from the first type of conductivity. | 06-26-2014 |
20150104933 | SYSTEMS AND METHODS FOR ANNEALING SEMICONDUCTOR DEVICE STRUCTURES USING MICROWAVE RADIATION - Systems and methods are provided for annealing a semiconductor device structure using microwave radiation. For example, a semiconductor device structure is provided. An interfacial layer is formed on the semiconductor device structure. A high-k dielectric layer is formed on the interfacial layer. Microwave radiation is applied to anneal the semiconductor device structure for fabricating semiconductor devices. | 04-16-2015 |
20150228485 | METHODS AND SYSTEMS FOR DOPANT ACTIVATION USING MICROWAVE RADIATION - A semiconductor structure includes a substrate and a source/drain (S/D) junction. The S/D junction is associated with the substrate and includes a semiconductor material. The semiconductor material includes germanium and has a percentage composition of the germanium between about 50% and about 95%. | 08-13-2015 |
20150318381 | Method for FinFET Device - Provided is a method of forming a fin field effect transistor (FinFET). The method includes forming a fin on a substrate, the fin having a channel region therein. The method further includes forming a gate structure engaging the fin adjacent to the channel region and forming a spacer on sidewalls of the gate structure. The method further includes forming two recesses in the fin adjacent to the spacer and on opposite sides of the gate structure and epitaxially growing a solid phase diffusion (SPD) layer in the two recesses, the SPD layer containing a high concentration of a dopant. The method further includes performing an annealing process thereby diffusing the dopant into the fin underneath the spacer and forming lightly doped source/drain (LDD) regions therein. The LDD regions have substantially uniform dopant concentration on top and sidewalls of the fin. | 11-05-2015 |
Li-Ping Yu, Hsinchu County TW
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20120064937 | Wireless Communication Device and Power Saving Method Thereof - A wireless communication device is a mobile station of a wireless communication network system. In an idle mode, when the wireless communication device enters a startup state from a sleep state to prepare for receiving a paging message, base station (BS) measurement is performed at least once before the paging message is received. | 03-15-2012 |
Man-Chun Yu, Hsinchu County TW
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20090170993 | FLEXIBLE, LOW DIELECTRIC LOSS COMPOSITION AND METHOD FOR PREPARING THE SAME - A flexible, low dielectric loss composition, used to fabricate a flexible substrate, is provided. The composition includes: SrTiO | 07-02-2009 |
Ming-Hua Yu, Hsinchu County TW
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20110049567 | BOTTLE-NECK RECESS IN A SEMICONDUCTOR DEVICE - The present disclosure provides a method for fabricating a semiconductor device that includes providing a silicon substrate, forming a gate stack over the silicon substrate, performing a biased dry etching process to the substrate to remove a portion of the silicon substrate, thereby forming a recess region in the silicon substrate, performing a non-biased etching process to the recess region in the silicon substrate, thereby forming a bottle-neck shaped recess region in the silicon substrate, and epi-growing a semiconductor material in the bottle-neck shaped recess region in the silicon substrate. An embodiment may include a biased dry etching process including adding HeO2 gas and HBr gas. An embodiment may include performing a first biased dry etching process including N2 gas and performing a second biased dry etching process not including N2 gas. An embodiment may include performing an oxidation process to the recess region in the silicon substrate by adding oxygen gas to form silicon oxide on a portion of the recess region in the silicon substrate. As such, these processes form polymer protection to help form the bottle-neck shaped recess. | 03-03-2011 |
Ren-Yuan Yu, Hsinchu County TW
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20110181505 | METHOD OF SENSING MOTION IN THREE-DIMENSIONAL SPACE - An accelerometer and a gyroscope are disposed in a device. When the device rotates in a 3D space, angle of the device relative to gravity is calculated, movement of the device relative to gravity is calculated during the rotation process, and a real trace of the device is obtained in the 3D space. | 07-28-2011 |
Shang-Jen Yu, Hsinchu County TW
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20120241600 | OPTICAL ELECTRICAL MODULE - An optical electrical module includes a first substrate, a second substrate, a bearing portion and at least one optical electrical element. The second substrate is combined with the first substrate and has a reflective surface facing to the first substrate. The bearing portion is disposed between the first substrate and the second substrate to limit at least one light guide element. The optical electrical element is disposed on a surface of the first substrate facing to the reflective surface and faces to the reflective surface. The optical electrical element is configured for providing or receiving light signals. The reflective surface and the light guide element are disposed on an optical path of the light signals. | 09-27-2012 |
20150023632 | OPTICAL ELECTRICAL MODULE USED FOR OPTICAL COMMUNICATION USED FOR OPTICAL COMMUNICATION - An optical electrical module includes a first substrate, a second substrate, a bearing portion and at least one optical electrical element. The second substrate is combined with the first substrate and has a reflective surface facing the first substrate. The bearing portion is disposed between the first substrate and the second substrate to limit at least one light guide element. The optical electrical element is disposed on a surface of the first substrate facing the reflective surface and faces the reflective surface. The optical electrical element is configured for providing or receiving light signals. The reflective surface and the light guide element are disposed on an optical path of the light signals. | 01-22-2015 |
Shao-Ming Yu, Hsinchu County TW
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20150380525 | Structure and Method for FinFET Device - A method for fabricating a fin-type field-effect transistor (FinFET) device includes forming a first fin structure over a substrate, forming a dielectric layer over the first fin structures, forming a trench with a vertical profile in the dielectric layer, depositing conformably a first semiconductor material layer over sidewalls and bottom of the trench, depositing a second semiconductor material layer over the first semiconductor material layer to filling in the remaining trench, recessing the dielectric layer to laterally expose the first semiconductor material layer and etching the exposed first semiconductor material layer to reveal the second semiconductor material layer. | 12-31-2015 |
Tien-Hua Yu, Hsinchu County TW
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20130300878 | MEASURING DEVICE AND ASSOCIATED METHOD FOR MEASURING RESPONSE SPEED OF DISPLAY PANEL - A measuring device for measuring a response speed of a display panel is provided. The measuring device includes a microcontroller and at least one photo sensor. The microcontroller provides a control command, according to which a display controller of the display panel provides test pattern to the display panel. The photo sensor senses a test frame displayed corresponding to the test pattern by the display panel, and provides a corresponding sensing signal associated with brightness and a response signal. According to the response signal, the response speed of the display panel is calculated. | 11-14-2013 |
20140197688 | ELECTRONIC DEVICE AND POWER MANAGEMENT CONTROL METHOD - A power management method and associated electronic device are provided. The electronic device includes a power management circuit and a control circuit. The control circuit is powered by a power path. The power management method includes detecting whether the control circuit is powered, forwarding a control authority of the power path to the control circuit when the control circuit is powered, and forwarding the control authority to the power management circuit when the control circuit is not powered. | 07-17-2014 |
20150294643 | CORRECTING METHOD, CORRECTING APPARATUS AND METHOD FOR ESTABLISHING COLOR PERFORMANCE DATABASE FOR DISPLAY APPARATUS - A correcting method for a display apparatus is provided. For N original grayscale combinations, color performances of the display apparatus are respectively measured to generate N measurement results. A set of color blending equations are utilized for M original grayscale combinations according to the N measurement results to generate M blended results. From the N measurement results and the M blended results, P color performances respectively most approximate to P target performances are identified. The P target color performances correspond to P target grayscale combinations. The P color performances correspond to P original grayscale combinations in the (N+M) original grayscale combinations. A look-up table for correcting the display apparatus is established according to the P target grayscale combinations and the P corresponding original grayscale combinations. | 10-15-2015 |
Ting Yao Yu, Hsinchu County TW
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20150202828 | CARBON FIBER RIM FOR BICYCLE AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing carbon fiber rim for bicycle comprising steps of: preparing at least one preformed mold, separating from the preformed main mold, connecting with an inner framework, and solidifying; wherein plural carbon-fiber prepreg wires are repeatedly on a preformed carbon fiber case at least twice so as to form at least two rolling layers, and each rolling layer is at varying angle. Also, a carbon fiber rim for bicycle contains: an inner framework having a profile corresponding to a carbon fiber rim; and a preformed carbon fiber case at least covering a part of the inner framework and being successive rolled by plural carbon-fiber prepreg wires relative to a set angle of an axis normal. | 07-23-2015 |
Tsung-Hsin Yu, Hsinchu County TW
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20130241615 | HIGH VOLTAGE SWING DECOMPOSITION METHOD AND APPARATUS - A voltage swing decomposition circuit includes first and second clamp circuits and a protection circuit. The first clamp circuit is configured to clamp an output node of the first clamp circuit at a first voltage level when an input node of the voltage swing decomposition circuit has a voltage higher than the first voltage level. The second clamp circuit is configured to clamp an output node of the second clamp circuit at a second voltage level, higher than the first level, when the voltage of the input node is lower than the second voltage level. The protection circuit is coupled to the output nodes of the first and second clamp circuits, and is configured to selectively set an output node of the protection circuit to the first or second voltage level. The first and second clamp circuits are coupled together by the output node of the protection circuit. | 09-19-2013 |
Tsung-Ju Yu, Hsinchu County TW
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20110291697 | DIGITAL LOGIC CIRCUIT AND MANUFACTURE METHOD THEREOF - A digital logic circuit and a manufacture method of the digital logic circuit thereof are provided. The digital logic circuit includes a voltage rail, a ground rail, and a plurality of logic circuit rails, wherein each of the logic circuit rails is electrically connected to the voltage rail and the ground rail. The logic circuit rail includes a logic unit and an auxiliary unit electrically connected to the voltage rail and the ground rail. The logic unit includes a logic voltage end electrically connected to the voltage rail and a logic ground end electrically connected to the ground rail. The auxiliary unit includes an auxiliary voltage end electrically connected to the voltage rail and an auxiliary ground end electrically connected to the ground rail. At least one of the width ratio between the auxiliary voltage end and the logic voltage end and the width ratio between the auxiliary ground end and the logic ground end is greater than 1. | 12-01-2011 |
Tung-Yi Yu, Hsinchu County TW
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20140286636 | Optical Transceiver Device - An optical transceiver device has an optical transceiver component, an O/E conversion substrate and a switch control substrate. The optical transceiver component is connected to the first, second optical fiber network equipments for the transmission of optical signal, respectively. The O/E conversion substrate is electrically connected to an in-line equipment at a first location for transmission of electrical signal, and may convert the received optical signal into the electrical signal or convert the received electrical signal into the optical signal. The switch control substrate is electrically connected with an optical switching switch and is connected with the in-line equipment at a second location to receive a control signal for the optical switch from the in-line equipment such that the optical switching switch operates at an normal mode or an bypass mode to guarantee normal network communication of the first, second optical network equipment. | 09-25-2014 |
20150093078 | CONNECTOR - A connector is provided, including a connector body, a fastener and an elastomer. The fastener is pivoted on the connector body with a hook end and a press end positioned on both sides thereof, respectively. The two ends of the elastomer contact the connector body and the press end of the fastener, respectively. The connector of the invention may accomplish plugging and unplugging of an electronic equipment in a single hand press way without bracer arrangement by a configuration of the press end, and may maintain an engagement state between the hook end and the electronic equipment with an arrangement of the elastomer. | 04-02-2015 |
Wei-Lin Yu, Hsinchu County TW
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20110147278 | MAGNETIC SEPARATION DEVICE AND METHOD FOR SEPARATING MAGNETIC SUBSTANCE IN BIO-SAMPLES - A magnetic separation device is provided, including a first magnetic field unit and a first separation unit disposed at a side of the first magnetic field unit. The first magnetic field unit includes a first magnetic yoke having opposite first and second surfaces, and a plurality of first magnets respectively disposed over the first and second surfaces, wherein the same magnetic poles of the plurality of first magnets face the first magnetic yoke. The first separation unit includes a body made of non-magnetic materials and a continuous piping disposed in the body, including at least one first section and at least one second section, wherein at least one second section is perpendicular to at least one first section, and at least one second section is adjacent to, and in parallel to a side of the first magnetic yoke not in contact with the plurality of first magnets. | 06-23-2011 |
Wen-Hao Yu, Hsinchu County TW
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20090147550 | FULL DIGITAL SOFT-START CIRCUIT AND POWER SUPPLY SYSTEM USING THE SAME - A full digital soft-start circuit adapted for a power supply system is provided. The full digital soft-start circuit includes a ring oscillator, a pulse generator, a counter, and a multiplexer. The ring oscillator generates a plurality of clock signals which are different in phase, while equivalent in duty cycle and frequency. The pulse generator generates a plurality of pulse signals with different duty cycles. The counter generates a multi-bit counting signal. The multiplexer determines whether to transmit the pulse signals generated by the pulse generator so as to generate an output pulse which becomes stable as time going on. | 06-11-2009 |
Ya-Hui Yu, Hsinchu County TW
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20110194619 | METHOD AND VIDEO RECEIVING SYSTEM FOR ADAPTIVELY DECODING EMBEDDED VIDEO BITSTREAM - A method is provided for adaptively decoding an embedded video bitstream by a video receiving system. First, the embedded video bitstream is received. At least one terminal parameter of the video receiving system is further obtained. The at least one terminal parameter includes one of display parameter and system memory bandwidth usage of the video receiving system. Next, the embedded video bitstream is truncated to extract a truncated video bitstream according to the at least one terminal parameter. Finally, the truncated video bitstream is decoded to reconstruct video data. | 08-11-2011 |
20120274740 | METHOD FOR PROCESSING VIDEO INPUT BY DETECTING IF PICTURE OF ONE VIEW IS CORRECTLY PAIRED WITH ANOTHER PICTURE OF ANOTHER VIEW FOR SPECIFIC PRESENTATION TIME AND RELATED PROCESSING APPARATUS THEREOF - A method of processing a video input which transmits pictures of a first view and pictures of a second view includes: checking the video input to detect if a first picture of one of the first and second views is correctly paired with a second picture of the other of the first and second views for a specific presentation time, and accordingly generating a detecting result; and referring to the detecting result for selectively performing a predetermined processing operation upon the video input. | 11-01-2012 |
20140104384 | METHOD FOR PROCESSING VIDEO INPUT BY DETECTING IF PICTURE OF ONE VIEW IS CORRECTLY PAIRED WITH ANOTHER PICTURE OF ANOTHER VIEW FOR SPECIFIC PRESENTATION TIME AND RELATED PROCESSING APPARATUS THEREOF - A method of processing a video input, having a first video bitstream transmitting pictures of a first view and a second video bitstream transmitting pictures of a second view, includes: checking the video input to detect if a first picture of one of the first and second views is correctly paired with a second picture of the other of the first and second views for specific presentation time; and referring to a detecting result for selectively performing a predetermined processing operation upon the video input. The video input transmits the second picture while transmitting the first picture. When the detecting result indicates that the first picture is not correctly paired with the second picture for the specific presentation time, both of the first picture and the second picture are skipped, and previous pictures that are correctly paired with each other for the specific presentation time is repeated. | 04-17-2014 |
Yeh Hsin Yu, Hsinchu County TW
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20090087287 | APPARATUS AND METHOD FOR SEMICONDUCTOR WAFER TRANSFER - An apparatus for semiconductor wafer transfer comprises a first region for placement of a pod, a second region for placement of a cassette, an unloading mechanism, and a transferring mechanism for transferring wafers in the unloaded pod to the cassette horizontally. In an embodiment, the pod is unloaded by lifting the housing of the pod, and preferably the apparatus for movement of semiconductor wafers further comprises a carrying mechanism for moving the cassette toward the pod, so that the cassette can be closer to the pod for smoothing wafer transfer. | 04-02-2009 |
Yeh-Wei Yu, Hsinchu County TW
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20100284254 | NEAR FIELD OPTICAL DISC AND NEAR FIELD OPTICAL DISC READING APPARATUS - A near field optical disc and a near field optical disc reading apparatus are provided. The near field optical disc has at least one light source and a near field optical pick-up head, and the near field optical disc includes a light guiding substance, a first reflection layer and a second reflection layer. The light guiding substance has a first surface, a second surface opposite thereto and at least one light entrance window. Light emitted from the light source enters the light guiding substance through the light entrance window. The second reflection layer is disposed on the second surface. The first reflection layer is disposed on the first surface and has a plurality of light pervious holes. A part of the light is transmitted through the light pervious holes and picked up by the near field optical pick-up head. | 11-11-2010 |
20100309768 | HOLOGRAM DISC READING AND WRITING APPARATUS AND HOLOGRAM DISC READING APPARATUS - A hologram disc reading and writing apparatus including a signal light source module, a beam splitter, a reference/reading light source, a reflector, and an optical reading head and a hologram disc reading apparatus are provided. A signal light beam emitted from the signal light source module is transmitted to a data region of a hologram disc through the beam splitter. The reference/reading light source, the signal light source module, and the optical reading head are disposed at the same side of the hologram disc. The reflector is disposed at the other side. A spherical wave light beam emitted from the reference/reading light source is transmitted through the data region and reflected by the reflector to form a phase conjugate light beam transmitted to and through the data region. The phase conjugate light beam is transformed to a data light beam transmitted to the optical reading head through the beam splitter. | 12-09-2010 |
20110235493 | Collinear Holographic Storage Method and Apparatus - In the specification and drawings, a collinear holographic storage method is described and shown with a controlling step to control the temperature of the collinear holographic storage media such that the writing temperature of the collinear holographic storage media is from between about 5° C. to about 50° C. higher than the reading temperature of the collinear holographic storage media. | 09-29-2011 |
20110249308 | Collinear Holographic Storage Medium - In the specification and drawings, a collinear holographic storage medium is described and shown with a recording layer, wherein the lateral linear thermal expansion coefficient of the recording layer is substantially the same as the linear thermal expansion coefficient of the material of the recording layer. | 10-13-2011 |
20110249544 | Reading Device - A reading device includes a spatial light modulator, a zoom lens set, an object lens, an image sensor, and an adjusting module. The spatial light modulator provides a reading beam. The zoom lens set forms the reading beam into a real image. The object lens focuses the real image onto a collinear holographic storage medium and thus produces a diffraction signal. The image sensor converts the diffraction signal into an electric signal. The adjusting module adjusts the optical magnification of the zoom lens set according to the quality of the diffraction signal. | 10-13-2011 |
Yi-Hsin Yu, Hsinchu County TW
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20140321473 | ACTIVE OUTPUT BUFFER CONTROLLER FOR CONTROLLING PACKET DATA OUTPUT OF MAIN BUFFER IN NETWORK DEVICE AND RELATED METHOD - An active output buffer controller is used for controlling a packet data output of a main buffer in a network device. The active output buffer controller has a credit evaluation circuit and a control logic. The credit evaluation circuit estimates a credit value based on at least one of an ingress data reception status of the network device and an egress data transmission status of the network device. The control logic compares the credit value with a first predetermined threshold value to generate a comparison result, and controls the packet data output of the main buffer according to at least the comparison result. | 10-30-2014 |
20140321475 | SCHEDULER FOR DECIDING FINAL OUTPUT QUEUE BY SELECTING ONE OF MULTIPLE CANDIDATE OUTPUT QUEUES AND RELATED METHOD - A scheduler performs a plurality of scheduler operations each scheduling an output queue selected from a plurality of output queues associated with an egress port. The scheduler includes a candidate decision logic and a final decision logic. The candidate decision logic is arranged to decide a plurality of candidate output queues for a current scheduler operation, regardless of a resultant status of packet transmission of at least one scheduled output queue decided by at least one previous scheduler operation. The final decision logic is arranged to select one of the candidate output queues as a scheduled output queue decided by the current scheduler operation after obtaining the resultant status of packet transmission of the at least one scheduled output queue decided by the at least one previous scheduler operation. | 10-30-2014 |
20140321476 | PACKET OUTPUT CONTROLLER AND METHOD FOR DEQUEUING MULTIPLE PACKETS FROM ONE SCHEDULED OUTPUT QUEUE AND/OR USING OVER-SCHEDULING TO SCHEDULE OUTPUT QUEUES - One packet output controller includes a scheduler and a dequeue device. The scheduler performs a single scheduler operation to schedule an output queue selected from a plurality of output queues associated with an egress port. The dequeue device dequeues multiple packets from the scheduled output queue decided by the single scheduler operation. Another packet output controller includes a scheduler and a dequeue device. The scheduler performs a plurality of scheduler operations each scheduling an output queue selected from a plurality of output queues associated with an egress port. The scheduler performs a current scheduler operation, regardless of a status of a packet transmission of a scheduled output queue decided by a previous scheduler operation. The dequeue device dequeues at least one packet from the scheduled output queue decided by the current scheduler operation after the packet transmission of the scheduled output queue decided by the previous scheduler operation is complete. | 10-30-2014 |
Yu Ping Yu, Hsinchu County TW
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20080244363 | REED SOLOMON DECODER AND IBMA METHOD AND PARALLEL-TO-SERIAL CONVERSION METHOD THEREOF - A parallel-to-serial conversion method for IBMA in a Reed Solomon decoder is used for obtaining discrepancies in IBMA iterations, thereby acquiring an error location polynomial and an error value polynomial. Syndrome sequences for the calculation of discrepancies in IBMA iterations have a fixed length. The number of syndromes is t+1, where t is the largest number of symbols that can be corrected of the error location polynomial. The feature that syndrome sequences have the same length is based on the fact that the discrepancies are not affected if the coefficients of polynomial orders of the error location polynomial are zero. | 10-02-2008 |