Patent application number | Description | Published |
20080203962 | APPARATUS AND METHOD FOR DRIVING SYNCHRONOUS MOTOR - The synchronous motor driving apparatus including position sensors provided in the synchronous motor, a current polarity detection circuit for detecting the polarities of the currents in the respective phase windings of the synchronous motor, an inverter driving the synchronous motor, a motor speed calculation unit calculating the rotational speed of the synchronous motor depending on the output signals from the position sensors, a speed control unit outputting a first voltage adjusting component (q-axis current command value Iq*) to cause the rotational speed of the synchronous motor to approach a speed command value and a phase control unit outputting a second voltage adjusting component (d-axis current command value Id*) to cause the phase differences between the phases of the position sensor signals and of the currents in the respective phase windings of the synchronous motor to become a predetermined value. | 08-28-2008 |
20090066384 | SEMICONDUCTOR INTEGRATED CIRCUIT, PWM SIGNAL OUTPUT DEVICE, AND POWER CONVERSION CONTROL APPARATUS - Provided is a control technique of a PWM conversion type power converter capable of compensating for a voltage error due to voltage drop mainly at a switching element and managing a switching time of a PWM signal at the same time, and capable of suppressing increase/decrease of software operation load and addition of a hardware circuit to the minimum. A semiconductor integrated circuit having a PWM signal generating unit which generates a PWM signal is provided with a PWM timer unit including a counter counting a pulse width of a pulse signal inputted from the outside with delay from a PWM signal, a register loading a counter value of the counter in synchronization with the PWM signal, and an A/D converting unit converting an analog signal serving as a source signal of the pulse signal inputted from the outside to a digital signal. | 03-12-2009 |
20090135630 | Converter And Power Converter That Becomes It With The Converter - A converter includes a converter circuit | 05-28-2009 |
20110018485 | APPARATUS AND METHOD FOR DRIVING SYNCHRONOUS MOTOR - The synchronous motor driving apparatus including position sensors provided in the synchronous motor, a current polarity detection circuit for detecting the polarities of the currents in the respective phase windings of the synchronous motor, an inverter driving the synchronous motor, a motor speed calculation unit calculating the rotational speed of the synchronous motor depending on the output signals from the position sensors, a speed control unit outputting a first voltage adjusting component (q-axis current command value Iq*) to cause the rotational speed of the synchronous motor to approach a speed command value and a phase control unit outputting a second voltage adjusting component (d-axis current command value Id*) to cause the phase differences between the phases of the position sensor signals and of the currents in the respective phase windings of the synchronous motor to become a predetermined value. | 01-27-2011 |
20110182096 | SEMICONDUCTOR INTEGRATED CIRCUIT, PWM SIGNAL OUTPUT DEVICE, AND POWER CONVERSION CONTROL APPARATUS - Provided is a control technique of a PWM conversion type power converter capable of compensating for a voltage error due to voltage drop mainly at a switching element and managing a switching time of a PWM signal at the same time, and capable of suppressing increase/decrease of software operation load and addition of a hardware circuit to the minimum. A semiconductor integrated circuit having a PWM signal generating unit which generates a PWM signal is provided with a PWM timer unit including a counter counting a pulse width of a pulse signal inputted from the outside with delay from a PWM signal, a register loading a counter value of the counter in synchronization with the PWM signal, and an A/D converting unit converting an analog signal serving as a source signal of the pulse signal inputted from the outside to a digital signal. | 07-28-2011 |
Patent application number | Description | Published |
20110086471 | METHOD OF PRODUCING A SEMICONDUCTOR DEVICE WITH AN ALUMINUM OR ALUMINUM ALLOY ELECTRODE - A method of producing a semiconductor device that has a silicon substrate including a first major surface and a second major surface thereof, a front surface device structure being formed in a region of the first major surface, the method has a step of forming a rear electrode in a region of the second major surface, which includes evaporating or sputtering aluminum-silicon onto the second major surface to form an aluminum silicon film as a first layer of the rear electrode, the aluminum silicon film having a silicon concentration of at least 2 percent by weight when the thickness thereof is less than 0.3 μm. | 04-14-2011 |
20110121360 | METHOD OF PRODUCING A SEMICONDUCTOR DEVICE WITH AN ALUMINUM OR ALUMINUM ALLOY ELECTRODE - A semiconductor device includes a silicon substrate having a first major surface and a second major surface opposite to the first major surface, a drift layer and a collector layer formed in sequence in the silicon substrate from the first major surface, and an aluminum silicon film formed on the second major surface. The drift layer is of a first conductivity type, and is surrounded by a semiconductor layer of a second conductivity type including the collector layer. | 05-26-2011 |
20130092979 | SEMICONDUCTOR DEVICE WITH AN ELECTRODE INCLUDING AN ALUMINUM-SILICON FILM - A semiconductor device, including a silicon substrate having a first major surface and a second major surface, a front surface device structure formed in a region of the first major surface, and a rear electrode formed in a region of the second major surface. The rear electrode includes, as a first layer thereof, an aluminum silicon film that is formed by evaporating or sputtering aluminum-silicon onto the second major surface, the aluminum silicon film having a silicon concentration of at least 2 percent by weight and a thickness of less than 0.3 μm. | 04-18-2013 |
20150380292 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method for manufacturing a semiconductor device includes: bonding at least a part of the rear surface of a semiconductor wafer, and a supporting substrate in use of using a silane coupling agent; forming a functional structure on a front surface of the semiconductor wafer; placing a condensation point of laser light transmitted through the semiconductor wafer on a bonding interface between the semiconductor wafer and the supporting substrate, and irradiating the bonding interface with the laser light, thereby forming a fracture layer on at least a part of an outer circumferential section of the bonding interface; separating the bonding interface; and carrying out rear surface processing on the rear surface of the semiconductor wafer. | 12-31-2015 |
Patent application number | Description | Published |
20110215435 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p | 09-08-2011 |
20130196457 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - In some aspects of the invention, a circuit pattern of a front surface structure is formed in a front surface of a semiconductor wafer and an alignment mark is formed on the front surface of a semiconductor wafer. A transparent supporting substrate is attached to the front surface of the semiconductor wafer by a transparent adhesive. Then, a resist is applied onto a rear surface of the semiconductor wafer. Then, the semiconductor wafer is mounted on a stage of an exposure apparatus, with the supporting substrate down. Then, the alignment mark formed on the front surface of the semiconductor wafer is recognized by a camera, and the positions of the semiconductor wafer and a photomask are aligned with each other. Then, the resist is patterned. Then, a circuit pattern is formed in the rear surface of the semiconductor wafer. | 08-01-2013 |
20140001487 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD AND SEMICONDUCTOR DEVICE | 01-02-2014 |
20140094020 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - Some embodiments of the present invention relate to a semiconductor device and a method of manufacturing a semiconductor device capable of preventing the deterioration of electrical characteristics. A p-type collector region is provided on a surface layer of a backside surface of an n-type drift region. A p | 04-03-2014 |
20140220765 | METHOD FOR SEPARATING SUPPORT SUBSTRATE FROM SOLID-PHASE BONDED WAFER AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method is disclosed for separating a support substrate from a solid-phase bonded wafer which includes a Si wafer and support substrate solid-phase bonded to back surface of the Si wafer. The method includes a step of irradiating the Si wafer with laser light with a wavelength which passes through the Si wafer and is focused on a solid-phase bonding interface between the Si wafer and support substrate to form a breaking layer in at least part of an outer circumferential portion of the solid-phase bonding interface, a step of separating the breaking layer; and a step of separating the solid-phase bonding interface. The method is capable of using a Si thin wafer without substantial wafer cracking at an initial stage where the wafer is inputted to a wafer process, capable of separating a support substrate from the Si thin wafer easily, and capable of reducing the wafer cost. | 08-07-2014 |
20140367738 | SEMICONDUCTOR DEVICE - A p-type thin-layer along a side wall surface of a V-shaped groove reaching the bottom portion of a p-type isolation layer from the back surface of an n | 12-18-2014 |
20150179784 | SEMICONDUCTOR DEVICE HAVING SCHOTTKY JUNCTION BETWEEN SUBSTRATE AND DRAIN ELECTRODE - A semiconductor device includes a semiconductor substrate that is made of a semiconductor material with a wider band gap than silicon, a field effect transistor, including a front surface element structure, provided on a front surface of the substrate, and a drain electrode having surface contact with the substrate so as to form a Schottky junction between the semiconductor substrate and the drain electrode. | 06-25-2015 |
20150214053 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - A first nickel film is deposited inside a contact hole of an interlayer dielectric formed on an n | 07-30-2015 |
20150348818 | SEMICONDUCTOR DEVICE MANUFACTURING METHOD - Provided is a semiconductor device manufacturing method that includes joining a support substrate to a back side of a semiconductor wafer across a ceramic adhesive layer and a mask, to form a joined body. The method further includes forming a functional structure on a front side of the semiconductor wafer. The method further includes detaching the support substrate from the semiconductor wafer by removing the ceramic adhesive layer and the mask. The method further includes a back side processing step of carrying out back side processing on the back side of the semiconductor wafer. | 12-03-2015 |
Patent application number | Description | Published |
20120095738 | CALCULATION METHOD FOR PHYSICAL VALUE, NUMERICAL ANALYSIS METHOD, CALCULATION PROGRAM FOR PHYSICAL VALUE, NUMERICAL ANALYSIS PROGRAM, CALCULATION DEVICE FOR PHYSICAL VALUE, AND NUMERICAL ANALYSIS DEVICE - A calculation method for physical value for calculating physical values in a numerical analysis method for numerically analyzing a physical phenomenon, comprises a physical value calculation step of calculating physical values in an analysis domain divided into a plurality of divided domains, wherein in the physical value calculation step, the physical values are calculated by using: a discretized governing equation that uses values not requiring coordinates (Vertex) of vertices of the divided domains and connectivity information (Connectivity) of the vertices and that is derived on the basis of a weighted residual method; and a calculation data model in which volumes of the divided domains and characteristic values of boundary surface indicating characteristics of boundary surfaces of adjacent ones of the divided domains are provided as the values not requiring coordinates (Vertex) of vertices of the divided domains and connectivity information (Connectivity) of the vertices. | 04-19-2012 |
20130173239 | GENERATING DEVICE FOR CALCULATION DATA, GENERATING METHOD FOR CALCULATION DATA, AND GENERATING PROGRAM FOR CALCULATION DATA - Provided are a section for defining voxel data obtained by dividing an analysis domain including an object into plural rectangular parallelepipeds, giving voxel attributes to respective voxels, and storing the voxel attributes in a voxel data storage section; a section for generating initial point data which are smaller in number than the voxels using center points of the voxels, and storing the generated initial point data in an initial point data storage section; a section for defining divisional regions which are plural ones of the voxels based on the voxel attributes and the initial point data, and storing divisional region data of the defined divisional regions in divisional region data storage section; and a section for generating boundary surface data of each divisional region on the basis of the divisional region data, and storing the generated boundary surface data in calculation data storage section as calculation data. | 07-04-2013 |
20150234784 | SIMULATION DEVICE, SIMULATION METHOD, AND PROGRAM - The present invention provides a simulation device which is able to obtain a preferred simulation result. The simulation device calculating a solution of an equation including an advective term, includes: a velocity field acquisition unit which acquires a velocity field; and a solution calculation unit which applies the velocity field acquired by the velocity field acquisition unit to a discretization equation obtained by adding at least two operations to the equation, and calculates a solution of the discretization equation, wherein the two operations includes deformation of the advective term into a conservation form, and a term of correcting an error in the conservation form of the advective term. | 08-20-2015 |
Patent application number | Description | Published |
20140177940 | RECIPE GENERATION APPARATUS, INSPECTION SUPPORT APPARATUS, INSPECTION SYSTEM, AND RECORDING MEDIA - A desired area is extracted by directly analyzing information recorded in a design layout, an inspection recipe is generated by using this extraction method, and an efficient inspection is realized. The invention makes it easy to extract an area of a desired circuit module such as a memory mat by analyzing hierarchy information of design layout data, calculating reference frequency of each one cell in the design layout data that is its internal data, sorting the cells in order of increasing reference frequency, searching the object, and tracing its upper cell. | 06-26-2014 |
20150371816 | Sample Observation Device - A sample observation device of the invention includes: a charged particle optical column for irradiating a sample with charged particle beams at a first acceleration voltage, the sample having a target part to be observed which is a concave part; an image acquisition part for acquiring an image including the target part to be observed on the basis of signals obtained by irradiation with the charged particle beams; a memory part for memorizing in advance, at each of a plurality of acceleration voltages, information indicating a relationship between a brightness ratio of a concave part to a periphery part of the concave part in a standard sample and a value indicating a structure of the concave part in the standard sample; and an operation part for obtaining a brightness ratio of the concave part to a periphery part of the concave part in the image. The operation part judges appropriateness/inappropriateness of the first acceleration voltage with the use of the information indicating the relationship and the brightness ratio in the image. | 12-24-2015 |
Patent application number | Description | Published |
20110274362 | IMAGE CLASSIFICATION STANDARD UPDATE METHOD, PROGRAM, AND IMAGE CLASSIFICATION DEVICE - The objective is to improve a classification standard. Classification standard data, in which is registered image data information that is the standard when image data is classified, and classification data, in which is registered image data information that is the result when newly input image data is classified using the classification standard data, are stored in a storage unit. An image classification device is characterized in that when any image data information of the image data that is registered in the classification data is selected by means of an input unit, and an instruction to additionally register the selected image data information in the classification standard data is input by means of the input unit, the selected image data information is additionally registered in the classification standard data. | 11-10-2011 |
20110311125 | OBSERVATION CONDITION DETERMINATION SUPPORT DEVICE AND OBSERVATION CONDITION DETERMINATION SUPPORT METHOD - Provided is an observation condition determination support device which can improve the defect classification accuracy. The observation condition determination support device includes: a means ( | 12-22-2011 |
20120131529 | SEMICONDUCTOR DEFECT CLASSIFYING METHOD, SEMICONDUCTOR DEFECT CLASSIFYING APPARATUS, AND SEMICONDUCTOR DEFECT CLASSIFYING PROGRAM - A defect is efficiently and effectively classified by accurately determining the state of overlap between a design layout pattern and the defect. This leads to simple identification of a systematic defect. A defective image obtained through defect inspection or review of a semiconductor device is automatically pattern-matched with design layout data. A defect is superimposed on a design layout pattern for at least one layer of a target layer, a layer immediately above the target layer, and a layer immediately below the target layer. The state of overlap of the defect is determined as within the pattern, over the pattern, or outside the pattern, and the defect is automatically classified. | 05-24-2012 |
20120141011 | DEFECT IMAGE PROCESSING APPARATUS, DEFECT IMAGE PROCESSING METHOD, SEMICONDUCTOR DEFECT CLASSIFYING APPARATUS, AND SEMICONDUCTOR DEFECT CLASSIFYING METHOD - A defect image processing apparatus uses a normalized cross correlation to image-match a layout image ( | 06-07-2012 |
20130283227 | PATTERN REVIEW TOOL, RECIPE MAKING TOOL, AND METHOD OF MAKING RECIPE - A recipe necessary for a review tool or the like to image an image is efficiently made in order to identify a cause of a failed position on the basis of a result of a failure analysis system. | 10-24-2013 |