Patent application number | Description | Published |
20080283883 | Image Sensor and Method for Manufacturing the Same - An image sensor and a method for manufacturing the same are provided. The image sensor can include transistor circuitry on a substrate, and a photodiode arranged above the transistor circuitry. The photodiode can include carbon nanotubes and a conductive polymer layer on the carbon nanotubes. A transparent conducting electrode can be provided on the carbon nanotubes. | 11-20-2008 |
20080290437 | IMAGE SENSOR AND METHOD FOR MANUFACTURING THE SAME - An image sensor that includes a contact plug formed in the substrate; a lower electrode formed on the contact plug; a photo diode formed on the lower electrode, the photo diode having a carbon nanotube provided therein; and an upper electrode formed on the photo diode. The photo diode can function as a color photo diode | 11-27-2008 |
20090059391 | MICROLENS, AND METHOD OF FABRICATING THEREOF - A microlens for an image sensor fabricated using a seed layer and a method for fabrication of the same that does not involve a reflow process. The method of fabricating a microlens includes forming a seed layer pattern on a wafer, rounding the corner portions of the seed layer pattern by applying plasma, and then depositing an oxide film on the seed layer pattern. | 03-05-2009 |
20090115065 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - Embodiments relate to a semiconductor device that may include a semiconductor substrate including a cell area and a pad area, a first insulating layer on and/or over the semiconductor substrate, and a first interconnection trench formed in the first insulating layer on and/or over a cell area having a first width. It may also include a first pad trench formed in the first insulating layer on and/or over the pad area and having a second width wider than the first width, and a first metal interconnection formed in the first interconnection trench and a first pad formed in the first pad trench. It may further include a second insulating layer on and/or over the first insulating layer, a second interconnection trench, exposing the first metal interconnection, and a second pad exposing the first pad and having a position and width substantially identical to that of the first pad trench. | 05-07-2009 |
20090130819 | METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes a device isolation layer. In the method, a hard mask may be formed on a semiconductor substrate, and the semiconductor substrate may be etched using the hard mask as a mask to form a trench. The hard mask may be removed, and a device isolation layer may be formed in the trench. A shallow trench isolation pattern having an excellent layer quality may be formed by reducing an aspect ratio of the trench in the semiconductor device and gap-filling a dielectric. Thus, the number of defects may be decreased. | 05-21-2009 |
20100140678 | FLASH MEMORY DEVICE AND MANUFACRUTING METHOD THE SAME - A flash memory device and a method of manufacturing a flash memory device. A flash memory device may include a device isolation layer and/or an active area formed on and/or over a semiconductor substrate. A flash memory device may include a memory gate formed on and/or over an active area and/or a control gate formed on and/or over a semiconductor substrate including a memory gate. Active areas may be formed having substantially the same interval with bit lines. A common source line area where a common source line contact may be formed may include a bridge formed between active areas. Neighboring active areas may be connected. | 06-10-2010 |
20100159660 | METHOD OF MANUFACTURING FLASH MEMORY DEVICE - A method of manufacturing a flash memory device includes preparing a semiconductor substrate comprising a cell area and a peripheral area, forming a first well and an oxide-nitride-oxide (ONO) layer in the cell area, forming a second well in the peripheral area of the semiconductor substrate comprising the first well and forming a first oxide layer in the peripheral area, forming a first polysilicon layer over the ONO layer and the first oxide layer and performing a first etch process to form a memory gate comprising an ONO layer pattern and a first polysilicon pattern in the cell area, forming a second oxide layer pattern and a second polysilicon pattern over either sidewall of the memory gate and forming a gate in the peripheral area, performing a third etch process so that the second oxide layer pattern and the second polysilicon pattern remain over only the one sidewall of the memory gate to form a select gate, and forming a first impurity area in the semiconductor substrate between the memory gates adjacent to each other. | 06-24-2010 |
20100163969 | FLASH MEMORY DEVICE AND MANUFACTURING METHOD THE SAME - A flash memory device and a method of manufacturing a flash memory device. A flash memory device may include an isolation layer and/or an active area over a semiconductor substrate, a memory gate formed over an active area, a control gate formed over a semiconductor substrate including a memory gate, and/or a common source line contact formed over a semiconductor substrate including a control gate. A flash memory device may include a source plate having substantially the same interval as an interval of an active area of a bit line. A source plate may include an active area in which a common source line contact may be formed. A common source line contact may include a long butting contact extending in a direction traversing an active area. | 07-01-2010 |