Patent application number | Description | Published |
20080300583 | Vascular laser treatment device and method - An improved device and method for safer and more efficient laser vein treatments are presented. The device includes an optical waveguide optically coupled to a radiation source at its proximal end, having a core, a cladding layer and a tip configured to protect the clad-core, e.g., from contact with collapsing vein walls during laser vein treatment, and to enhance treatment efficiency through improved centering. According to one embodiment, the clad-core is recessed within one or more jacket layers. In some embodiments, the protective jacket on the clad-core may be left on when the jacket layer is added. In embodiments, one or more protective wires are attached to the clad-core or a jacket layer and extend distally past the clad-core. In some such embodiments, three protective wires are substantially equally spaced relative to each other about the circumference of the core, i.e., forming an equilateral triangular pattern. The optical waveguide is useable in conjunction with an introducer structure having protective means to prevent damage to the vein walls, e.g., perforating the vein walls, during insertion of the optical waveguide into the vein. A method of using the device is also disclosed wherein a distal end of the optical waveguide is advanced to a desired position and essentially centered in the vein, and a predetermined wavelength of radiation is output from the distal end of the optical fiber while the optical waveguide is simultaneously withdrawn from the vein. | 12-04-2008 |
20090030271 | ADAPTER FOR ENDOSCOPES AND RELATED METHOD - An adapter for endoscopic treatments has a fiber constraint device that is set at a desired maximum fiber retraction distance, and provides a physical barrier to prevent excessive fiber retraction into the endoscope. The restricted retraction prevents the fiber from firing within the endoscope, thus avoiding expensive damage to both the endoscope and fiber. This benefits the patient with potentially shorter treatment time and less exposure to anesthesia. The adapter also limits maximum extension of fibers. Limiting maximum extension protects the fiber tip and avoids patient complications. The adapter is securely attached to the optical fiber with a connecting means. When using directionally radiating fiber tips, fiber orientation can be defined and the fiber can be rotated relative to the initial angular position of the fiber tip. | 01-29-2009 |
Patent application number | Description | Published |
20100038718 | ELECTRO-STATIC DISCHARGE AND LATCHUP RESISTANT SEMICONDUCTOR DEVICE - The present invention relates to a semiconductor device including a substrate layer, a metal-oxide-semiconductor field-effect transistor (MOSFET), a backgate region, an isolation layer and a diode. The MOSFET includes a gate region, a source region and a drain region. The source and drain regions are embedded in the backgate region, which includes a voltage input terminal. The isolation layer is located between the backgate region and the substrate layer and has a doping type opposite that of the backgate region. The diode includes a first terminal connected to the isolation layer and a second terminal coupled to an isolation voltage source. | 02-18-2010 |
20100148266 | SYSTEM AND METHOD FOR ISOLATED NMOS-BASED ESD CLAMP CELL - The invention is directed to a protection circuit for protecting IC chips against ESD. An ESD protection circuit for an integrated circuit chip may comprise an isolated NMOS transistor, which may comprise an isolation region isolating a backgate from a substrate, and a first and second doped regions and a gate formed on the backgate. The ESD protection circuit may further comprise a first terminal to connect the isolation region to a first electrical node, and a second terminal to connect the second doped region to a second electrical node. The first electrical node may have a higher voltage level than the second electrical node, and the gate and backgate may be coupled to the second terminal. | 06-17-2010 |
20120280739 | SYSTEM AND METHOD FOR LEVEL-SHIFTING VOLTAGE SIGNALS USING A DYNAMIC LEVEL-SHIFTING ARCHITECTURE - A system and method to level-shift multiple signals from a first voltage domain to a second voltage domain with minimized silicon area. A level-shifting system may be organized by implementing a static level-shifter coupled to a plurality of dynamic level-shifters. The static level-shifter may provide a voltage control signal for each of the dynamic level-shifters. Each of the dynamic level-shifters may level-shift an individual input signal from a first voltage domain to a second voltage domain. | 11-08-2012 |
Patent application number | Description | Published |
20090027104 | Methods and apparatus for predictable level shifter power-up state - In one aspect, a level shifter for shifting a voltage level from a first voltage level to a second voltage level and having a predictable power-up state is provided. The level shifter comprises a first input and a second input forming a differential input to receive signals at the first voltage level, a first output and a second output forming a differential output to provide output signals at the second voltage level, and at least one circuit element coupled between the differential input and the differential output to pull the first output to a lower voltage level than the second output during power-up so that the level shifter powers-up in a desired state | 01-29-2009 |
20090073299 | METHODS AND APPARATUS FOR VARIABLE MODE DRIVERS - In one aspect, a method of transferring charge from a photosensitive array using a plurality of vertical shift registers each having a plurality of vertical elements including a first vertical element and a last vertical element, each of the plurality of vertical elements capable of storing charge, the plurality of vertical shifter registers, when operated, are capable of transferring charge from each of the plurality of vertical elements to a respective adjacent one of the plurality of vertical elements in a first direction from the first vertical element to the last vertical element, and using at least one horizontal shift register having a plurality of horizontal elements, each of the plurality of horizontal elements of the at least one horizontal shift register arranged to receive charge transferred from the last vertical element of a respective one of the plurality of vertical shift registers, the at least one horizontal shift register, when operated, capable of transferring charge from each of the plurality of horizontal elements to a respective adjacent one of the plurality of horizontal elements is provided. The method comprises operating the at least one horizontal shift register during a plurality of horizontal operating intervals and operating the plurality of vertical shift registers during at least a portion of the plurality of horizontal operating intervals. | 03-19-2009 |
Patent application number | Description | Published |
20090285390 | INTEGRATED CIRCUIT WITH SECURED SOFTWARE IMAGE AND METHOD THEREFOR - The various embodiments herein disclosed include a method wherein an integrated circuit ( | 11-19-2009 |
20090287895 | Secure Memory Access System - A secure memory access system includes a memory control module, at least one direct memory access module, and a plurality of input/output interface modules. The direct memory access module is operative to transfer information between all of the input/output interface modules and the memory control module in response to transfer configuration information. | 11-19-2009 |
20090288160 | INTEGRATED CIRCUIT WITH SECURE BOOT FROM A DEBUG ACCESS PORT AND METHOD THEREFOR - An integrated circuit ( | 11-19-2009 |
20090289615 | APPARATUS AND METHOD FOR REDUCING POWER CONSUMPTION BY AN INTEGRATED CIRCUIT - An integrated circuit includes an energy controller that generates a power supply voltage level for the integrated circuit based on a desired target frequency value for the integrated circuit. The energy controller configures a programmable hardware process sensor based on the power supply voltage level such that the programmable hardware process sensor is capable of mimicking the electrical characteristics of a predetermined critical path associated with the integrated circuit when operating at the power supply voltage level. By monitoring the frequency of the programmable hardware process sensor over a period of time, the energy controller can compare the monitored frequency to an expected value and determine whether the power supply voltage level can be adjusted or whether it should be maintained. | 11-26-2009 |
20090307411 | METHOD AND APPARATUS FOR SECURING DIGITAL INFORMATION ON AN INTEGRATED CIRCUIT DURING TEST OPERATING MODES - The embodiments protect an IC against Design-For-Test (DFT) or other test mode attack. Transitory secrets are secured whether stored in registers or latches, RAM, and/or permanent secrets stored in ROM and/or PROM. One embodiment for securing information on an IC includes entering a test mode and resetting each register in response to entering the test mode of operation and prior to receiving a test mode command. An integrated circuit embodiment includes a test control logic operative to configure the integrated circuit into a test mode and to control the integrated circuit while in the test mode, a set of registers, and a functional reset controller coupled to the test control logic and to the set of registers, operative to receive a reset command from the test control logic and provide the reset command to the set of registers in response to a command to enter the test mode. | 12-10-2009 |
20090307502 | METHOD AND APPARATUS FOR SECURING DIGITAL INFORMATION ON AN INTEGRATED CIRCUIT READ ONLY MEMORY DURING TEST OPERATING MODES - The embodiments protect an IC against Design-For-Test (DFT) or other test mode attack. Secrets in ROM or PROM are secured. One embodiment for securing information on an IC includes receiving a ROM read command, writing data from a plurality of ROM address locations to an encryption logic in response to receiving the ROM read command, and writing an encryption logic output of the encryption logic to a test control logic, the encryption logic output representing the data from the plurality of ROM address locations. Writing the data from the plurality of ROM address locations to the encryption logic may also include writing the data from the plurality of ROM address locations to a multiple input shift register (MISR) in response to the ROM read command, and writing an MISR output to the test control logic, the MISR output representing the data from the plurality of ROM address locations. | 12-10-2009 |
20100017893 | System for Securing Register Space and Method of Securing the Same - A system includes a processing device, at least one data processing module, and a security control module. The security control module is operatively connected to both the processing device and the data processing module. The security control module is operative to control access to a protected register that is associated with the at least one data processing module. As such, the security control module operates as a firewall or filter to allow or deny access to a protected register. Security-unaware data processing module are therefore secured in the system at a central location while eliminating the need to use only security-aware data processing module. A method for securing data processing modules, including security-unaware data processing module, is also disclosed. | 01-21-2010 |
Patent application number | Description | Published |
20080282006 | Latency Hiding for a Memory Management Unit Page Table Lookup - In certain systems, local request's require corresponding associated information to be present in order to be serviced. A local memory stores some of the associated information. There is latency associated with retrieval of associated information that is not immediately available. Logic operates for each local request to access the local memory to ascertain whether the associated information corresponding to the local request, is present If the associated information is present, a request is placed in an output request queue to service the local request If the associated information is not present, a request is placed on a bypass path to retrieve the associated information. Requests issue from the bypass path with priority over requests from the output request queue. Useful work is thereby done during the latency of associated information retrieval. The arrangement is useful in a TLB in an MMU. | 11-13-2008 |
20090170550 | Method and Apparatus for Portable Phone Based Noise Cancellation - A system includes a mobile phone configured to create an inverted signal having characteristics inverse to identified noise components of a detected audio signal. The mobile phone is configured to provide the inverted signal as an output to a headphone, such that a combination of the identified noise components and the inverted signal substantially cancel each other out. | 07-02-2009 |
20110078478 | METHOD AND APPARATUS FOR TRANSITIONING DEVICES BETWEEN POWER STATES BASED ON ACTIVITY REQUEST FREQUENCY - A method for transitioning power states in a device includes designating a first reduced power state as a target power state. A first expected residency for the target power state is determined based on a counting of activity requests associated with the device. The device is transitioned to the target power state responsive to the expected residency satisfying a first predetermined threshold. | 03-31-2011 |
20130275778 | PROCESSOR BRIDGE POWER MANAGEMENT - A power controller can set the power state of a processor bridge based on which processor modules are in a communicative state. In addition, for a power state where selected processor modules are expected to be non-communicative, the power controller can set the supplied voltage to have a reduced voltage guard band as compared to other power states. These power management techniques can reduce the power consumed by the processor. | 10-17-2013 |
Patent application number | Description | Published |
20080269272 | CYCLOPAMINE ANALOGUES AND METHODS OF USE THEREOF - The present invention provides compositions and methods for modulating smoothened-dependent pathway activation. The present invention provides analogs of cyclopamine that can be used to counteract the phenotypic effects of unwanted activation of a hedgehog pathway, such as resulting from hedgehog gain-of-function, Ptc loss-of-function or smoothened gain-of-function mutations. The compounds of the present invention are particularly useful in treating cancers. | 10-30-2008 |
20100009970 | COMPOSITIONS AND METHODS FOR TREATMENT OF VIRAL DISEASES - The present invention features compositions, methods, and kits useful in the treatment of viral diseases. In certain embodiments, the viral disease is caused by a single stranded RNA virus, a flaviviridae virus, or a hepatic virus. In particular embodiments, the viral disease is viral hepatitis (e.g., hepatitis A, hepatitis B, hepatitis C, hepatitis D, hepatitis E) and the agent or combination of agents includes sertraline, a sertraline analog, UK-416244, or a UK-416244 analog. Also featured are screening methods for identification of novel compounds that may be used to treat a viral disease. | 01-14-2010 |
20110166353 | Cyclopamine Analogues and Methods of Use Thereof - The present invention provides compositions and methods for modulating smoothened-dependent pathway activation. The present invention provides analogs of cyclopamine that can be used to counteract the phenotypic effects of unwanted activation of a hedgehog pathway, such as resulting from hedgehog gain-of-function, Ptc loss-of-function or smoothened gain-of-function mutations. The compounds of the present invention are particularly useful in treating cancers. | 07-07-2011 |
20110223621 | COMBINATIONS FOR THE TREATMENT OF IMMUNOINFLAMMATORY DISORDERS - The invention features pharmaceutical compositions that include dipyridamole and a corticosteroid. | 09-15-2011 |
20120058979 | METHODS AND REAGENTS FOR THE TREATMENT OF IMMUNOINFLAMMATORY DISORDERS - The invention features a method for treating a patient diagnosed with, or at risk of developing, an immunoinflammatory disorder by administering to the patient a tetra-substituted pyrimidopyrimidine, either alone or in combination with one or more additional agents. The invention also features a composition containing a tetra-substituted pyrimidopyrimidine in combination with one or more additional agents. | 03-08-2012 |
Patent application number | Description | Published |
20110053938 | Compounds and Compositions For Treating Cancer - The invention relates to compounds and composition for the treatment and prevention of cancer. The invention also covers all diseases that may be treated by selective modulation of levels of reactive oxygen species in diseased cells versus normal cells. Methods for the preparation and administration of such compositions are also disclosed. | 03-03-2011 |
20120059004 | Compounds And Compositions For Treating Cancer - The invention relates to compounds and composition for the treatment and prevention of cancer. The invention also covers all diseases that may be treated by selective modulation of levels of reactive oxygen species in diseased cells versus normal cells. Methods for the preparation and administration of such compositions are also disclosed. | 03-08-2012 |
20120157455 | Compounds And Compositions For Treating Cancer - The invention relates to compounds and composition for the treatment and prevention of cancer. The invention also covers all diseases that may be treated by selective modulation of levels of reactive oxygen species in diseased cells versus normal cells. Methods for the preparation and administration of such compositions are also disclosed. | 06-21-2012 |
20130203757 | Compounds And Compositions For Treating Cancer - The invention relates to compounds and composition for the treatment and prevention of cancer. The invention also covers all diseases that may be treated by selective modulation of levels of reactive oxygen species in diseased cells versus normal cells. Methods for the preparation and administration of such compositions are also disclosed. | 08-08-2013 |
20130237539 | Compounds and Compositions for Treating Cancer - The invention relates to compounds and composition for the treatment and prevention of cancer. The invention also covers all diseases that may be treated by selective modulation of levels of reactive oxygen species in diseased cells versus normal cells. Methods for the preparation and administration of such compositions are also disclosed. | 09-12-2013 |
Patent application number | Description | Published |
20140165133 | Method for Directing Audited Data Traffic to Specific Repositories - Data traffic is monitored on a network and data access elements thereof are collected. The collected data access elements are compared to security rules providing sets of predefined data access elements for identifying predefined data accesses. First audit data collections for data accesses are sent to a first repository. For a data access that matches one of the rules, a second audit data collection defined by the matching rule is sent to at least a second repository designated by the matching rule. | 06-12-2014 |
20140165189 | Directing Audited Data Traffic to Specific Repositories - Data traffic is monitored on a network and data access elements thereof are collected. The collected data access elements are compared to security rules providing sets of predefined data access elements for identifying predefined data accesses. First audit data collections for data accesses are sent to a first repository. For a data access that matches one of the rules, a second audit data collection defined by the matching rule is sent to at least a second repository designated by the matching rule. | 06-12-2014 |
20150278511 | MONITORING AN APPLICATION IN A PROCESS VIRTUAL MACHINE - An application that runs in a process virtual machine is monitored by injecting listening code into a target class of the application. The listening code collects and forwards data to a monitoring agent. The target class is configured for monitoring according to alternative embodiments. In response to the process virtual machine providing notification of an event, such a loading the target class, the listening code may be injected into the target class. In another embodiment, the process virtual machine is configured to load a first minor class containing a minor entry point to the application. A mirror target class is loaded in response to a request to load the target class. The minor target class contains a minor entry point to the target class and the listening code. In another embodiment, listening code may be added to the target class before running the application. | 10-01-2015 |
20150278515 | MONITORING AN APPLICATION IN A PROCESS VIRTUAL MACHINE - An application that runs in a process virtual machine is monitored by injecting listening code into a target class of the application. The listening code collects and forwards data to a monitoring agent. The target class is configured for monitoring according to alternative embodiments. In response to the process virtual machine providing notification of an event, such a loading the target class, the listening code may be injected into the target class. In another embodiment, the process virtual machine is configured to load a first mirror class containing a mirror entry point to the application. A mirror target class is loaded in response to a request to load the target class. The mirror target class contains a mirror entry point to the target class and the listening code. In another embodiment, listening code may be added to the target class before running the application. | 10-01-2015 |