Patent application number | Description | Published |
20080268581 | Method of manufacturing thin film transistor substrate - A method of manufacturing a TFT substrate includes: sequentially forming a transparent conductive layer and an opaque conductive layer on a substrate, patterning the transparent conductive layer and the opaque conductive layer by using a first mask to form a gate pattern including a pixel electrode, and forming a gate insulating layer and a semiconductor layer above the substrate. A contact hole is formed which exposes a portion of the pixel electrode and a semiconductor pattern using a second mask. A conductive layer is formed above the substrate and patterned to form a source/drain pattern including a drain electrode which overlaps a portion of the pixel electrode. Portions of the gate insulating layer and the opaque conductive layer above the pixel electrode are removed except a portion overlapping the drain electrode, by using a third mask. | 10-30-2008 |
20080280379 | METHOD OF MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE AND MANUFACTURING SYSTEM USING THE SAME - Provided is a method of manufacturing a thin film transistor substrate and a manufacturing system using the same, wherein the production of corrosive substances is reduced during the process of manufacturing the thin film transistor substrate. The method includes providing an etching unit with an insulation substrate on which a thin metal film has been deposited, and dry-etching the insulation substrate so as to form a predetermined circuit pattern; providing a waiting unit with the insulation substrate waiting to be cleaned; performing a preliminary cleaning operation by a cleaning unit having a plurality of nozzles while the insulation substrate waits and checking the preliminary cleaning operation; and performing a main cleaning operation with regard to the insulation substrate based on the result of the check. | 11-13-2008 |
20090039350 | Display panel and method of manufacturing the same - In a display panel and a method of manufacturing the display panel, a gate line, a data line, and source and drain electrodes including a same material as the data line are formed on a substrate constituting the display panel, and the data line includes an aluminum based alloy containing sufficient nickel to inhibit corrosion during dry etching. The corrosion resistance of the AlNi-containing alloy helps prevent corrosion of the data line, the source electrode, and the drain electrode during selective dry etching that shapes these lines and electrodes. | 02-12-2009 |
20090108265 | THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, AND DISPLAY APPARATUS HAVING THE SAME - A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer. | 04-30-2009 |
20090115066 | Metal wiring layer and method of fabricating the same - A metal wiring layer and a method of fabricating the metal wiring layer are provided. The method includes forming a dielectric layer on a substrate, forming a plurality of dielectric layer patterns and holes therein on the substrate by etching part of the dielectric layer, with a cross sectional area of the holes in the dielectric layer patterns decreasing with increasing distance away from the substrate and the holes exposing the substrate, forming a trench by etching a portion of the substrate exposed through the holes in the dielectric layer patterns, and forming a metal layer which fills the trench and the holes in the dielectric layer patterns. Thus, it is possible to prevent the occurrence of an edge build-up phenomenon by forming a metal layer in a plurality of holes in the dielectric layer patterns having a cross sectional area decreasing with increasing distance away from the substrate. Therefore, it is possible to prevent the transmittance of a liquid crystal layer from decreasing due to a failure to properly fill liquid crystal molecules in the liquid crystal layer, and thus to increase the quality of display. | 05-07-2009 |
20090152635 | THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING A DISPLAY PANEL - Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved. | 06-18-2009 |
20090173446 | SUBSTRATE SUPPORT, SUBSTRATE PROCESSING APPARATUS INCLUDING SUBSTRATE SUPPORT, AND METHOD OF ALIGNING SUBSTRATE - The present invention relates to a substrate support that facilitates aligning a substrate and prevents the substrate from being damaged by arc discharge in processing a substrate using plasma, a substrate processing apparatus including the substrate support, and a method of aligning the substrate. A substrate support, which includes a main body on which a substrate is placed and a subsidiary body disposed around the side of the main body and having a slope declining from a position above the main body to the upper side of the main body, is provided, such that it is easy to align the substrate and it is possible to damage due to arc discharge in processing the substrate using plasma. | 07-09-2009 |
20090174834 | LIQUID CRYSTAL DISPLAY AND METHOD OF FABRICATING THE SAME - One or more embodiments provide a liquid crystal display (LCD) including a thin-film transistor (TFT) with improved performance and a method of fabricating the LCD. In one embodiment, the LCD includes a gate electrode which is formed on an insulating substrate; an active layer which is formed on the gate electrode; an organic layer which is formed on the active layer and includes a first hole that exposes a source region and a second hole that exposes a drain region; a source electrode which fills the first hole; and a drain electrode which fills the second hole. | 07-09-2009 |
20090184324 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - The present invention relates to a thin film transistor array panel and a manufacturing method thereof. The thin film transistor array panel according to the present invention includes a substrate, a light blocking member formed on the substrate, a gate line disposed on the light blocking member. The gate line and the light blocking member define a closed region A color filter is formed in the closed region and contacts the side surface of the gate line. A gate insulating layer is formed on the gate line and the color filter, a data line and a drain electrode are formed on the gate insulating layer, and a pixel electrode is connected to the drain electrode. | 07-23-2009 |
20090191655 | METHOD OF ETCHING AMORPHOUS SILICON LAYER AND METHOD OF MANUFACTURING LIQUID CRYSTAL DISPLAY USING THE SAME - A method of etching an amorphous silicon layer includes providing a substrate with an amorphous silicon layer formed thereon into an atmospheric pressure plasma etching device, providing a plasma generation gas and etching gas to a plasma generator of the atmospheric pressure plasma etching device and generating an atmospheric pressure plasma gas between two electrodes provided in the plasma generator in which the two electrodes face each other. The method further includes repeatedly passing the substrate through the plasma generator at a predetermined speed, thereby etching the amorphous silicon layer on the substrate by using the atmospheric pressure plasma gas generated from the plasma generator. | 07-30-2009 |
20090206343 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME - In a display apparatus and a method of manufacturing the display apparatus, a first insulating layer having a trench and a second insulating layer having a via hole corresponding to the trench are formed on an array substrate. After forming a seed layer in the trench, a conductive layer is formed on the seed layer through a plating process, thereby forming the gate line, the gate electrode and the storage line accommodated in the trench and the via hole. | 08-20-2009 |
20090278126 | METAL LINE SUBSTRATE, THIN FILM TRANSISTOR SUBSTRATE AND METHOD OF FORMING THE SAME - A metal line substrate and a method of fabricating thereof, the metal line substrate including an insulating layer and a capping layer disposed on an insulating substrate, a trench defined by the insulating layer and the capping layer disposed on the insulating substrate, a seed layer pattern disposed on the insulating substrate, and a low-resistive conductive layer pattern disposed in the trench and contacting the seed layer pattern. The capping layer pattern includes a protrusion region which is in contact with the low-resistive conductive layer pattern. | 11-12-2009 |
20100032760 | THIN-FILM TRANSISTOR SUBSTRATE AND METHOD OF FABRICATING THE SAME - The present invention provides a thin-film transistor (TFT) substrate, which can be fabricated simply and at reduced cost, and a method of fabricating the TFT substrate. The TFT substrate includes: an insulating substrate; gate wiring that extends on the insulating substrate in a first direction; data wiring that extends on the gate wiring in a second direction, and includes a lower layer and an upper layer; and a semiconductor pattern that is disposed under the data wiring and has substantially the same shape as the data wiring except for a channel region, wherein root-mean-square roughness of a top surface of the data wiring is 3 nm or less. | 02-11-2010 |
20100044717 | THIN FILM TRANSISTOR PANEL AND METHOD OF MANUFACTURING THE SAME - After forming a signal line including aluminum, an upper layer of an oxide layer including aluminum that covers the signal line is formed in the same chamber and by using the same sputtering target as the signal line, or a buffer layer of an oxide layer including aluminum is formed in a contact hole exposing the signal line during the formation of the contact hole. Accordingly, the contact characteristic between an upper layer including indium tin oxide (“ITO”) or indium zinc oxide (“IZO”) and the signal line may be improved to enhance the adhesion therebetween while not increasing the production cost of the thin film transistor (“TFT”) array panel. | 02-25-2010 |
20100136775 | METHOD OF MANUFACTURING THIN-FILM TRANSISTOR SUBSTRATE - Provided is a method for manufacturing a thin-film transistor substrate, in which the etching characteristics of an insulating film and a passivation layer are enhanced. The insulating film and the passivation layer are deposited by low temperature chemical vapor deposition. The method includes disposing a gate wiring on an insulating substrate; disposing a gate insulating film on the gate wiring; disposing a data wiring on the gate insulating film; disposing a passivation layer on the data wiring; and forming a contact hole by etching at least one of the gate insulating film and the passivation layer, wherein at least one of the gate insulating film and the passivation layer is disposed at a temperature of about 280° C. or below, and the forming of the contact hole is performed at a pressure of about 60 mT or below. | 06-03-2010 |
20100148182 | THIN FLIM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF - A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer. | 06-17-2010 |
20100148769 | NON-CONTACT PLASMA-MONITORING APPARATUS AND METHOD AND PLASMA PROCESSING APPARATUS - A non-contact plasma-monitoring apparatus and a non-contact plasma-monitoring method are provided. The non-contact plasma-monitoring apparatus is installed in a plasma processing apparatus including a processing chamber and a power supply unit and measures at least one of an electric field and a magnetic field, which are created around power supply wiring connecting the process chamber to the power supply unit, without physically contacting the power supply wiring. | 06-17-2010 |
20100163862 | THIN FILM TRANSISTOR ARRAY SUBSTRATE AND METHOD OF FABRICATING THE SAME - A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented. | 07-01-2010 |
20100230679 | CONTACT PORTION OF WIRE AND MANUFACTURING METHOD THEREOF - A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut. | 09-16-2010 |
20100308334 | ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE ARRAY SUBSTRATE - An array substrate including: a gate electrode and a gate insulation layer disposed on a base substrate, the gate insulation layer having a first thickness in a first region and a second thickness in a second region, the first thickness being greater than the second thickness; a semiconductor pattern disposed on the gate insulation layer in the first region, an end portion of the semiconductor pattern having a stepped portion with respect to the gate insulation layer; an ohmic contact pattern disposed on the semiconductor pattern, an end portion of the ohmic contact pattern opposite to a channel portion being aligned with the end portion of the semiconductor pattern; and source and drain electrodes disposed on the ohmic contact pattern, the source and drain electrodes spaced apart from each other and including first and second thin-film transistor patterns. | 12-09-2010 |
20110024752 | THIN FILM TRANSISTOR, METHOD OF FABRICATING THE SAME, AND DISPLAY APPARATUS HAVING THE SAME - A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer. | 02-03-2011 |
20110062445 | DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME - A method of forming a display substrate includes forming an array layer on a substrate, forming a passivation layer on the array layer, forming a photoresist pattern on the passivation layer corresponding to a gate line, a source line and a thin-film transistor of the array layer, etching the passivation layer using the photoresist pattern as a mask, Non-uniformly surface treating a surface of the photoresist pattern, forming a transparent electrode layer on the substrate having the surface-treated photoresist pattern formed thereon and forming a pixel electrode. The forming a pixel electrode includes removing the photoresist pattern and the transparent electrode layer, such as by infiltrating a strip solution into the surface-treated photoresist pattern. | 03-17-2011 |
20110089421 | THIN FILM TRANSISTOR ARRAY PANEL AND METHOD FOR MANUFACTURING THE SAME - A thin film transistor array panel includes: a substrate; a signal line disposed on the substrate and including copper (Cu); a passivation layer disposed on the signal line and having a contact hole exposing a portion of the signal line; and a conductive layer disposed on the passivation layer and connected to the portion of the signal line through the contact hole, wherein the passivation layer includes an organic passivation layer including an organic insulator that does not include sulfur, and a method of manufacturing the thin film transistor prevents formation of foreign particles on the signal line. | 04-21-2011 |
20110097961 | DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME - In a display panel and a method of manufacturing the display panel, a gate line, a data line, and source and drain electrodes including a same material as the data line are formed on a substrate constituting the display panel, and the data line includes an aluminum based alloy containing sufficient nickel to inhibit corrosion during dry etching. The corrosion resistance of the AlNi-containing alloy helps prevent corrosion of the data line, the source electrode, and the drain electrode during selective dry etching that shapes these lines and electrodes. | 04-28-2011 |
20110133193 | THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF - A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. | 06-09-2011 |
20110159622 | THIN FILM TRANSISTOR AND METHOD FOR MANUFACTURING A DISPLAY PANEL - Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved. | 06-30-2011 |
20110297931 | METHOD OF FABRICATING A THIN FILM TRANSISTOR ARRAY SUBSTRATE - A method of fabricating a thin film transistor array substrate is presented. The method entails forming a gate interconnection line on an insulating substrate, forming a gate insulating layer on the gate interconnection line, forming a semiconductor layer and a data interconnection line on the semiconductor layer, sequentially forming multiple passivation layers, etching the passivation layers down to a drain electrode that is an extension of the data interconnection line. The portion of the drain electrode that is exposed at this stage is a part of the drain electrode-pixel electrode contact portion. A pixel electrode is formed connected to the drain electrode. Two of the passivation layers have the same composition but are processed at different temperatures. A thin film transistor prepared in the above manner is also presented. | 12-08-2011 |
20120003768 | THIN FLIM TRANSISTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF - A thin film transistor (TFT) substrate is provided in which a sufficiently large contact area between conductive materials is provided in a contact portion and a method of fabricating the TFT substrate. The TFT substrate includes a gate interconnection line formed on an insulating substrate, a gate insulating layer covering the gate interconnection line, a semiconductor layer arranged on the gate insulating layer, a data interconnection line including a data line, a source electrode and a drain electrode formed on the semiconductor layer, a first passivation layer formed on the data interconnection line and exposing the drain electrode, a second passivation layer formed on the first passivation film and a pixel electrode electrically connected to the drain electrode. An outer sidewall of the second passivation layer is positioned inside an outer sidewall of the first passivation layer. | 01-05-2012 |
20120028421 | METHOD FOR MANUFACTURING THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a thin film transistor array panel includes forming a gate line; forming an insulating layer on the gate line; forming first and second silicon layers first and second metal layers; forming a photoresist pattern having first and second portions; forming first and second metal patterns by etching the first and second metal layers; processing the first metal pattern with SF | 02-02-2012 |
20120064678 | MANUFACTURING METHOD OF THIN FILM TRANSISTOR ARRAY PANEL - A method for manufacturing a TFT array panel includes forming a photosensitive film pattern with first and second parts in first and second sections on a metal layer, etching the metal layer of a third section using the film pattern as a mask to form first and second metal patterns, etching the film pattern to remove the first part, etching first and second amorphous silicon layers of the third section using the second part as a mask to form an amorphous silicon pattern and a semiconductor, etching the first and second metal patterns of the first section using the second part as a mask to form a source electrode and a drain electrode including an upper layer and a lower layer, and etching the amorphous silicon pattern of the region corresponding to the first section by using the second part as a mask to form an ohmic contact. | 03-15-2012 |
20130015452 | ARRAY SUBSTRATE AND METHOD FOR MANUFACTURING THE ARRAY SUBSTRATE - An array substrate including: a gate electrode and a gate insulation layer disposed on a base substrate, the gate insulation layer having a first thickness in a first region and a second thickness in a second region, the first thickness being greater than the second thickness; a semiconductor pattern disposed on the gate insulation layer in the first region, an end portion of the semiconductor pattern having a stepped portion with respect to the gate insulation layer; an ohmic contact pattern disposed on the semiconductor pattern, an end portion of the ohmic contact pattern opposite to a channel portion being aligned with the end portion of the semiconductor pattern; and source and drain electrodes disposed on the ohmic contact pattern, the source and drain electrodes spaced apart from each other and including first and second thin-film transistor patterns. | 01-17-2013 |
20140117361 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel includes a substrate, gate lines, each including a gate pad, a gate insulating layer, data lines, each including a data pad connected to a source and drain electrode, a first passivation layer disposed on the data lines and the drain electrode, a first electric field generating electrode, a second passivation layer disposed on the first electric field generating electrode, and a second electric field generating electrode. The gate insulating layer and the first and second passivation layers include a first contact hole exposing a part of the gate pad, the first and second passivation layers include a second contact hole exposing a part of the data pad, and at least one of the first and second contact holes have a positive taper structure having a wider area at an upper side than at a lower side. | 05-01-2014 |
20140147947 | Thin Film Transistor and Method for Manufacturing a Display Panel - Embodiments of the present invention relate to a thin film transistor and a manufacturing method of a display panel, and include forming a gate line including a gate electrode on a substrate, forming a gate insulating layer on the gate electrode, forming an intrinsic semiconductor on the gate insulating layer, forming an extrinsic semiconductor on the intrinsic semiconductor, forming a data line including a source electrode and a drain electrode on the extrinsic semiconductor, and plasma-treating a portion of the extrinsic semiconductor between the source electrode and the drain electrode to form a protection member and ohmic contacts on respective sides of the protection member. Accordingly, the process for etching the extrinsic semiconductor and forming an inorganic insulating layer for protecting the intrinsic semiconductor may be omitted such that the manufacturing process of the display panel may be simplified, manufacturing cost may be reduced, and productivity may be improved. | 05-29-2014 |
20150053984 | THIN FILM TRANSISTOR SUBSTRATE AND THE METHOD THEREOF - A thin film transistor array panel includes a gate line, a gate insulating layer that covers the gate line, a semiconductor layer that is disposed on the gate insulating layer, a data line and drain electrode that are disposed on the semiconductor layer, a passivation layer that covers the data line and drain electrode and has a contact hole that exposes a portion of the drain electrode, and a pixel electrode that is electrically connected to the drain electrode through the contact hole. The data line and drain electrode each have a double layer that includes a lower layer of titanium and an upper layer of copper, and the lower layer is wider than the upper layer, and the lower layer has a region that is exposed. The gate insulating layer may have a step shape. | 02-26-2015 |
20150072484 | THIN FILM TRANSISTOR ARRAY PANEL AND MANUFACTURING METHOD THEREOF - A thin film transistor array panel includes a substrate, gate lines, each including a gate pad, a gate insulating layer, data lines, each including a data pad connected to a source and drain electrode, a first passivation layer disposed on the data lines and the drain electrode, a first electric field generating electrode, a second passivation layer disposed on the first electric field generating electrode, and a second electric field generating electrode. The gate insulating layer and the first and second passivation layers include a first contact hole exposing a part of the gate pad, the first and second passivation layers include a second contact hole exposing a part of the data pad, and at least one of the first and second contact holes have a positive taper structure having a wider area at an upper side than at a lower side. | 03-12-2015 |