Patent application number | Description | Published |
20080224715 | LIGHT-DRIVING SYSTEM CAPABLE OF PROVIDING SIGNAL-MEASURED CALIBRATION AND A METHOD FOR PERFORMING THE SAME - This present invention discloses a light-driving system capable of providing an accurate calibration of signal measurement and a method for performing the same, including an automatic power control (APC) circuit which is pre-calibrated for a signal measurement process. By enlarging at least one measured pad of the APC circuit, multiple grounding paths are established via a plurality of probes of a test instrument. An impedance effect predicted on the contact between the probes and the pad is diminished greatly. A voltage value on the pad can be accurately measured. Thus, a reference voltage value input to a first input of a comparator of the APC circuit can be determined on a basis of a specific condition when a ramping voltage value input to a second input of the comparator is substantially equal to a sum of a predetermined reference voltage value and the voltage value of the pad. | 09-18-2008 |
20080265916 | METHOD OF PERFORMING SIGNAL-MEASURED CALIBRATION - This present invention discloses a method for performing an accurate calibration of signal measurement by a light-driving system including an automatic power control (APC) circuit which is pre-calibrated for a signal measurement process. By enlarging at least one measured pad of the APC circuit, multiple grounding paths are established via a plurality of probes of a test instrument. An impedance effect predicted on the contact between the probes and the pad is diminished greatly. A voltage value on the pad can be accurately measured. Thus, a reference voltage value input to a first input of a comparator of the APC circuit can be determined on a basis of a specific condition when a ramping voltage value input to a second input of the comparator is substantially equal to a sum of a predetermined reference voltage value and the voltage value of the pad. | 10-30-2008 |
20080279316 | METHOD AND APPARATUS FOR DATA RECEPTION - Method and apparatus for data reception are provided, retrieving digital values transmitted through a cable. In a data receiver, an equalizer equalizes an input signal based on a boost value to generate an equalized signal, and a data extractor samples the equalized signal to extract output values from each symbol period. The data extractor detects signal quality of the equalized signal to adjust the boost value accordingly. An optimal time point is detected within one symbol period where an output value is an ensured valid, and variation rate of the optimal time point is counted as an inverse indicator of the signal quality. | 11-13-2008 |
20090066419 | VARIABLE GAIN AMPLIFIER CIRCUITS - A variable gain amplifier circuit has a variable gain amplifier (VGA), a string of resistors, a plurality of gain switches, a current source, and at least two current switches. A first input terminal of the VGA receives an input voltage signal. The string of resistors are coupled between an output terminal of the VGA and a bias voltage input terminal. Each of the gain switches is coupled between a second input terminal of the VGA and one of connection nodes between two of the resistors. Each of the current switches is coupled between the current source and one of the connection nodes. The current source provides a current through the turned-on current switch. | 03-12-2009 |
20100127905 | METHOD FOR CALIBRATING ANALOG-TO-DIGITAL CONVERTING CIRCUITS - A method for calibrating at least one analog-to-digital converting circuits includes: during a wafer level probe testing or a chip level testing, inputting at least one calibration signal into the analog-to-digital converting circuit to generate at least one digital signal; and calibrating gain or offset of the analog-to-digital converting circuit according to at least the digital signal. | 05-27-2010 |
20110116652 | SIGNAL OUTPUT DEVICE AND SIGNAL OUTPUT METHOD - A signal output device includes: a control circuit for receiving at least a first input control signal and outputting an output control signal according to at least the first input control signal, wherein the first input control signal comprises a first signal segment followed by a second signal segment; and a driver circuit, operated according to a supply power, for receiving the output control signal from the control circuit and selectively generating an output signal according to the output control signal; wherein the supply power is turned on before the second signal segment of the first input control signal is received by the control circuit; when the supply power is turned on, the driver circuit operates under a specific power state; and when the second signal segment of the first input control signal is received by the control circuit, the driver circuit keeps operating under the specific power state. | 05-19-2011 |
20110175760 | METHOD FOR CALIBRATING ANALOG-TO-DIGITAL CONVERTING CIRCUITS - A method for calibrating at least one analog-to-digital converting circuit includes: during a wafer level probe testing, inputting at least one calibration signal provided by a wafer level testing machine into the analog-to-digital converting circuit to generate at least one digital signal; and calibrating the analog-to-digital converting circuit according to at least the digital signal. The analog-to-digital converting circuit is applied to a video system or an audio system. | 07-21-2011 |
20140258569 | SIGNAL PROCESSING SYSTEM AND ASSOCIATED METHOD - The present invention provides a signal processing system and associated method. The signal processing system includes converter(s) for conversion between digital and analog, each converter includes multiple serially coupled units forming multiple frequency interfaces respectively associating with different frequencies, and each converter is partitioned, at a selected frequency interface, to a first portion and a second portion respectively formed in the first chip and the second chip. The partitioning frequency interface is selected to reduce implement cost. | 09-11-2014 |
Patent application number | Description | Published |
20090256986 | PIXEL STRUCTURE AND REPAIRING METHOD THEREOF - A pixel structure includes a scan line, a gate, a common line, a first dielectric layer, a channel layer, a source, a drain, a data line, a capacitance coupling electrode (CCE), a second dielectric layer and a pixel electrode. The gate, the common line and the scan line are disposed on the substrate, and the gate is electrically connected to the scan line. The common line has at least one first opening, and at least a portion of the first opening is located between the data line and the CCE. The channel layer is disposed on the first dielectric layer above the gate. The source and the drain are disposed on the channel layer. The CCE is disposed on the first dielectric layer above the common line and electrically connected to the drain. The pixel electrode is disposed on the second dielectric layer, and electrically connected to the CCE. | 10-15-2009 |
20100026923 | PIXEL STRUCTURE AND METHOD FOR REPAIRING THE SAME - A repairable pixel structure includes a substrate, at least a data line, at least a gate line, a transparent pixel electrode, a TFT, and a transparent pre-repair electrode. The TFT includes a gate, a drain, and a source. The transparent pre-repair electrode is disposed corresponding to the electrode in a vertical direction and is electrically connected to the drain. When a broken circuit occurs in the pixel structure, a laser beam is provided to perform a welding process on the transparent pre-repair electrode for repairing the pixel structure. | 02-04-2010 |
Patent application number | Description | Published |
20080279075 | DEVICE, METHOD FOR PROCESSING RF SIGNAL, AND OPTICAL DISK DRIVE UTILIZING THE SAME - A device for processing a radio frequency (RF) signal of an optical disk drive includes a high-pass (HP) filter, an RF variable gain amplifier (VGA), an RF analog-digital converter (ADC), and a digital module. The HP filter filters the RF signal and is capable of selectively utilizing one of a first cut-off frequency and a second cut-off frequency. The RF VGA amplifies the filtered RF signal. The RF ADC converts the amplified RF signal into a digital code. The digital module is capable of executing a first function and a second function with the digital code. The HP filter utilizes the first cut-off frequency when the digital module desires to execute the first function, and the HP filter utilizes the second cut-off frequency when the digital module desires to execute the second function. | 11-13-2008 |
20080285393 | PROCESSING CIRCUITS AND METHODS FOR OPTICAL DATA - A processing circuit for optical data is provided. The processing circuit includes a signal-processing module and a radio frequency (RF) signal-summing module. The signal-processing module averages and filters the data signals to obtain a low-frequency signal. The RF signal-summing module receives the data signals and the low-frequency signal, sums the data signals to obtain a summed data signal, and subtracts the low-frequency signal from the summed data signal to obtain a RF summing signal. | 11-20-2008 |
20080285639 | OFFSET CALIBRATION METHODS AND RADIO FREQUENCY DATA PATH CIRCUITS - An offset calibration method is provided. Two input terminals of an equalizer are switched to a common voltage at a first time point, wherein the equalizer generates a first equalized signal and a second equalized signal according to the common voltage. It is determined whether a first offset voltage is present in the equalizer according to the first and second equalized signals generated from the common voltage. If the first offset voltage is determined to be present in the equalizer, a first compensation voltage is provided to the equalizer. | 11-20-2008 |
20090325478 | MOBILE JAMMING ATTACK METHOD IN WIRELESS SENSOR NETWORK AND METHOD DEFENDING THE SAME - Mobile jamming attack method in wireless sensor network and method defending the same The present invention relates to a mobile jamming attack method applied in a wireless sensor network (WSN) and method defending the same. The mobile jamming attack method is a power exhaustion denial-of-service attack, possesses mobility and self-learning capability and is unable to be defended with existing defending scheme due to its attack to the routing layer of the WSN; the mobile jamming defending method employs multi-topologies scheme to defend the mobile jamming attack so that the affected area is reduced, the base station can still receive reply packets under the attack, and the jammed area can be roughly located and the track of the mobile jammer can be traced. | 12-31-2009 |
Patent application number | Description | Published |
20090074653 | ZNX (X=S, SE, TE) QUANTUM DOT PREPARATION METHOD - A ZnX, X is S, Se, Te or a combination thereof, quantum dot preparation method. This method comprises the following steps: dissolving S powder, Se powder, Te powder or a combination thereof into an organic alkali to form a first complex solution; dissolving ZnO into an organic acid and a co-solvent to form a second complex solution; and mixing the first complex solution and the second complex solution to obtain the ZnX quantum dot. | 03-19-2009 |
20090263580 | APPARATUS FOR MANUFACTURING A QUANTUM-DOT ELEMENT - An apparatus for manufacturing a quantum-dot element is disclosed. The apparatus includes a reaction chamber for evaporating or sputtering at least one electrode layer or at least one buffer layer on the substrate. The substrate-supporting base is located inside the reaction chamber for fixing the substrate. The atomizer has a gas inlet and a sample inlet. More specifically, the gas inlet and the sample inlet feed the atomizer respectively with a gas and a precursor solution having a plurality of functionalized quantum dots, and thereby form a quantum-dot layer on the substrate. The apparatus of the present invention can form a quantum dot layer with uniformly distributed quantum dots and integrate the processes for forming a quantum-dot layer, a buffer layer, and an electrode layer together at the same chamber. Therefore, the quality of produced element can be substantially improved. | 10-22-2009 |
20130242578 | HIGH THERMALLY CONDUCTIVE COMPOSITES AND ILLUMINATION DEVICE - Disclosed is a high thermally conductive composite, including a first composite and a second composite having a co-continuous and incompatible dual-phase manner. The first composite consists of glass fiber distributed in polyphenylene sulfide (PPS), acrylonitrile-butadiene-styrene copolymer (ABS), polybutylene terephthalate (PBT), poly(ε-caprolactam) (Nylon 6), polyhexamethylene adipamide (nylon 66), or polypropylene (PP). The second composite consists of carbon material distributed in polyethylene terephthalate. | 09-19-2013 |
20140005299 | FLAME-RETARDANT THERMOPLASTIC STARCH MATERIAL, FLAME-RETARDANT THERMOPLASTIC STARCH-BASED BIO-COMPOSITE, AND METHOD FOR MANUFACTURING THE SAME | 01-02-2014 |
20150065591 | MODIFIED STARCH COMPOSITIONS, STARCH COMPOSITE FOAM MATERIALS AND METHOD FOR PREPARING THE STARCH COMPOSITE FOAM MATERIAL - The present disclosure provides a modified starch composition. The modified starch composition includes starch with a terminal siloxane having 100 parts by weight, water having 30-70 parts by weight, and a polyol having 5-35 parts by weight. The present disclosure also provides a starch composite foam material and method for preparing the same. | 03-05-2015 |
Patent application number | Description | Published |
20120059097 | STARCH-BASED THERMOPLASTIC COMPOSITES - In an embodiment, a starch-based thermoplastic composite is provided. The starch-based thermoplastic composite includes thermoplastic starch (TPS), polycarbonate (PC) and acrylonitrile butadiene styrene (ABS), wherein the polycarbonate has a weight ratio of 15-60% in the starch-based thermoplastic composite. The starch-based thermoplastic composite further includes an impact modifier and a compatibilizer. | 03-08-2012 |
20130164510 | HIGH THERMALLY CONDUCTIVE COMPOSITES - Disclosed is a high thermally conductive composite, including a first composite and a second composite having a co-continuous and incompatible dual-phase manner. The first composite consists of glass fiber distributed into polyphenylene sulfide, and the second composite consists of carbon material distributed into polyethylene terephthalate. The carbon material includes graphite, graphene, carbon fiber, carbon nanotube, or combinations thereof. | 06-27-2013 |
20130231421 | STARCH-BASED THERMOPLASTIC COMPOSITES - In an embodiment, a starch-based thermoplastic composite is provided. The starch-based thermoplastic composite includes enzyme-degraded thermoplastic starch (TPS) having a debranching rate of 40-90%, polycarbonate (PC) and acrylonitrile butadiene styrene (ABS), wherein the polycarbonate (PC) has a weight ratio of 15-60% in the starch-based thermoplastic composite. The starch-based thermoplastic composite further includes an impact modifier and a compatibilizer. | 09-05-2013 |
20130293254 | TEST DEVICE FOR TESTING A POP STACKED-CHIP - A test device is provided for testing a bottom chip of a package-on-package (PoP) stacked-chip. An upper surface of the bottom chip has a plurality of soldering points for electrically connecting a plurality of corresponding soldering points of a top chip of the PoP stacked-chip. The test device includes a test head and a plurality of test contacts. The test head has the top chip installed inside. The plurality of test contacts is installed on a lower surface of the test head and electrically connected to the plurality of corresponding soldering points of the top chip inside the test head. When the lower surface of the test head contacts the upper surface of the bottom chip, the plurality of test contacts is electrically connected to the plurality of soldering points for testing the bottom chip. | 11-07-2013 |
20140103954 | TEST SYSTEM WITH ROTATIONAL TEST ARMS FOR TESTING SEMICONDUCTOR COMPONENTS - A test system with rotational test arms for testing semiconductor components includes a transport device, a first test socket, a second test socket, a first test arm, and a second test arm. The first test socket and the second test socket are electrically connected to different test signals respectively and correspond to the first test arm and the second test arm. The first test arm and the second test arm test arms operate rotationally to carry and place the semiconductor components to the transport device, the first test socket and the second test socket, so the test time is improved. | 04-17-2014 |
Patent application number | Description | Published |
20120249244 | OUTPUT BUFFER OF SOURCE DRIVER - An output buffer of a source driver is disclosed. The output buffer includes a buffer input, a buffer output, a differential input stage, a bias current source, an output stage, a compensation capacitor, and a comparator. The output stage and the comparator are both operated between an analog supply voltage (AVDD) and a half analog supply voltage (HAVDD), or both operated between the half analog supply voltage (HAVDD) and a ground voltage. The comparator compares an input signal with an output signal and outputs a control signal to the bias current source according to the compared result. | 10-04-2012 |
20120249245 | OUTPUT BUFFER OF SOURCE DRIVER - An output buffer of a source driver is disclosed. The output buffer includes a buffer input, a buffer output, a differential input stage, a bias current source, an output stage, a compensation capacitor, and a comparator. The output stage and the comparator are both operated between an analog supply voltage (AVDD) and a ground voltage (AGND). The comparator compares an input voltage and an output voltage and outputs a control signal to the bias current source according to the compared result to control a bias current outputted by the bias current source to enhance the slew rate of the output buffer. | 10-04-2012 |
20120280966 | DISPLAY DRIVER AND FLICKER SUPPRESSION DEVICE THEREOF - A flicker suppression device applied in a display driver for preventing the output image data of the display driver from being affected by an electrostatic discharge (ESD) event is provided. The flicker suppression device includes an ESD detector and an output stage controller. The ESD detector is coupled to a first power wire of the display driver for determining whether an ESD level shift event occurs to the first system reference voltage signal on the first power wire. If so, a control signal corresponding to the first level is provided. The output stage controller controls the output stage circuit of the display driver to be in a high impedance state in response to the control signal corresponding to the first level to avoid the output stage circuit outputting an output image data that has been affected by an ESD event. | 11-08-2012 |
20140002290 | ANALOG TO DIGITAL CONVERTER | 01-02-2014 |
Patent application number | Description | Published |
20120285719 | COVER STRUCTURE AND MANUFACTURING METHOD THEREOF - A method of manufacturing a cover structure is provided. A first insulating layer is provided. The first insulating layer has a first surface and a second surface opposite to each other. A second insulating layer is provided. The second insulating layer has a third surface and a fourth surface opposite to each other and an opening passing through the third surface and the fourth surface. A thickness of the second insulating layer is greater than a thickness of the first insulating layer. The first insulating layer and the second insulating layer are laminated to each other, so that the third surface of the second insulating layer connects to the second surface of the first insulating layer. A cavity is defined by the opening of the second insulating layer and the first insulating layer. A metal layer is formed on the cavity. | 11-15-2012 |
20140096884 | METHOD FOR BONDING HEAT-CONDUCTING SUBSTRATE AND METAL LAYER - A method for bonding a heat-conducting substrate and a metal layer is provided. A heat-conducting substrate, a first metal layer and a preformed layer are provided. The preformed layer is between the heat-conducting substrate and the first metal layer. The preformed layer is a second metal layer or a metal oxide layer. A heating process is performed to the preformed layer in an oxygen-free atmosphere to convert the preformed layer to a bonding layer for bonding the heat-conducting substrate and the first metal layer. The temperature of the heating process is less than or equal to 300° C. | 04-10-2014 |
20140144677 | PACKAGE CARRIER - A package carrier includes a substrate, first and second insulation layers, first and second patterned circuit layers, at least one first and second conductive through holes, a heat dissipation channel, an adhesive layer and a heat conducting element. The first and second patterned circuit layers are respectively disposed on the first and second insulation layers which are respectively disposed on upper and lower surfaces of the substrate. The heat dissipation channel at least passes through the first insulation layer, the first and second patterned circuit layers, and the substrate. The first and second conductive through holes electrically connect with the substrate, the first and second patterned circuit layers. At least two opposite side surfaces of the heat conducting element each includes at least one convex portion or at least one concave portion. The heat conducting element is mounted in the heat dissipation channel via the adhesive layer. | 05-29-2014 |
20140209665 | METHOD FOR BONDING HEAT-CONDUCTING SUBSTRATE AND METAL LAYER - A method for bonding a heat-conducting substrate and a metal layer is provided. A heat-conducting substrate, a first metal layer and a preformed layer are provided. The preformed layer is between the heat-conducting substrate and the first metal layer. The preformed layer is a second metal layer or a metal oxide layer. A heating process is performed to the preformed layer in an oxygen-free atmosphere to convert the preformed layer to a bonding layer for bonding the heat-conducting substrate and the first metal layer. The temperature of the heating process is less than or equal to 300° C. | 07-31-2014 |