Patent application number | Description | Published |
20080274583 | THROUGH-WAFER VIAS - A through-wafer via structure and method for forming the same. The through-wafer via structure includes a wafer having an opening and a top wafer surface. The top wafer surface defines a first reference direction perpendicular to the top wafer surface. The through-wafer via structure further includes a through-wafer via in the opening. The through-wafer via has a shape of a rectangular plate. A height of the through-wafer via in the first reference direction essentially equals a thickness of the wafer in the first reference direction. A length of the through-wafer via in a second reference direction is at least ten times greater than a width of the through-wafer via in a third reference direction. The first, second, and third reference directions are perpendicular to each other. | 11-06-2008 |
20080318365 | FORMATION OF ALPHA PARTICLE SHIELDS IN CHIP PACKAGING - A structure fabrication method. First, an integrated circuit including N chip electric pads is provided electrically connected to a plurality of devices on the integrated circuit. Then, an interposing shield having a top side and a bottom side and having N electric conductors in the interposing shield is provided being exposed to a surrounding ambient at the top side but not at the bottom side. Next, the integrated circuit is bonded to the top side of the interposing shield such that the N chip electric pads are in electrical contact with the N electric conductors. Next, the bottom side of the interposing shield is polished so as to expose the N electric conductors to the surrounding ambient at the bottom side of the interposing shield. Then, N solder bumps are formed on the polished bottom side of the interposing shield and in electrical contact with the N electric conductors. | 12-25-2008 |
20100032764 | THROUGH SILICON VIA AND METHOD OF FABRICATING SAME - A through silicon via structure and a method of fabricating the through silicon via. The method includes: (a) forming a trench in a silicon substrate, the trench open to a top surface of the substrate; (b) forming a silicon dioxide layer on sidewalls of the trench, the silicon dioxide layer not filling the trench; (c) filling remaining space in the trench with polysilicon; after (c), (d) fabricating at least a portion of a CMOS device in the substrate; (e) removing the polysilicon from the trench, the dielectric layer remaining on the sidewalls of the trench; (f) re-filling the trench with an electrically conductive core; and after (f), (g) forming one or more wiring layers over the top surface of the substrate, a wire of a wiring level of the one or more wiring levels closet to the substrate contacting a top surface of the conductive core. | 02-11-2010 |
20100035430 | METHOD OF MAKING THROUGH WAFER VIAS - A method of making a through wafer via. The method includes: forming a trench in a semiconductor substrate, the trench open to a top surface of the substrate; forming a polysilicon layer on sidewalls and a bottom of the trench; oxidizing the polysilicon layer to convert the polysilicon layer to a silicon oxide layer on the sidewalls and bottom of the trench, the silicon oxide layer not filling the trench; filling remaining space in the trench with an electrical conductor; and thinning the substrate from a bottom surface of the substrate and removing the silicon oxide layer from the bottom of the trench. The method may further include forming a metal layer on the silicon oxide layer before filling the trench. | 02-11-2010 |
20110019368 | Silicon Carrier Structure and Method of Forming Same - A silicon carrier structure for electronic packaging includes a base substrate, a silicon carrier substrate disposed on the base substrate, a memory chip disposed on the silicon carrier substrate, a microprocessor chip disposed on the silicon carrier substrate, an input/output chip disposed on the silicon carrier substrate, and a clocking chip disposed on the silicon carrier substrate. | 01-27-2011 |
20120132967 | THROUGH SILICON VIA AND METHOD OF FABRICATING SAME - A through silicon via structure and a method of fabricating the through silicon via. The method includes: (a) forming a trench in a silicon substrate, the trench open to a top surface of the substrate; (b) forming a silicon dioxide layer on sidewalls of the trench, the silicon dioxide layer not filling the trench; (c) filling remaining space in the trench with polysilicon; after (c), (d) fabricating at least a portion of a CMOS device in the substrate; (e) removing the polysilicon from the trench, the dielectric layer remaining on the sidewalls of the trench; (f) re-filling the trench with an electrically conductive core; and after (f), (g) forming one or more wiring layers over the top surface of the substrate, a wire of a wiring level of the one or more wiring levels closet to the substrate contacting a top surface of the conductive core. | 05-31-2012 |
20120267768 | FORMATION OF ALPHA PARTICLE SHIELDS IN CHIP PACKAGING - A structure and system for forming the structure. The structure includes a semiconductor chip and an interposing shield having a top side and a bottom side. The semiconductor chip includes N chip electric pads, wherein N is a positive integer of at least 2. The N chip electric pads are electrically connected to a plurality of devices on the semiconductor chip. The electric shield includes 2N electric conductors and N shield electric pads. Each shield electrical pad is in electrical contact and direct physical contact with a corresponding pair of electric conductors of the 2N electric conductors. The interposing shield includes a shield material. The shield material includes a first semiconductor material. The semiconductor chip is bonded to the top side of the interposing shield. Each chip electric pads is in electrical contact and direct physical contact with a corresponding shield electrical pad of the N shield electric pads. | 10-25-2012 |
20120301977 | SILICON CARRIER STRUCTURE AND METHOD OF FORMING SAME - A silicon carrier structure for electronic packaging includes a base substrate, a silicon carrier substrate disposed on the base substrate, a memory chip disposed on the silicon carrier substrate, a microprocessor chip disposed on the silicon carrier substrate, an input/output chip disposed on the silicon carrier substrate, and a clocking chip disposed on the silicon carrier substrate. | 11-29-2012 |
20140094007 | THROUGH SILICON VIA AND METHOD OF FABRICATING SAME - A through silicon via structure and a method of fabricating the through silicon via. The method includes: (a) forming a trench in a silicon substrate, the trench open to a top surface of the substrate; (b) forming a silicon dioxide layer on sidewalls of the trench, the silicon dioxide layer not filling the trench; (c) filling remaining space in the trench with polysilicon; after (c), (d) fabricating at least a portion of a CMOS device in the substrate; (e) removing the polysilicon from the trench, the dielectric layer remaining on the sidewalls of the trench; (f) re-filling the trench with an electrically conductive core; and after (f), (g) forming one or more wiring layers over the top surface of the substrate, a wire of a wiring level of the one or more wiring levels closest to the substrate contacting a top surface of the conductive core. | 04-03-2014 |
Patent application number | Description | Published |
20090098369 | FRICTION STIR WELDING OF FIBER REINFORCED THERMOPLASTICS - A fiber-reinforced component is formed of a first composite member including a thermoplastic matrix with reinforcing fibers having a diameter and a length distributed therein in a selected orientation and a second composite member including a thermoplastic matrix with reinforcing fibers having a diameter and a length distributed therein in a selected orientation. The first composite member is bonded to the second composite member by a solid state bond along a predetermined joint path, such that an average volume fraction of the reinforcing fibers of the first composite member and the second composite member within the joint path is substantially the same as an average volume fraction of the reinforcing fibers of the first composite member and the second composite member within the remainder of the fiber-reinforced component. | 04-16-2009 |
20110150663 | Process For Producing A Ceramic Matrix Composite Article And Article formed Thereby - Process for producing a ceramic composite structure includes impregnating a reinforcing material with a suitable precursor slurry composition including thermosetting resin, a suitable curing agent, a ceramic component, a carbonaceous solids component, and optionally, a suitable solvent. Exemplary thermosetting resins include polyesters, vinyl esters, epoxy resins, bismaleimide resins, and polyimide resins. The carbonaceous solids component provides a suitable amount of carbon char upon pyrolization. The preform may be dried prior to curing to remove solvents and thereby provide a working material comprising up to 70 volume % solids. The preform is cured, pyrolized, and infiltrated with molten silicon to form a composite article. The thermosetting resin is selected for processability, green strength, and relatively fast cure cycle. | 06-23-2011 |
20110151248 | Ceramic Matrix Composite Precursor Slurry Compositions And Sheet Molding Compound - A ceramic matrix composite precursor slurry composition includes a thermosetting resin, a suitable curing agent, a ceramic component, a carbonaceous solids component, and optionally, a suitable solvent. The thermosetting resin may be a polyester, a vinyl ester, an epoxy resin, a bismaleimide resin, and/or a polyamide resin. The carbonaceous solids component provides a suitable amount of carbon char upon pyrolization. The precursor slurry composition may comprise up to about 70 volume % solids after removal of the solvent, and prior to cure. A sheet molding compound first and second outer films comprising the precursor slurry composition and randomly dispersed reinforcing material carried between the first and second outer films. | 06-23-2011 |
Patent application number | Description | Published |
20100123621 | Active interference suppression in a satellite communication system - The invention relates to active interference suppression in a satellite communication system, particularly but not exclusively to an apparatus and method for using active interference suppression in order to suppress co-channel interference between user signals in the communication system. The communication system includes a receive or transmit antenna having a plurality of antenna elements, each antenna element associated with a respective antenna element signal. The method includes the steps of calculating complex weighting values for one or more of a plurality of beam signals, adjusting the beam signals in accordance with the calculated complex weighting values and cancelling co-channel interference in at least one of the beam signals using the one or more adjusted derived beam signals to provide an interference suppressed output signal. The complex weighting values can be calculated based on a constant modulus algorithm. | 05-20-2010 |
20100221997 | Active interference suppression in a satellite communication system - The invention relates to active interference suppression in a satellite communication system, particularly but not exclusively to an apparatus and method for using active interference suppression in order to suppress co-channel interference between user signals in the communication system. The communication system includes a receive or transmit antenna having a plurality of antenna elements, each antenna element associated with a respective antenna element signal. The method includes the steps of calculating complex weighting values for one or more of a plurality of beam signals, adjusting the beam signals in accordance with the calculated complex weighting values and cancelling co-channel interference in at least one of the beam signals using the one or more adjusted derived beam signals to provide an interference suppressed output signal. The complex weighting values can be calculated based on a constant modulus algorithm. | 09-02-2010 |
20100231442 | SATELLITE BEAM-POINTING ERROR CORRECTION IN DIGITAL BEAM-FORMING ARCHITECTURE - A digital method of determining and correcting beam-pointing for a communications spacecraft that has a digital beam-forming architecture for defining multiple spot transmit and receive beams, the antenna system of the spacecraft including a receive antenna (DRA, AFR) having antenna elements providing respective antenna element signals, and wherein at least one of the uplink signals to the spacecraft includes a beacon signal, | 09-16-2010 |
Patent application number | Description | Published |
20110091304 | Cartridge tubular handling system - A cartridge of tubulars may be removably positioned with a carriage, and the carriage may move the cartridge transversely, vertically, and/or rotationally to roll tubulars on an adjacent tubular receiving member using only gravity from a selected tier of tubulars without human contact. A single trolley disposed with the tubular receiving member both pushes and pulls tubulars toward or away from the drilling deck. | 04-21-2011 |
20120243965 | Cartridge Tubular Handling System - A cartridge of tubulars may be removably positioned with a carriage, and the carriage may move the cartridge transversely, vertically, and/or rotationally to roll tubulars on an adjacent tubular receiving member using only gravity from a selected tier of tubulars without human contact. A single trolley disposed with the tubular receiving member both pushes and pulls tubulars toward or away from the drilling deck. | 09-27-2012 |
20140205417 | Trolley Apparatus - A cartridge of tubulars may be removably positioned with a carriage, and the carriage may move the cartridge transversely, vertically, and/or rotationally to roll tubulars on an adjacent tubular receiving member using only gravity from a selected tier of tubulars without human contact. A single trolley disposed with the tubular receiving member both pushes and pulls tubulars toward or away from the drilling deck. | 07-24-2014 |