Tung, Hsinchu
Chih-Hang Tung, Hsinchu TW
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20120061059 | COOLING MECHANISM FOR STACKED DIE PACKAGE AND METHOD OF MANUFACTURING THE SAME - An apparatus for cooling a stacked die package comprises a first die provided above a substrate; a second die above the first die; a cooling fluid in fluid communication with the first die and the second die, the cooling fluid for absorbing thermal energy from the first and the second die; a housing containing the first and second dies, the housing sealing the first and second dies from an environment, wherein the housing further includes a first opening and a second opening, the first and second openings being vertically displaced from one another; a conduit having one end connected to the first opening and the other end connected to the second opening, the conduit allowing the cooling liquid to circulate from the first opening to the second opening; a first temperature sensor being arranged to provide an output that is dependent on a local temperature at the first opening; and a second temperature sensor being arranged to provide an output that is dependent on a local temperature at the second opening, wherein the outputs of the first and second temperature sensors relative to each other are indicative of a level of the cooling fluid. | 03-15-2012 |
20120063090 | COOLING MECHANISM FOR STACKED DIE PACKAGE AND METHOD OF MANUFACTURING THE SAME - An apparatus for cooling a stacked die package comprises a substrate, a first die above the substrate, a second die above the first die, and a housing containing the first and second dies. The housing seals the first and second dies from the environment. The apparatus further includes a cooling fluid in fluid communication with the first die and the second die to transfer the heat from the dies to the housing. | 03-15-2012 |
20130187277 | CRACK STOPPER ON UNDER-BUMP METALLIZATION LAYER - A semiconductor die includes a crack stopper on an under-bump metallization (UBM) layer. The crack stopper is in the shape of hollow cylinder with at least two openings. | 07-25-2013 |
20130221074 | SOLDER BUMP STRETCHING METHOD - A method includes heating a solder bump above a melting temperature of the solder bump. The solder bump is stretched to increase a height of the solder bump. The solder bump is cooled down. | 08-29-2013 |
20130221521 | SOLDER BUMP STRETCHING METHOD FOR FORMING A SOLDER BUMP JOINT IN A DEVICE - A method includes heating a solder bump above a melting temperature of the solder bump. The solder bump is stretched to increase a height of the solder bump. The solder bump is cooled down to form a solder bump joint in an electrical device. | 08-29-2013 |
20130307144 | THREE-DIMENSIONAL CHIP STACK AND METHOD OF FORMING THE SAME - A three dimensional (3D) chip stack includes a first chip bonded to a second chip. The first chip includes a first bump structure overlying the first substrate, and the second chip includes a second bump structure overlying the second substrate. The first bump structure is attached to the second bump structure, and a joining region is formed between the first bump structure and the second bump structure. The joining region is a solderless region which includes a noble metal. | 11-21-2013 |
20150021755 | STACKED PACKAGE AND METHOD OF MANUFACTURING THE SAME - A stacked package includes a substrate, and a first structure bonded to the substrate. The first structure has a plurality of bumps, and a first hydrophilic coating is on sidewalls of the first structure. The stacked package further includes a second structure bonded to the plurality of bumps. The first hydrophilic coating is on sidewalls of the second structure. The first structure is between the second structure and the substrate. The stacked package further includes a housing, wherein the housing defines a volume enclosing the first structure and the second structure. A second hydrophilic coating is on sidewalls of an inner surface of the housing. The stacked package further includes a cooling fluid within the volume enclosing the first structure and the second structure. A top surface of the cooling fluid is above a top surface of the second structure. | 01-22-2015 |
20150061115 | INTERCONNECT STRUCTURE AND MANUFACTURING METHOD THEREOF - A conductive interconnect structure includes a contact pad; a conductive body connected to the contact pad at a first end; and a conductive layer positioned on a second end of the conductive body. The conductive body has a longitudinal direction perpendicular to a surface of the contact pad. The conductive body has an average grain size (a) on a cross sectional plane (Plane A) whose normal is perpendicular to the longitudinal direction of the conductive body. The conductive layer has an average grain size (b) on Plane A. The conductive body and the conductive layer are composed of same material, and the average grain size (a) is greater than the average grain size (b). | 03-05-2015 |
20150079763 | SOLDER BUMP STRETCHING METHOD AND DEVICE FOR PERFORMING THE SAME - A wafer-level pulling method includes securing a top holder to a plurality of chips; and securing a bottom holder to a wafer, wherein the plurality of chips are bonded to the wafer by a plurality of solder bumps. The wafer-level pulling method further includes softening the plurality of solder bumps; and stretching the plurality of softened solder bumps. | 03-19-2015 |
20150108206 | INDIRECT PRINTING BUMPING METHOD FOR SOLDER BALL DEPOSITION - Some embodiments of the present disclosure relate to an apparatus and method to form a pattern of solder bumps. A solder paste is applied a plate comprising a pattern of holes, where each hole is partially filled by a piston attached to a movable stage. The remainder of the holes are filled by applying a force to the solder paste with a first solder paste application tool. A second solder paste application tool then removes excess paste from the front surface of the plate. The solder paste is then disposed onto a surface of a substrate by moving the movable stage, which fills a larger portion of each hole with a piston, forces the solder paste out of each hole, and forms pattern of solder paste on the surface of the substrate. The pattern of solder paste is then subjected to additional processing to form a pattern of solder bumps. | 04-23-2015 |
Chi-Wei Tung, Hsinchu TW
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20130055229 | PROJECTION SYSTEM AND METHOD FOR UPDATING THE SAME - A projection system including a first projector and a plurality of second projectors is provided. The first projector has a control interface, a first transmission interface, a second transmission interface and a first image unit. The control interface is used for receiving an update message, and the first image unit performs firmware updating according to the update message. Each of the second projectors has a third transmission interface, a fourth transmission interface and a second image unit. The first transmission interface, the second transmission interface, the third transmission interfaces and the fourth transmission interfaces are connected in series to form a transmission channel. The first image unit transmits the update message to the second image units through the transmission channel, and the second image units perform firmware updating according to the update message. | 02-28-2013 |
Chung-Chih Tung, Hsinchu TW
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20090109348 | DATA DISPLAY METHOD FOR DIGITAL STORAGE DEVICE - A data display method for digital storage devices implemented on a computer executable platform. The invention reads data through a dynamic setting of a Basic Input/Output System and a card read controller, and selectively displays the data on a display device without entering the operating system. This greatly improves the convenience of using digital storage devices. | 04-30-2009 |
Chun-Hao Tung, Hsinchu TW
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20100136720 | MANUFACTURING METHOD OF PIXEL STRUCTURE - A method of manufacturing the pixel structure is provided. The method includes forming a gate, a scan line connected to the gate, and at least one auxiliary pattern on a substrate. An insulating layer, a semiconductor layer, an ohmic contact layer, and a photoresist layer are formed in sequence. Afterwards, a single exposure and development is performed on the photoresist layer to form a first portion and a second portion. Next, the ohmic contact layer and the semiconductor layer which are not covered by the photoresist layer are removed to expose a part of the insulating layer. Next, the second portion of the photoresist layer is removed. Subsequently, a part of the thickness of the semiconductor layer not covered by the first portion is removed and the exposed insulating layer is removed, so as to faun a channel layer and an insulating layer. | 06-03-2010 |
20100291479 | METHOD FOR FABRICATING COLOR FILTER LAYER - A method of fabricating a color filter layer is provided. An active device array substrate having an opaque metal pattern formed thereon is provided. A planarization layer covering the opaque metal pattern is formed. A back-side exposure process is performed on the active device array substrate using the opaque metal layer as a mask to form a black matrix thereon, wherein the black matrix defines a plurality of pixel regions. A plurality of color filter patterns is formed in the pixel regions. | 11-18-2010 |
Hsiu-Chi Tung, Hsinchu TW
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20080273130 | DISPLAY DEVICE - A display comprises a driving circuit region and a pixel region electrically connected to the driving circuit region. The pixel region includes a micro-reflective pixel structure with a reflective electrode, a transparent pixel structure with a transparent electrode, and a dielectric layer formed on the reflective electrode, so that the transparent electrode, formed on the dielectric layer, electrically connects to the reflective electrode. | 11-06-2008 |
Hsi-Wen Tung, Hsinchu TW
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20090103170 | SOLID TUNABLE MICRO OPTICAL DEVICE AND METHOD - A solid tunable micro optical device for an micro-optical system is provided. The sold tunable micro optical device includes a first annular piece, a micro-lens with a spherical surface configured on the first annular piece, and a deforming device coupled to the first annular piece for deforming the micro-lens. | 04-23-2009 |
Hsuan-Li Tung, Hsinchu TW
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20160043466 | Miniature Antenna and Antenna Module Thereof - An antenna includes a feed segment for transmitting a radio-frequency signal, a first radiator electrically connected to the feeding segment and formed on a first surface of a substrate, and a second radiator electrically connected to the feeding segment and formed on a second surface of the substrate, wherein the first radiator includes a first arm electrically connected to the feeding segment, a first branch and a second branch, and a second arm electrically connected to the feeding segment, a third branch and a fourth ranch, and the second radiator includes a third arm electrically connected to the feeding segment, a fifth branch and a sixth branch, and a fourth arm electrically connected to the feeding segment, a seventh branch and an eighth branch. | 02-11-2016 |
Hsu-Jung Tung, Hsinchu TW
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20120239870 | FIFO APPARATUS FOR THE BOUNDARY OF CLOCK TREES AND METHOD THEREOF - A FIFO apparatus uses a first clock signal in a first clock domain to receive an input signal and uses a second clock signal in a second clock domain to output an output signal. An example apparatus includes: at least three write registers belonging to the first clock domain for receiving the input signal. Each of the write registers has a first output. A first controller belonging to the first clock domain enables the registers, in accordance with an order, to generate an initial signal. A multiplexer receives the first outputs. A second controller belonging to the second clock domain, receives the initial signal through an asynchronous interface and controls the multiplexer to output the first outputs in accordance with the order to be the output signal, wherein the second clock domain is a clock tree generated based on the first clock domain. | 09-20-2012 |
20140118030 | SAMPLING CIRCUIT AND SAMPLING METHOD - A sampling circuit and a sampling method are provided, where the sampling circuit includes a first delay chain, a second delay chain, and a half-speed binary-phase detector. The first delay chain is used to delay an input signal according to an up signal and a down signal, so as to generate a first delay signal; and the second delay chain is used to delay the first delay signal according to a preset delay value, so as to generate a second delay signal. The half-speed binary-phase detector is used to sample a data signal according to edge trigger of the first delay signal and that of the second delay signal, and generate an output signal, an up signal, and a down signal according to a sampling result of the data signal. | 05-01-2014 |
Jen-Lang Tung, Hsinchu TW
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20140118644 | LIQUID CRYSTAL LENS AND DISPLAY DEVICE HAVING THE SAME - A liquid crystal (LC) lens includes first and second substrates, an LC layer disposed therebetween, and a plurality of first and second electrode structures. Each electrode structure has a plurality of first, second, third and fourth electrodes spaced-apart and alternately arranged along a first direction, where the first and second electrodes are disposed between the first substrate and the LC layer, while the third and fourth electrodes are disposed between the second substrate and the LC layer. In each first electrode structure, each of the first and second electrodes and a corresponding one of the third and fourth electrodes are aligned at a left tilted angle, while in each second electrode structure, each of the first and second electrodes and a corresponding one of the third and fourth electrodes are aligned at a right tilted angle. The first and second electrode structures are alternately arranged along a second direction. | 05-01-2014 |
Li-Ping Tung, Hsinchu TW
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20150131504 | POWER-SAVING DATA SCHEDULING SYSTEM IN LTE AND METHOD THEREOF - A power-saving data scheduling system for LTE and a method thereof are provided. The power-saving data scheduling system includes a period decision module for selecting a cycle having a shortest delay time as a discontinuous reception (DRX) cycle for each of user from quality of service (QoS) requirements related to network services and channel conditions, and a start offset decision module for calculating the number of users in each of periods of the DRX cycle. In addition, a DRX-aware scheduling module is provided for extending the on period by increasing priority of the user and resetting an inactivity timer if a period required by the user's load is shorter than an off period. Optimal DRX parameters and DRX-aware scheduling are used to resolve the existing issues that the channel conditions, system load and QoS are not taken into consideration when the DRX parameters are determined. In addition, the DRX parameters of a user may be changed dynamically without updating all other users' parameters so as to avoid consuming unnecessary power. Moreover, a power-saving data scheduling method for LTE is also provided. | 05-14-2015 |
Li-Shen Tung, Hsinchu TW
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20110001641 | Electronic Device Equipped with Programmable Key Layout and Method for Programming Key Layout - An electronic device equipped with programmable key layout in provided, which includes a microprocessor, a sensor point array assembly, and a memory module. The sensor point array assembly is electrically coupled to the microprocessor through an interface circuit. A plurality of sensor points is distributed over the sensor point array assembly. The memory module stores a keymap table, and at least a sensor point grid defined by a user and a key code corresponding to the sensor point grid are written into the keymap table. The sensor point grid includes at least one of the sensor points of the sensor point array assembly. When one or more of the sensor points of the sensor point array assembly is triggered, the microprocessor differentiates the key code corresponding to the sensor point grid including the triggered sensor point according to the keymap table in the memory module. | 01-06-2011 |
Mu-Lin Tung, Hsinchu TW
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20100134172 | CHARGE-SHARING METHOD AND DEVICE FOR CLOCK SIGNAL GENERATION - A clock generation circuit has two output ends to provide a first clock signal and a second clock signal, in response to first and second input signals, respectively. A charge storage component is used to transfer some charge from the first output end to the charge storage component when the first clock signal is high for a period of time, and to transfer the charge from the charge storage component to the second output end when the second clock signal is low. At a different period of time in the clock cycle, the charge storage component is used to transfer some charge from the second output end to the charge storage component when the second clock signal is high for a period of time, and to transfer the charge from the charge storage component to the first output end when the first clock signal is low. | 06-03-2010 |
20110102471 | METHOD AND DEVICE FOR DRIVING LIQUID CRYSTAL DISPLAY - The present invention in one aspect relates to a source driver for driving a display panel to display an image data in an adaptive column inversion. In one embodiment, the source driver includes a data processing unit having a logic circuit adapted for determining N most-significant bits (MSBs) of image data signals of two neighboring data lines, such that when all of the N MSBs are equal to 1 or 0, the output of the logic circuit is 1, otherwise, the output of the logic circuit is 0, and a MUX coupled to the data processing unit and adapted for receiving a frame polarity control signal, FramePOL, and a pixel polarity control signal, XPOL, and selectively outputting the frame polarity control signal FramePOL when the output of the logic circuit is 1, or the pixel polarity control signal POL when the output of the logic circuit is 0, as a polarity control signal, POL. | 05-05-2011 |
20140267472 | METHOD AND SOURCE DRIVER FOR DRIVING LIQUID CRYSTAL DISPLAY - In one aspect of the invention, a source driver for driving a display panel to display an image data in an adaptive column inversion includes a data processing unit having a logic circuit adapted for determining N most-significant bits (MSBs) of image data signals of two neighboring data lines, such that when all of the N MSBs are equal to 1 or 0, the output of the logic circuit is 1, otherwise, the output of the logic circuit is 0, and a MUX coupled to the data processing unit and adapted for receiving a frame polarity control signal, FramePOL, and a pixel polarity control signal, XPOL, and selectively outputting the frame polarity control signal FramePOL when the output of the logic circuit is 1, or the pixel polarity control signal POL when the output of the logic circuit is 0, as a polarity control signal, POL. | 09-18-2014 |
Tai-Lai Tung, Hsinchu TW
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20150358187 | SIGNAL PROCESSING SYSTEM AND SIGNAL PROCESSING METHOD COOPERATING WITH VARIABLE GAIN AMPLIFIER - A signal processing system includes a variable gain amplifier, an analog-to-digital converter (ADC), a gain compensation module and a signal processing module. The variable gain amplifier applies a variable gain to an analog input signal to generate an amplified analog signal. The ADC converts the amplified analog signal to an amplified digital signal. The gain compensation module applies a compensation gain to the amplified digital signal to generate a compensated signal. The compensated signal has an instantaneous change lower than a predetermined threshold. The signal processing module performs a signal processing procedure on the compensated signal. | 12-10-2015 |
Tien-Hsiung Tung, Hsinchu TW
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20090190301 | Server device - The present invention relates to a server device which comprises a case having two symmetric slots disposed on the top and a first handle disposed in each of the slots to make it easier to lift up the server device, a horizontal partition disposed in the case and dividing the inner space of the case into upper and lower parts, wherein the upper part is a first holding space capable of holding at least an electronic device, a first heat dissipation unit is disposed at the front of the electronic, the lower part of the case is a second holding space capable of holding at least a server, and a second heat dissipation unit may be disposed at one side of the second holding space, such that a plurality of servers, electronic devices and heat dissipation units may be integrated into the server device for easily and conveniently being moved. | 07-30-2009 |
Yuan-Hung Tung, Hsinchu TW
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20140036380 | COLOR FILTER SUBSTRATE AND MANUFACTURING METHODS OF ACTIVE DEVICE ARRAY SUBSTRATE AND COLOR FILTER SUBSTRATE - A color filter substrate includes a substrate, a color filter array, a partition configuration and an alignment material layer. The substrate has an alignment region and a predetermined sealing region. The predetermined sealing region surrounds the alignment region. The color filter array is disposed on the substrate within the alignment region. The partition configuration is disposed on the substrate between the predetermined sealing region and the alignment region. The alignment material layer is disposed inside the alignment region to cover the color filter array. | 02-06-2014 |