Patent application number | Description | Published |
20110012521 | Backlight Unit With Controlled Power Consumption And Display Apparatus Having The Same - In a display apparatus having a backlight unit, a light unit includes plural light source strings commonly connected to an output terminal of a boosting circuit to generate light in response to a light source driving voltage. The light source strings are grouped into plural light generating groups. Plural driving circuits are respectively connected to the light generating groups, and each driving circuit sequentially outputs feedback voltages from the light source strings of a corresponding light generating group. A minimum voltage detecting circuit compares the feedback voltages with each other from the driving circuits to detect a minimum voltage and outputs a control signal according to the detected minimum voltage. A voltage control circuit controls a voltage level of the light source driving voltage in response to the control signal. Accordingly, although the number of the driving circuits increases, power consumption used in each driving circuit may be reduced. | 01-20-2011 |
20110039472 | METHOD OF MANUFACTURING A LAMP - Disclosed is a method of manufacturing a lamp. The lamp is formed by arranging lamp electrodes in a lamp body provided therein with a discharge space and a fluorescent material. A first conductive layer is formed on a base conductor and a second conductive layer is formed on the first conductive layer by allowing the first conductive layer to react with a reaction solution including a solvent and metallic salt, thereby forming the lamp electrodes. | 02-17-2011 |
20110157916 | LIGHT EMITTING DEVICE AND DISPLAY DEVICE HAVING THE SAME - A display device includes a display panel and a light emitting device to supply light to the display panel. The light emitting device includes a light emitting element emitting a first light and a fluorescent layer receiving the first light, transmitting a portion of the first light, converting a remaining portion of the first light to a second light having a wavelength range different from the first light, and emitting the second light. The second light emitted by the fluorescent layer has a full width at half maximum equal to or larger than 110 nanometers (nm) and a light emission spectrum having a peak wavelength within a wavelength range of about 530 nm to about 560 nm. The second light has a light emission intensity corresponding to 10 to 30 percent of a peak light emission intensity of the first light. | 06-30-2011 |
20110227957 | Method of Dimming Backlight Assembly - A plurality of gray-scale values is extracted from image signals corresponding to a dimming area to calculate a mean value of the gray-scale values, and at least one of a variance, a standard deviation, a kurtosis, a skewness, a central moment, and an image moment is calculated using the mean value. Then, a representative gray-scale value corresponding to the dimming area is determined using the calculated values, and a dimming function for the light sources included in the dimming area is determined based on the representative gray-scale value. Then, the light sources included in the dimming area are driven based on the dimming function. | 09-22-2011 |
20120081412 | DISPLAY APPARATUS AND METHOD OF DRIVING THE SAME - A display apparatus includes a display panel, a backlight unit, a backlight control circuit, sensors, a read-out circuit and a sensor auxiliary circuit. The display panel includes pixels and displays an image. The backlight unit includes a first light source which emits a first light in a infrared light range. The backlight control circuit controls a brightness of the first light source. The sensors sense an external signal and outputs first sensing signals. The read-out circuit outputs the first sensing signals as second sensing signals. The sensor auxiliary circuit compares a maximum value and a minimum value of the second sensing signals and provides a brightness control signal to the backlight control circuit based on the compared difference to control the brightness of the first light source. | 04-05-2012 |
20120182765 | DISPLAY APPARATUS - A display apparatus includes plural light guide plates each including a light incident surface and a light output surface, plural light sources providing light to the light guide plates, and a display panel receiving the light to display an image. The light guide plates have a rectangular shape, are spaced apart from each other and are in a same plane. The light sources are disposed between two adjacent light guide plates. Each of the light sources includes a light emitting surface, and provides the light to the light guide plates through the light emitting surface. The light emitting surface of the light sources is inclined with respect to one side of the light guide plates. | 07-19-2012 |
20140085351 | METHOD OF DIMMING BACKLIGHT ASSEMBLY - A plurality of gray-scale values is extracted from image signals corresponding to a dimming area to calculate a mean value of the gray-scale values, and at least one of a variance, a standard deviation, a kurtosis, a skewness, a central moment, and an image moment is calculated using the mean value. Then, a representative gray-scale value corresponding to the dimming area is determined using the calculated values, and a dimming function for the light sources included in the dimming area is determined based on the representative gray-scale value. Then, the light sources included in the dimming area are driven based on the dimming function. | 03-27-2014 |
20140119049 | BACKLIGHT UNIT AND DISPLAY APPARATUS HAVING THE SAME - A backlight unit includes a light source unit having a light source configured to emit a first light, a quantum dot sheet configured to emit a second light having a different color from the first light, a light guide plate configured to guide a light exiting from the light source unit or the quantum dot sheet, and an optical member including a prism sheet and configured to control the light exiting from the light guide plate. The quantum dot sheet includes a polymer resin and a plurality of first and second quantum dots, which are dispersed in the polymer resin. The second light is a white light obtained by mixing a red light, green light, and a blue light, and the second light has a concordance rate with an Adobe RGB color space which is no less than by about 99.9%. | 05-01-2014 |
Patent application number | Description | Published |
20110044208 | WIRELESS AD-HOC NETWORK CONFIGURATION METHOD AND APPARATUS - A method and apparatus for setting up a wireless ad-hoc network, the method including: interchanging a terminal identifier and Wi-Fi protected setup (WPS) capability information with other terminals of the wireless ad-hoc network; selecting a role as a registrar or an enrollee based on the interchanged terminal identifier and the interchanged WPS capability information of the wireless ad-hoc network; and optionally registering in the registrar based on the selected role. | 02-24-2011 |
20110185200 | METHOD AND APPARATUS FOR WAKING DEVICE FROM POWER SAVE MODE - A method for waking a device from a power save mode to an active mode includes: transmitting, by a first device, a magic packet through a predetermined channel to a second device, which operates in the power save mode by repeating a doze state and an awake state according to a predetermined period of time, for notifying the second device to switch to the active mode; and retransmitting the magic packet to the second device through the predetermined channel if a response to the magic packet has not been received from the second device and a predetermined time has not elapsed after transmitting the magic packet through the predetermined channel. | 07-28-2011 |
20130106820 | MULTI-VIEW DEVICE OF DISPLAY APPARATUS AND CONTROL METHOD THEREOF, AND DISPLAY SYSTEM | 05-02-2013 |
20130106927 | MULTI-VIEW DEVICE AND CONTROL METHOD THEREOF, DISPLAY APPARATUS AND CONTROL METHOD THEREOF, AND DISPLAY SYSTEM | 05-02-2013 |
20140112121 | WIRELESS COMMUNICATION SYSTEM INCLUDING COMMUNICATION APPARATUS AND DATA COMMUNICATION METHOD THEREOF - A data transmission method is provided, including adjusting a data transmission speed when a number of retransmission of a data transmission unit reaches a predetermined number, wherein the retransmission is performed when a transmission failure occurs, transferring the data transmission unit at the adjusted data transmission speed, and readjusting the adjusted data transmission speed to a basic data transmission speed when data transmission is successful, and reducing the basic data transmission speed when at least one of a retransmission rate and a number of the transmission failure satisfies a predetermined threshold condition. | 04-24-2014 |
20140153513 | METHOD AND APPARATUS FOR SETTING UP AN INTERNET PROTOCOL ADDRESS IN A WIRELESS COMMUNICATION SYSTEM - A method and apparatus are provided for a client device to be allocated an Internet Protocol (IP) address by a Group Owner (GO) device, for direct communication between the client device and the GO device. The method includes transmitting, by the client device, an Association Request message to the GO device, receiving an Association Response message from the GO device, in response to the Association Request message, and receiving, by the client device, an IP address of the client device allocated by the GO device, during an authentication process between the client device and the GO device. | 06-05-2014 |
Patent application number | Description | Published |
20080261225 | METHOD AND KIT FOR DETECTING A TARGET PROTEIN USING A DNA APTAMER - A method and a kit for detecting a target protein in a sample with a signal amplification strategy are provided. The signal amplification strategy is established for the aptamer-based molecular recognition of a target protein with concomitant release of single-stranded DNA (G-DNA), which binds complementarily to a single-stranded RNA comprising a fluorophore and a quencher (“F-RNA-Q”). The fluorescence-quenched RNA is then degraded by RNase H to result in a fluorescence signal, and the undamaged G-DNA is recycled to yield fluorescence amplification. | 10-23-2008 |
20090029390 | METHOD FOR QUANTITATIVE ANALYSIS OF INTERACTIONS BETWEEN HIF-1ALPHA C-TERMINAL PEPTIDES AND CBP OR p300 PROTEINS AND METHOD OF SCREENING INHIBITORS USING THE SAME - The present invention relates to a method for quantitative analysis of interactions between fluorescein-labeled HIF-1α (alpha) C-terminal peptides and cAMP-responsive element binding protein (CBP) or p300 proteins, and a method of screening inhibitors against the formation of HIF-1α-p300 or HIF-1α-CBP protein complexes using the above method. | 01-29-2009 |
20100004325 | Use of Baicalein As Prolyl Hydroxylase 2 Inhibitor - The present invention is to prove a new molecular and cellular effect of baicalein, which is selected by a prolyl hydroxylase 2 (PHD2) inhibitor screening method using a compound library. Specifically, the present invention quantitatively analyzed the inhibitory effect of the baicalein against PHD2, confirmed the inhibitory effect against FIH (factor inhibiting HIF), analyzed the HIF (hypoxia inducible factor) protein expression induced by baicalein in a cell, and then, confirmed whether the VEGF is expressed by using reporter assay and ELISA. The above effect of baicalein proves that it can be used for a drug treating ischemic diseases, and, therefore, it can be used for other related diseases. | 01-07-2010 |
20110027772 | Antigen Detection Kit and Method - An antigen detection kit and an antigen detection method using the same are provided. The antigen detection kit comprises a capture antibody, a detection antibody bound to a single stranded DNA oligonucleotide, a single stranded RNA oligonucleotide complementary sequence to the DNA oligonucleotide, and an RNase. | 02-03-2011 |
20110165587 | Method for live-cell activity assay - Provided are technologies capable of direct measurement of activity of a bioactive substance in cell using nanowires, more particularly, a method for measuring intracellular activity of a bioactive substance using a nanowire support to which cells are immobilized and a nanowire support to which target substances for the subject bioactive substance are immobilized, and a chip for measuring intracellular activity of a bioactive substance including nanowires to which cells are immobilized and nanowires to which a target substance for the subject bioactive substance is immobilized. | 07-07-2011 |
Patent application number | Description | Published |
20090058815 | PORTABLE TERMINAL AND METHOD FOR DISPLAYING TOUCH KEYPAD THEREOF - A portable terminal and a method for displaying a touch keypad thereof are disclosed. The portable terminal includes a controller to determine whether a display screen is in a portrait mode in response to a text input request, and a touch screen to split a touch keypad into a left-hand keypad and a right-hand keypad and display one of the left-hand keypad and the right-hand keypad above the other, according to the control of the controller, when the display screen is in the portrait mode. The method includes determining whether a display screen is in a portrait mode in response to a text input request, and splitting a touch keypad into a left-hand keypad and a right-hand keypad and displaying one of the left-hand keypad and the right-hand keypad above the other when the display screen is in the portrait mode. | 03-05-2009 |
20090160809 | MOBILE TERMINAL HAVING TOUCH SCREEN AND FUNCTION CONTROLLING METHOD OF THE SAME - A mobile terminal having a touch screen and a method of controlling functions in the mobile terminal are disclosed. The mobile terminal includes a touch screen including a touch panel to detect a drag and drop generated on a function execution screen and a display unit to display the function execution screen, a control unit to control the display unit to display of at least one control interaction guide to guide a control command to be executed on the function execution screen in response to a request to display the control interaction guide, to determine the control command corresponding to a drag generated on the function execution, and to execute a function corresponding to the determined control command on the function execution screen, and a memory unit to store the control command to be executed on the function execution screen and the control interaction guide to be displayed on the function execution screen. | 06-25-2009 |
20100058216 | APPARATUS AND METHOD FOR PROVIDING USER INTERFACE TO GENERATE A MENU LIST - The present invention relates to a portable terminal that may generate and provide a menu list connected to and executable between selected function elements in various service area items. A method for providing an interface of the portable terminal includes dividing a screen of the portable terminal into a plurality of service item areas and a menu generation area, and moving, in response to a user request, at least one function element of the service item areas to the menu generation area. The method further comprises generating a menu list executable for the at least one function element of the menu generation area, and displaying the menu list. | 03-04-2010 |
20100188353 | MOBILE TERMINAL HAVING DUAL TOUCH SCREEN AND METHOD OF CONTROLLING CONTENT THEREIN - A terminal device having a dual touch screen capable of controlling a content is disclosed. The terminal device displays at least one content to a display unit. A processor coupled to the terminal is configured to checking content mapped to an area at which a touch event is detected and released from the dual touch screen including a first touch sensor and a second touch sensor and to control the content according to the touch event. | 07-29-2010 |
20100201709 | IMAGE DISPLAY METHOD AND APPARATUS - An image display method and apparatus are disclosed. When a background image and a foreground image are displayed in an overlapping manner, the comprehensibility of the foreground image is enhanced by adjusting the brightness of the background image on the basis of the external illumination, of the brightness difference between the background image and the foreground image, or of the image complexity of the background or foreground images. | 08-12-2010 |
20100248788 | METHOD OF DIVIDING SCREEN AREAS AND MOBILE TERMINAL EMPLOYING THE SAME - A method of supporting divided screen areas and a mobile terminal employing the same are disclosed. The method includes: generating input signals for one of sequentially and simultaneously activating a plurality of user functions; activating the user functions according to generated input signals; dividing a screen into divided screen areas that correspond to activated user functions; and outputting functional view areas associated with the activated user functions to the corresponding divided screen areas. | 09-30-2010 |
20120208593 | METHOD FOR CONTROLLING SCREEN OF MOBILE TERMINAL - A method for controlling a screen of a mobile terminal that simultaneously displays a plurality of execution screens is provided. The method preferably includes: displaying a layout composed of a plurality of sections when a magazine creation event is sensed; mapping applications to the plurality of sections in a one-to-one correspondence, respectively to create a magazine; and displaying the magazine, and an execution screen of an application mapped to each of the sections is arranged at the magazine. | 08-16-2012 |
20120287048 | DATA INPUT METHOD AND APPARATUS FOR MOBILE TERMINAL HAVING TOUCHSCREEN - A data input method and apparatus for a mobile terminal having a touchscreen. The data input method includes: displaying, upon activation of a data input menu, a data input field; displaying a completed input zone providing at least one already entered data item and displaying a combination input zone providing numeric and character keys; and entering, when data is selected using one of the completed input zone and the combination input zone, the selected data in the data input field. | 11-15-2012 |
20120287061 | METHOD AND APPARATUS FOR PROVIDING GRAPHIC USER INTERFACE HAVING ITEM DELETING FUNCTION - A method of providing a graphic user interface (GUI) having an item deleting function includes displaying at least one item, detecting a touch position moving operation after a touch input is entered from a user and deleting the at least one item located on a moving path of the touch position moving operation. | 11-15-2012 |
20120304084 | METHOD AND APPARATUS FOR EDITING SCREEN OF MOBILE DEVICE HAVING TOUCH SCREEN - A method and an apparatus for editing a screen of a mobile device having a touch screen. In an idle mode, the mobile device displays an item display region containing at least one item on an idle screen. In an edit mode, the mobile device displays an edit command region containing at least one predetermined edit command on an edit screen. When a first item contained in the item display region is moved to the edit command region, the mobile device executes the predetermined edit command assigned to a moved position of the edit command region. | 11-29-2012 |
20120311608 | METHOD AND APPARATUS FOR PROVIDING MULTI-TASKING INTERFACE - A method and an apparatus for providing a multi-tasking interface of a device such as a portable communication device are provided. The method for providing a multi-tasking interface of a terminal preferably includes: receiving background switch input switching an display of an application being executed in a foreground to a background; switching the display of the application to the background when the background switch input is received; displaying a background control interface; and switching the display of the application to the foreground when preset switch input is received through the background control interface. | 12-06-2012 |
20130300702 | METHOD OF DISPLAYING INFORMATION BY USING TOUCH INPUT IN MOBILE TERMINAL - A method of displaying information in a mobile terminal having a touch screen is provided. The method includes determining whether a touch input is generated by a touch screen, determining whether the touch area moves, calculating a movement direction of the touch area by extracting a value of the touch area movement, determining a current mode according to the calculated movement direction of the touch area, executing a function of the current mode corresponding to the extracted value of the touch area movement, and displaying, while executing the function of the current mode, at least one of a displacement value generated by executing the function of the current mode and a current mode icon indicating the current mode. Accordingly, when displaying information according to a touch input, changes of information may be displayed distinctively, and thereby user convenience may be improved. | 11-14-2013 |
20130332881 | METHOD OF DIVIDING SCREEN AREAS AND MOBILE TERMINAL EMPLOYING THE SAME - A method of supporting divided screen areas and a mobile terminal employing the same are disclosed. The method includes: generating input signals for one of sequentially and simultaneously activating a plurality of user functions; activating the user functions according to generated input signals; dividing a screen into divided screen areas that correspond to activated user functions; and outputting functional view areas associated with the activated user functions to the corresponding divided screen areas. | 12-12-2013 |
20140040822 | MOBILE TERMINAL HAVING TOUCH SCREEN AND FUNCTION CONTROLLING METHOD OF THE SAME - A method for providing a graphical user interface on a display of a device includes: displaying a photograph image on the display of the device; receiving a touch input made on the display; superimposedly displaying a plurality of control guides at a location corresponding to the touch input over the displayed photograph image in response to the touch input; receiving a drag input corresponding to one of the plurality of control guides displayed on the display; adjusting a display characteristic of the photograph image corresponding to the one of the plurality of control guides, in response to the drag input; and displaying the photograph image having the adjusted display characteristic on the display, wherein the display characteristic is a magnification of the photograph image. | 02-06-2014 |
20140096054 | MOBILE TERMINAL HAVING TOUCH SCREEN AND FUNCTION CONTROLLING METHOD OF THE SAME - A method for providing a graphical user interface on a display of a device includes: displaying a photograph image on the display of the device; receiving a touch input made on the display; superimposedly displaying a plurality of control guides at a location corresponding to the touch input over the displayed photograph image in response to the touch input; receiving a drag input corresponding to one of the plurality of control guides displayed on the display; removing the plurality of control guides in response to receiving the drag input; determining a drag characteristic value of the drag; adjusting a display characteristic of the photograph image corresponding to the one of the plurality of control guides based on the drag characteristic value; and displaying the photograph image having the adjusted display characteristic on the display. | 04-03-2014 |
20150058725 | MOBILE TERMINAL HAVING TOUCH SCREEN AND FUNCTION CONTROLLING METHOD OF THE SAME - A method for providing a graphical user interface on a display of a device includes displaying a photograph image on the display of the device, detecting a touch on the display, providing a plurality of control guides at a location corresponding to the touch over the displayed photograph image, in response to detecting the touch, detecting a first drag in a first direction corresponding to a first one of the plurality of control guides provided on the display, removing the plurality of control guides from the display in response to detecting the first drag, detecting a second drag in a second direction different from the first direction of the first drag and corresponding to a second one of the plurality of control guides, the second drag is performed while maintaining touch on the display after the first drag is performed, adjusting a display characteristic of the photograph image corresponding to the second one of the plurality of control guides corresponding to the second drag, and displaying the photograph image having the adjusted display characteristic on the display in response to detecting the second drag. | 02-26-2015 |
Patent application number | Description | Published |
20100214900 | METHOD FOR DELETING DATA OF OPTICAL DISK AND OPTICAL DISK DRIVE INCLUDING OPTICAL DISK EMULATION - Provided are a method and a device for permanently erasing data of an optical disk in an optical disk drive including an optical disk emulation. According to the method, an erase command of data recorded on an optical disk is received and it is determined whether the optical disk is a rewritable optical disk or not. Then, an output power of a laser to be projected is raised when the optical disk is the rewritable optical disk and then the data recorded on the optical disk are erased through an output power of the laser. Furthermore, the optical disk drive includes an optical disk storage unit, a contents memory unit, a disk type determination unit, a laser power adjustor, a pick-up unit, and a controller. | 08-26-2010 |
20100226222 | METHOD FOR EMULATING OPTICAL DISK, OPTICAL DISK DRIVE USING THE SAME, AND OPTICAL DISK INCLUDING SECURITY ZONE - Provided are a method for emulating a separate contents memory unit into an optical disk, an optical disk drive using the same, and an optical disk including a security zone. In the method, when an optical disk processing command from a host is present, whether an optical disk is present in the optical disk drive is judged. When the optical disk is not present in the optical disk drive as a result of the judgment, the contents memory unit is executed as a virtual optical disk. An application stored in the contents memory unit is displayed. The optical disk drive includes an optical disk storage unit, a contents memory unit, and a controller. The optical disk storage unit stores or reproduces contents using an optical disk. The contents memory unit stores contents therein and is executed as a virtual optical disk when the optical disk is not present. The controller controls the optical disk storage unit and the contents memory unit, and controls an access to be made, subject to the contents memory unit. The optical disk includes a fake zone that is accessible by all users without an authentication procedure, and a security zone that is accessible through the authentication procedure. Accordingly, a user can receive and use desired contents using the optical disk drive even when a disk is not present. | 09-09-2010 |
20110035543 | MEMORY DRIVE THAT CAN BE OPERATED LIKE OPTICAL DISK DRIVE AND METHOD FOR VIRTUALIZING MEMORY DRIVE AS OPTICAL DISK DRIVE - The present invention relates to a memory drive that can be virtualized as an optical disk drive and a virtualizing method thereof. One embodiment of the present invention discloses a method for virtualizing a memory drive as an optical disk drive, the memory drive comprising a storage memory and a storage memory controller, which reads or writes data from and to the storage memory. Therefore, according to one embodiment of the present invention, a solid-state which comprises a flash memory and a flash memory controller can be used like an optical disk. | 02-10-2011 |
Patent application number | Description | Published |
20110126877 | SOLAR CELL - A cell includes a substrate of a first conductive type, at least one emitter region of a second conductive type opposite to the first conductive type, and disposed at the substrate, a plurality of first electrodes electrically connected to the at least one emitter region, and at least one second electrode electrically connected to the substrate, wherein the substrate is a silicon substrate of a metallurgical grade. | 06-02-2011 |
20110284067 | PASTE AND SOLAR CELL USING THE SAME - A solar cell is discussed. The solar cell includes a base substrate containing first impurities of a first conductive type and having a textured surface, an emitter layer that is positioned at the textured surface of the base substrate and contains second impurities of a second conductive type different from the first conductive type, and a front electrode electrically connected to the emitter layer. The front electrode collects carriers generated in the base substrate or the emitter layer. At least a portion of the front electrode transmits incident light from the outside. | 11-24-2011 |
20110284069 | SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar cell is discussed. The solar cell includes an anti-reflection unit positioned on an emitter unit and including a first anti-reflection film having a first refractive index and a second anti-reflection film having a second refractive index different from the first refractive index, wherein a plurality of depressions are formed on at least one surface of a substrate, a depth of each of the plurality of depressions is ⅓ to 1 times a distance between centers of at least two immediately adjacent depressions, and a width of each of the plurality of depressions is 1 to 3 times the depth of each of the plurality of depressions. | 11-24-2011 |
20110308608 | SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar includes a substrate of a first conductive type, an emitter region of a second conductive type opposite to the first conductive type and forming a p-n junction with the substrate, a first anti-reflection layer positioned on the emitter region, a first electrode connected to the emitter region, a second anti-reflection layer positioned on the first anti-reflection layer and the first electrode, and a second electrode connected to the substrate. | 12-22-2011 |
20120017981 | SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar cell and a method for manufacturing the solar cell are discussed. The solar cell includes a substrate, an emitter layer formed at an incident surface of the substrate, a first electrode part connected to the emitter layer, and a textured surface positioned on the incident surface of the substrate, at which the emitter layer is formed. The textured surface includes a plurality of depressions. A surface of an area of the substrate, on which the first electrode part is formed, is a flat surface not including the plurality of depressions. | 01-26-2012 |
20120090675 | SEMICONDUCTOR SUBSTRATE FOR SOLAR CELL AND SOLAR CELL - A solar cell include a polycrystalline semiconductor substrate of a p-type, an emitter region of an n-type and forming a p-n junction with the polycrystalline semiconductor substrate, a first electrode connected to the emitter region, and a second electrode connected to the polycrystalline semiconductor substrate, wherein the polycrystalline semiconductor substrate has a pure p-type impurity concentration of substantially 7.2×10 | 04-19-2012 |
20120180861 | SOLAR CELL - A solar cell includes a substrate of a first conductive type, an emitter region, which is positioned at the substrate and is doped with impurities of a second conductive type opposite the first conductive type, a plurality of first electrodes, which are connected to the emitter region and extend parallel to one another to be spaced apart from one another, a plurality of semiconductor electrodes, which extend in a direction different from an extension direction of the plurality of first electrodes to be spaced apart from one another and have an impurity doping concentration higher than the emitter region, and a second electrode connected to the substrate. A distance between two adjacent semiconductor electrodes is about | 07-19-2012 |
20120184063 | METHOD FOR MANUFACTURING SOLAR CELL - A method for manufacturing a solar cell includes forming an impurity doped region of a second conductive type at a substrate of a first conductive type, sequentially irradiating laser shots onto the impurity doped region of the substrate to form an emitter part including a first emitter region having a first sheet resistance and a second emitter region having a second sheet resistance less than the first sheet resistance, and forming a plurality of first electrodes connected to the second emitter region and forming a second electrode connected to the substrate. | 07-19-2012 |
20120192942 | SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar cell and a method for manufacturing the same are discussed. The solar cell includes a semiconductor substrate containing first impurities of a first conductive type, an anti-reflection layer which is positioned on the semiconductor substrate and has a fixed charge of the first conductive type, an ohmic contact region in which second impurities of a second conductive type different from the first conductive type of the first impurities of the semiconductor substrate are selectively positioned at the semiconductor substrate, a plurality of first electrodes which are positioned on the ohmic contact region and are connected to the ohmic contact region, and a second electrode connected to the semiconductor substrate. | 08-02-2012 |
20130025656 | SOLAR CELL - A solar cell includes a substrate of a first conductive type, an emitter region of a second conductive type opposite the first conductive type and which forms a p-n junction along with the substrate, an anti-reflection layer positioned on the emitter region, a front electrode part electrically connected to the emitter region, and a back electrode part electrically connected to the substrate. The substrate includes a first area formed of single crystal silicon and a second area formed of polycrystalline silicon. A thickness of the anti-reflection layer positioned in the first area is less than a thickness of the anti-reflection layer positioned in the second area. | 01-31-2013 |
20140041720 | SOLAR CELL - A solar cell includes a substrate, an emitter region positioned at a first surface of the substrate, a first electrode positioned on the first surface of the substrate, a back passivation layer positioned on a second surface opposite the first surface of the substrate, and a second electrode which is positioned on the back passivation layer and is electrically connected to the substrate through holes of the back passivation layer. The second electrode includes connection electrodes positioned inside the holes of the back passivation layer and a back electrode layer positioned on the connection electrodes and the back passivation layer. An adhesion enhanced layer is positioned between the back electrode layer and the back passivation layer and contains at least one of intrinsic amorphous silicon and intrinsic microcrystalline silicon. | 02-13-2014 |
20140196777 | SOLAR CELL AND METHOD FOR MANUFACTURING THE SAME - A solar cell and a method for manufacturing the solar cell are discussed. An embodiment of the method includes forming an emitter region containing impurities of a second conductive type opposite a first conductive type at a back surface of a semiconductor substrate containing impurities of the first conductive type, forming a passivation layer paste containing impurities of the first conductive type on the emitter region, selectively performing a thermal process on a first partial area of the passivation layer paste to form a back surface field region containing impurities of the first conductive type at a partial area of the emitter region, forming a plurality of openings in partial areas of the passivation layer paste to form a passivation layer, forming a first electrode connected to the emitter region, and forming a second electrode connected to the back surface field region. | 07-17-2014 |
20140251424 | SOLAR CELL - A solar cell is disclosed. The solar cell includes a semiconductor substrate, a conductive region formed at the semiconductor substrate and having a conductive type identical to or different from that of the semiconductor substrate, a passivation film formed on the semiconductor substrate so as to cover the conductive region, and an electrode electrically connected to at least one of the semiconductor substrate and the conductive region. The passivation film includes a first layer formed on the conductive region and including silicon oxide, a second layer formed on the first layer and including an oxide having a negative charge, and a third layer formed on the second layer and having an index of refraction different from that of the second layer. | 09-11-2014 |
Patent application number | Description | Published |
20100052041 | Nonvolatile Memory Devices Having Charge-Trap Layers Therein with Relatively High Election Affinity - Provided is a nonvolatile memory device. The nonvolatile memory device may include a tunnel insulating layer on a semiconductor substrate; a charge trap layer disposed on the tunnel insulating layer and having an electron affinity greater than a silicon nitride layer; a barrier insulating layer on the charge trap layer; a blocking insulating layer on the barrier insulating layer; and a gate electrode on the blocking insulating layer. An electron affinity of the barrier insulating layer is smaller than an electron affinity of the blocking insulating layer. | 03-04-2010 |
20110049610 | NONVOLATILE MEMORY DEVICE AND METHOD OF FORMING THE SAME - Provided are a nonvolatile memory device and a method of forming the same. The nonvolatile memory device includes: a semiconductor substrate including a device isolation layer defining an active region; a tunnel insulating layer on the active region; a charge trapping layer on the tunnel insulating layer; a blocking insulating layer on the charge trapping layer and the device isolation layer; a gate electrode on the blocking insulating layer; and a barrier capping layer formed between the device isolation layer and the blocking insulating layer. | 03-03-2011 |
20110303971 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME - A method for manufacturing a three-dimensional semiconductor memory includes forming a plurality of stacked structures disposed on a substrate to be spaced apart from each other, each of the stacked structures including a plurality of dielectric patterns and a plurality of polysilicon patterns alternately stacked, forming a metal layer to cover sidewalls of the stacked structures and a top surface of the substrate exposed between the stacked structures, and forming stacked gate electrodes on the substrate and a conductive line in the substrate by performing a silicidation process between the metal layer and each of the polysilicon patterns and the substrate. | 12-15-2011 |
20120001345 | THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a three dimensional semiconductor device. The device may include mold layers vertically and sequentially stacked, a conductive pattern between the stacked mold layers, a plugging pattern vertically penetrating the stacked mold layers, an intermediate pattern between the conductive pattern and the plugging pattern, and protective layer patterns between the mold layers and the plugging pattern, wherein the protective layer patterns are separated by the intermediate pattern. | 01-05-2012 |
20120104485 | Nonvolatile Memory Devices And Methods Of Manufacturing The Same - A method of manufacturing a nonvolatile memory device includes forming a tunnel dielectric layer, a charge storage layer, and a hard mask layer on a substrate in sequential order. Active portions are defined by forming trenches in the substrate. A tunnel dielectric pattern, a preliminary charge storage pattern, and a hard mask pattern are formed on each of the active portions in sequential order by sequentially patterning the hard mask layer, the charge storage layer, the tunnel dielectric layer, and the substrate. A capping pattern is formed covering an upper surface of the trenches such that a first void remains in a lower portion of the trenches, the capping pattern including etch particles formed by etching the hard mask pattern through a sputtering etch process. | 05-03-2012 |
20130056817 | SEMICONDUCTOR DEVICES INCLUDING DEVICE ISOLATION STRUCTURES AND METHOD OF FORMING THE SAME - Provided are semiconductor devices and methods of forming the same. A device isolation structure in the semiconductor device includes a gap region. A dielectric constant of a vacuum or an air in the gap region is smaller than a dielectric constant of an oxide layer and, as a result coupling and attendant interference between adjacent cells may be reduced. | 03-07-2013 |
20130134492 | SEMICONDUCTOR MEMORY DEVICES AND METHODS FOR FABRICATING THE SAME - Example embodiments of inventive concepts relate to semiconductor memory devices and/or methods for fabricating the same. The semiconductor memory device may include a plurality of gates vertically stacked on a substrate, a vertical channel penetrating the plurality of gates and a data storage layer between the vertical channel and the plurality of gates. The vertical channel may include a lower channel connected to the substrate and an upper channel on the lower channel. The upper channel may include a vertical pattern penetrating some of the plurality of gates and defining an inner space filled with an insulating layer, and a horizontal pattern horizontally extending along a top surface of the lower channel. The horizontal pattern may be in contact with the top surface of the lower channel. | 05-30-2013 |
20130146961 | THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a three dimensional semiconductor device. The device may include mold layers vertically and sequentially stacked, a conductive pattern between the stacked mold layers, a plugging pattern vertically penetrating the stacked mold layers, an intermediate pattern between the conductive pattern and the plugging pattern, and protective layer patterns between the mold layers and the plugging pattern, wherein the protective layer patterns are separated by the intermediate pattern. | 06-13-2013 |
20130270625 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME - A three-dimensional (3D) semiconductor memory device includes a stack structure, a channel structure, and a vertical insulator. The stack structure includes gate patterns and insulating patterns which are alternately and repeatedly stacked on a substrate. A channel structure penetrates the stack structure and is connected to the substrate. A vertical insulator includes a high-k dielectric layer. The vertical insulator is covered by the channel structure and the high-k dielectric pattern of the vertical insulator is in contact with the gate patterns. | 10-17-2013 |
20130313631 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS FOR MANUFACTURING SAME - A three-dimensional (3D) nonvolatile memory device includes a vertical stack of nonvolatile memory cells on a substrate having a region of first conductivity type therein. A dopant region of second conductivity type is provided in the substrate. This dopant region forms a P—N rectifying junction with the region of first conductivity type and has a concave upper surface that is recessed relative to an upper surface of the substrate upon which the vertical stack of nonvolatile memory cells extends. An electrically insulating electrode separating pattern is provided, which extends through the vertical stack of nonvolatile memory cells and into the recess in the dopant region of second conductivity type. | 11-28-2013 |
20140035026 | SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME - A semiconductor memory device and a method of fabricating the same. The device includes a plurality of gates vertically stacked on a top surface of a substrate with an epitaxial layer formed in the substrate, a vertical channel vertically penetrating the gates to be electrically connected to the epitaxial layer, and a memory layer provided between the vertical channel and the gates. The epitaxial layer has a top surface positioned at a level between a bottom surface of the lowermost one of the gates and the top surface of the substrate. | 02-06-2014 |
20140070302 | THREE-DIMENSIONAL SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR FABRICATING THE SAME - A three-dimensional (3D) semiconductor memory device and a method for fabricating the same, the device including insulating layers stacked on a substrate; horizontal structures between the insulating layers, the horizontal structures including gate electrodes, respectively; vertical structures penetrating the insulating layers and the horizontal structures, the vertical structures including semiconductor pillars, respectively; and epitaxial patterns, each of the epitaxial patterns being between the substrate and each of the vertical structures, wherein a minimum width of the epitaxial pattern is less than a width of a corresponding one of the vertical structures. | 03-13-2014 |
20140357223 | METHOD OF PROVIDING MOBILE BILL AND SERVER FOR PERFORMING THE SAME - A mobile bill providing server receives bill details for a particular user from a mobile bill issuing server and provides a mobile bill to a mobile terminal available for installation of a bill viewer, the mobile bill being dependent upon the bill viewer. A mobile bill providing method includes searching for the mobile terminal associated with the particular user and determining whether the bill viewer has been installed in the mobile terminal. If the bill viewer has not been installed in the mobile terminal, the method includes transmitting an electronic bill independent of the bill viewer and guidance information for installation of the bill viewer to the mobile terminal, waiting for a period of time until the bill viewer is installed in the mobile terminal, and when the bill viewer is installed, transmitting the mobile bill to the mobile terminal. | 12-04-2014 |
Patent application number | Description | Published |
20080246078 | Charge trap flash memory device and memory card and system including the same - A charge trap flash memory device and method of making same are provided. The device includes: a tunnel insulating layer, a charge trap layer; a blocking insulating layer; and a gate electrode sequentially formed on a substrate. The charge trap layer includes: plural trap layers comprising a first material having a first band gap energy level; spaced apart nanodots, each nanodot being at least partially surrounded by at least one of the trap layers, wherein the nanodots comprise a second material having a second band gap energy level that is lower than the first band gap energy level; and an intermediate blocking layer comprising a third material having a third band gap energy level that is higher than the first band gap energy level, formed between at least two of the trap layers. This structure prevents loss of charges from the charge trap layer and improves charge storage capacity. | 10-09-2008 |
20090239367 | Nonvolatile memory device and method of fabricating the same - A method of fabricating a nonvolatile memory device includes forming a tunnel insulating layer on a semiconductor substrate, forming a charge storage layer on the tunnel insulating layer, forming a dielectric layer on the charge storage layer, the dielectric layer including a first aluminum oxide layer, a silicon oxide layer, and a second aluminum oxide layer sequentially stacked on the charge storage layer, and forming a gate electrode on the dielectric layer, the gate electrode directly contacting the second aluminum oxide layer of the dielectric layer. | 09-24-2009 |
20100210116 | METHODS OF FORMING VAPOR THIN FILMS AND SEMICONDUCTOR INTEGRATED CIRCUIT DEVICES INCLUDING THE SAME - A method of forming a vapor thin film is provided, which includes loading a substrate into a chamber, adsorbing a source gas on the substrate by supplying the source gas into the chamber, and forming the thin film on the substrate by supplying a reaction gas into the chamber, wherein the forming of the thin film on the substrate is proceeded under an electric field formed in one direction on the substrate by applying a bias to the substrate. | 08-19-2010 |
20100240207 | METHODS OF MANUFACTURING CHARGE TRAP TYPE MEMORY DEVICES - Manufacturing of a charge trap type memory device can include forming a tunnel insulating layer on a substrate. A charge-trapping layer can be formed on the tunnel insulating layer. A blocking layer can be formed on the charge-trapping layer. Gate electrodes can be formed on the blocking layer and divided by a trench. A portion of the charge-trapping layer aligned with the trench may be converted into a charge-blocking pattern with a vertical side profile by an anisotropic oxidation process. | 09-23-2010 |
20110165750 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES INCLUDING STRUCTURES - In methods of manufacturing a semiconductor device, a plurality of gate structures spaced apart from each other and oxide layer patterns. A sputtering process using the oxide layer patterns as a sputtering target to connect the oxide layer patterns on the adjacent gate structures to each other is performed, so that a gap is formed between the gate structures. A volume of the gap is formed uniformly to have desired volume by controlling a thickness of the oxide layer patterns. | 07-07-2011 |
20110281379 | METHODS OF FORMING CONDUCTIVE LAYER PATTERNS USING GAS PHASE CLEANING PROCESS AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES - Methods of forming conductive patterns include forming a conductive layer including a metal element on a substrate. The conductive layer is partially etched to generate a residue including an oxide of the metal element and to form a plurality of separately formed conductive layer patterns. A cleaning gas is inflowed onto the substrate including the conductive layer pattern. The metal compound is evaporated to remove the metal element contained in the residue and to form an insulating interface layer on the conductive layer pattern and a surface portion of the substrate through a reaction of a portion of the cleaning gas and oxygen. The residue may be removed from the conductive layer pattern to suppress generation of a leakage current. | 11-17-2011 |
20110300686 | Methods of Fabricating Non-Volatile Memory Devices - Methods of forming non-volatile memory devices include forming a semiconductor layer having a first impurity region of first conductivity type extending adjacent a first side thereof and a second impurity region of second conductivity type extending adjacent a second side thereof, on a substrate. A first electrically conductive layer is also provided, which is electrically coupled to the first impurity region. The semiconductor layer is converted into a plurality of semiconductor diodes having respective first terminals electrically coupled to the first electrically conductive layer. The first electrically conductive layer operates as a word line or bit line of the non-volatile memory device. The converting may include patterning the first impurity region into a plurality of cathodes or anodes of the plurality of semiconductor diodes (e.g., P-i-N diodes). | 12-08-2011 |
20120001264 | ETCHANTS AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES USING THE SAME - Provided according to embodiments of the present invention are methods of fabricating semiconductor devices using an etchant. In some embodiments, the etchant may be highly selective and may act to reduce interference between wordlines in the semiconductor device. In some embodiments of the invention, provided are methods of fabricating a semiconductor device that include forming a plurality of gate patterns on a substrate; forming first insulation layers between the gate patterns; wet-etching the first insulation layers to form first insulation layer residues; and forming air gaps between the plurality of gate patterns. Related etchant solutions and semiconductor devices are also provided. | 01-05-2012 |
20120064707 | METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES - A semiconductor device includes gate structures including a tunnel insulating layer pattern, a floating gate, a dielectric layer pattern and a control gate sequentially disposed on a substrate. The control gate includes an impurity doped polysilicon layer pattern and a metal layer pattern. The gate structures are spaced apart from each other on the substrate. A capping layer pattern is disposed on a sidewall portion of the metal layer pattern and includes a metal oxide. An insulating layer covers the gate structures and the capping layer pattern. The insulating layer is formed on the substrate and includes an air-gap therein. | 03-15-2012 |
20120267702 | VERTICAL MEMORY DEVICES AND METHODS OF MANUFACTURING THE SAME - A device includes a first GSL, a plurality of first word lines, a first SSL, a plurality of first insulation layer patterns, and a first channel. The first GSL, the first word lines, and the first SSL are spaced apart from each other on a substrate in a first direction perpendicular to a top surface of a substrate. The first insulation layer patterns are between the first GSL, the first word lines and the first SSL. The first channel on the top surface of the substrate extends in the first direction through the first GSL, the first word lines, the first SSL, and the first insulation layer patterns, and has a thickness thinner at a portion thereof adjacent to the first SSL than at portions thereof adjacent to the first insulation layer patterns. | 10-25-2012 |
20120276702 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes forming a channel region, forming a buffer layer on the channel region, and heat-treating the channel region by using a gas containing halogen atoms. | 11-01-2012 |
20140054676 | VERTICAL TYPE SEMICONDUCTOR DEVICES INCLUDING OXIDATION TARGET LAYERS - A vertical type semiconductor device can include a vertical pillar structure that includes a channel pattern with an outer wall. Horizontal insulating structures can be vertically spaced apart from one another along the vertical pillar structure to define first vertical gaps therebetween at first locations away from the outer wall and to define second vertical gaps therebetween at the outer wall, where the second vertical gaps are wider than the first vertical gaps. Horizontal wordline structures can be conformally located in the first and second vertical gaps between the vertically spaced apart horizontal insulating structures, so that the horizontal wordline structures can be vertically thinner across the first vertical gaps than across the second vertical gaps. | 02-27-2014 |
20140322832 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE - According to example embodiments of inventive concepts, a method of fabricating a semiconductor device includes: forming a preliminary stack structure, the preliminary stack structure defining a through hole; forming a protection layer and a dielectric layer in the through hole; forming a channel pattern, a gapfill pattern, and a contact pattern in the through hole; forming an offset oxide on the preliminary stack structure; measuring thickness data of the offset oxide; and scanning the offset oxide using a reactive gas cluster ion beam. The scanning the offset oxide includes setting a scan speed based on the measured thickness data of the offset oxide, and forming a gas cluster. | 10-30-2014 |
20140332875 | VERTICAL MEMORY DEVICES AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a vertical memory device is disclosed. In the method, a plurality of insulation layers and a plurality of first sacrificial layers are alternately stacked on a substrate. A plurality of holes is formed through the plurality of insulation layers and first sacrificial layers. A plasma treatment process is performed to oxidize the first sacrificial layers exposed by the holes. A plurality of second sacrificial layer patterns project from sidewalls of the holes. A blocking layer pattern, a charge storage layer pattern and a tunnel insulation layer pattern are formed on the sidewall of the holes that cover the second sacrificial layer patterns. A plurality of channels is formed to fill the holes. The first sacrificial layers and the second sacrificial layer patterns are removed to form a plurality of gaps exposing a sidewall of the blocking layer pattern. A plurality of gate electrodes is formed to fill the gaps. | 11-13-2014 |
Patent application number | Description | Published |
20100178754 | METHOD OF MANUFACTURING CMOS TRANSISTOR - A method of manufacturing a complementary metal-oxide semiconductor (CMOS) transistor includes: forming a semiconductor layer in which an n-MOS transistor region and a p-MOS transistor region are defined; forming an insulation layer on the semiconductor layer; forming a conductive layer on the insulation layer; forming a mask pattern exposing the n-MOS transistor region, on the conductive layer; generating a damage region in an upper portion of the conductive layer by implanting impurities in the conductive layer of the n-MOS transistor region using the mask pattern as a mask; removing the mask pattern; removing the damage region; and patterning the conductive layer to form an n-MOS transistor gate and a p-MOS transistor gate. Accordingly, gate thinning and formation of a step between the n-MOS transistor region gate and the p-MOS transistor region gate can be prevented. | 07-15-2010 |
20110136290 | ETCHING METHODS AND METHODS OF MANUFACTURING A CMOS IMAGE SENSOR USING THE SAME - In an etching method, a thin layer is formed on a first surface of a first substrate doped with first impurities having a first doping concentration. The thin layer is doped with second impurities having a second doping concentration lower than the first doping concentration. A second substrate is formed on the thin layer. A second surface of the first substrate is polished. The polished first substrate is cleaned using a cleaning solution including ammonia and deionized water. The cleaned first substrate is etched to expose the thin layer. | 06-09-2011 |
20120248525 | THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME - Three dimensional semiconductor memory devices and methods of fabricating the same are provided. According to the method, sacrificial layers and insulating layers are alternately and repeatedly stacked on a substrate, and a cutting region penetrating an uppermost sacrificial layer of the sacrificial layers is formed. The cutting region is filled with a non sacrificial layer. The insulating layers and the sacrificial layers are patterned to form a mold pattern. The mold pattern includes insulating patterns, sacrificial patterns, and the non sacrificial layer in the cutting region. The sacrificial patterns may be replaced with electrodes. The related semiconductor memory device is also provided. | 10-04-2012 |
20130134493 | VERTICAL CHANNEL MEMORY DEVICES WITH NONUNIFORM GATE ELECTRODES - A mold stack including alternating insulation layers and sacrificial layers is formed on a substrate. Vertical channel regions extending through the insulation layers and sacrificial layers of the mold stack are formed. Gate electrodes are formed between adjacent ones of the insulation layers and surrounding the vertical channel regions. The gate electrodes have a greater thickness at a first location near sidewalls of the insulation layers than at a second location further away from the sidewalls of the insulation layers. | 05-30-2013 |
20130171788 | NON-VOLATILE MEMORY DEVICE HAVING VERTICAL STRUCTURE AND METHOD OF MANUFACTURING THE SAME - According to an example embodiment, a non-volatile memory device includes a semiconductor layer pattern on a substrate, a plurality of gate patterns and a plurality of interlayer insulating layer patterns that are alternately stacked along a side wall of the semiconductor layer pattern, and a storage structure between the plurality of gate patterns and the semiconductor layer pattern. The semiconductor layer pattern extends in a vertical direction from the substrate. The gate patterns are recessed in a direction from a side wall of the interlayer insulating layer patterns opposing the side wall of the semiconductor layer pattern. A recessed surface of the gate patterns may be formed to be vertical to a surface of the substrate. | 07-04-2013 |
20130183824 | METHOD OF FABRICATING A SEMICONDUCTOR DEVICE - A method of fabricating a semiconductor device includes forming a first layer including a first metal, forming a second layer including a second metal, the second layer being adjacent to the first layer, polishing top surfaces of the first and second layers, and cleaning the first and second layers using a cleaning solution. The cleaning solution may include an etching solution etching the first and second layers and an inhibitor suppressing the second layer from being over etched. | 07-18-2013 |
20140004676 | VERTICAL CHANNEL MEMORY DEVICES WITH NONUNIFORM GATE ELECTRODES AND METHODS OF FABRICATING THE SAME | 01-02-2014 |
Patent application number | Description | Published |
20090125781 | APPARATUS AND METHOD FOR TRANSMITTING AND RECEIVING DATA IN A COMMUNICATION SYSTEM USING LOW DENSITY PARITY CHECK CODE - A method for transmitting data in a communication system using a Low Density Parity Check (LDPC) matrix includes generating an LDPC codeword by encoding information data bits, interleaving the LDPC codeword, mapping the interleaved LDPC codeword to a modulation signal, and generating a mapped signal by mapping the LDPC codeword bits separately to a bit corresponding to a real part and a bit corresponding to an imaginary part of said modulation signal, among bits constituting the modulation signal, generating a modulation signal by high-order-modulating the mapped signal and Radio Frequency (RF)-processing the modulation signal, and transmitting the RF-processed signal via a transmission antenna. | 05-14-2009 |
20090158129 | METHOD AND APPARATUS FOR ENCODING AND DECODING CHANNEL IN A COMMUNICATION SYSTEM USING LOW-DENSITY PARITY-CHECK CODES - A method for encoding a channel in a communication system using a Low-Density Parity-Check (LDPC) code. The method includes generating a plurality of column groups by grouping (categorizing) columns corresponding to an information word in a parity-check matrix of the LDPC code, and ordering the column groups; determining a range of an information word desired to be obtained by performing shortening; based on the determined range of the information word, performing column group-by-column group shortening on the column groups in order according to a predetermined shortening pattern; and LDPC encoding the shortened information word. | 06-18-2009 |
20090210767 | APPARATUS AND METHOD FOR ENCODING AND DECODING CHANNEL IN A COMMUNICATION SYSTEM USING LOW-DENSITY PARITY-CHECK CODES - An apparatus and method for generating a parity-check matrix of a Low-Density Parity-Check (LDPC) code are provided. Parameters for designing the LDPC code are determined, and a first parity-check matrix of a quasi-cyclic LDPC code is formed according to the determined parameters. A second parity-check matrix is created through the elimination of a predetermined portion of a parity part in the first parity-check matrix, and a third parity-check matrix is created by rearranging the second parity-check matrix. | 08-20-2009 |
20090217129 | METHOD AND APPARATUS FOR CHANNEL ENCODING AND DECODING IN A COMMUNICATION SYSTEM USING LOW-DENSITY-PARITY-CHECK CODES - A method and apparatus for encoding and decoding a channel in a communication system using a Low-Density Parity-Check (LDPC) code. The encoding method includes determining a modulation scheme for transmitting a symbol; determining a shortening pattern in consideration of the determined modulation scheme; grouping columns corresponding to an information word in a parity-check matrix of the LDPC code into a plurality of column groups; ordering the column groups; determining a range of a resulting information word desired to be obtained by shortening the information word; based on the range of the resulting information word, performing column group-by-column group shortening on the ordered column groups of the information word, according to the determined shortening pattern; and LDPC-encoding the shortened information word. | 08-27-2009 |
20090217130 | METHOD AND APPARATUS FOR CHANNEL ENCODING AND DECODING IN A COMMUNICATION SYSTEM USING LOW-DENSITY PARITY-CHECK CODES - A method for encoding a channel in a communication system using a Low-Density Parity-Check (LDPC) code is provided. The method includes determining a number of parity bits for puncturing; dividing the parity bits at predetermined intervals, and determining a number of puncturing parity bits, which are subjected to puncturing within the predetermined intervals; determining a modulation scheme; determining positions of puncturing parity bits corresponding to the determined number of the puncturing parity bits within the predetermined intervals according to the modulation scheme; repeatedly performing puncturing on puncturing parity bits corresponding to the determined positions at the predetermined intervals; and transmitting remaining bits except for the punctured bits according to the modulation scheme. | 08-27-2009 |
20110274202 | APPARATUS AND METHOD FOR CHANNEL CODING IN A COMMUNICATION SYSTEM - A method for channel coding by a transmitter in a communication system is provided. The method includes determining a degree of coded bits of a Luby-Transform (LT) code based on a coding rate of a pre-code and the number of coded bits of the LT code, selecting at least one associated bit used for coding of the coded bits of the LT code from among information bits of the LT code, depending on the determined degree, and generating the coded bits of the LT code by applying a coding function to the selected associated bits. | 11-10-2011 |
20110280351 | APPARATUS AND METHOD FOR COMPENSATING FOR PHASE NOISE IN A RECEIVER SUPPORTING OFDM - An apparatus and method for compensating for phase noise in a receiver supporting Orthogonal Frequency Division Multiplexing (OFDM) by receiving a frequency-domain recovered signal and a time-domain received signal, estimating an average phase noise for each of the partial blocks of the signals, calculating an overall average phase noise using the average phase noises of the partial blocks, and removing the phase noise from the time-domain received signal using the calculated total average phase noise. | 11-17-2011 |
Patent application number | Description | Published |
20090315450 | Organic light emitting display device and method for fabricating the same - An OLED device and a method for fabricating the same are disclosed, capable of improving yield and preventing decomposition of organic layers by moisture. An organic passivation layer having excellent morphology is applied to prevent a short circuit between an anode electrode and a cathode electrode. A Ca layer is applied to remove moisture from the inside of the device, thereby increasing the lifespan of the device. Accordingly, generation of dark sports by the short circuit caused by protrusions on a poor-morphology layer can be prevented. In addition, moisture absorbent layers are formed between the passivation layers and the partitions to remove outside moisture and the moisture outgassed from the inside, that is, partitions and organic layers, thereby elongating the lifespan of the OLED device. | 12-24-2009 |
20100309172 | Organic electroluminescent display device and method of fabricating the same - A top emission type organic electroluminescent display device includes a first substrate including a pixel region, a switching thin film transistor and a driving thin film transistor in the pixel region on the first substrate, a passivation layer covering the switching thin film transistor and the driving thin film transistor and exposing a drain electrode of the driving thin film transistor, a first electrode on the passivation layer and connected to the drain electrode of the driving thin film transistor, a buffer pattern in a border of the pixel region and overlapping an edge of the first electrode, a first spacer on the buffer pattern along a first direction, the first spacer having a first thickness and a dam shape, a second spacer on the buffer pattern along a second direction, the second spacer having a second thickness and a dam shape, a third spacer on the buffer pattern at a crossing portion of the first and second spacers, the third spacer having a third thickness and a columnar shape, wherein the third thickness is thicker than the first thickness or the second thickness, an organic emission layer on the first electrode between adjacent buffer patterns, a second electrode on the organic emission layer and the first, second and third spacers, a second substrate facing the first substrate, and a seal pattern between peripheries of the first and second substrates. | 12-09-2010 |
20110012506 | ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - A method for fabricating an organic electroluminescent display device including the steps of preparing first and second substrates, forming an organic electroluminescent display on the first substrate, forming a first etching mask film on an upper surface of the second substrate, forming a second etching mask film on a lower surface of the second substrate, performing a first etching process on the upper surface of the second substrate, forming a third etching mask film on an etched portion of the second surface of the glass substrate, performing a second etching process on the upper surface of the second substrate to form a plurality of grooves on the upper surface of the second substrate, removing the first and second etching mask films, the second etching film remaining on the etched portion of the second surface of the glass substrate, and encapsulating the organic electroluminescent display between the first and second substrates. | 01-20-2011 |
20120064641 | METHOD OF FABRICATING ARRAY SUBSTRATE FOR ORGANIC ELECTROLUMINESCENT DEVICE AND METHOD OF REPAIRING THE SAME - A method of fabricating an organic electroluminescent device (OELD) according to the present invention has steps of repairing a pixel region by irradiating a laser on a drain contact hole of a passivation layer in a pixel region in need of the repair; and disabling the connection between an organic electroluminescent diode and a drain electrode of a driving thin film transistor (TFT), where the pixel region of the OELD has i) the driving TFT comprising the drain electrode, ii) the passivation layer covering the driving TFT, while comprising the drain contact hole exposing the drain electrode of the driving TFT, and iii) the organic electroluminescent diode connected to the drain electrode of the driving TFT via the drain contact hole. | 03-15-2012 |
20120286655 | ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - A method for fabricating an organic electroluminescent display device including the steps of preparing first and second substrates, forming an organic electroluminescent display on the first substrate, forming a first etching mask film on an upper surface of the second substrate, forming a second etching mask film on a lower surface of the second substrate, performing a first etching process on the upper surface of the second substrate, forming a third etching mask film on an etched portion of the second surface of the glass substrate, performing a second etching process on the upper surface of the second substrate to form a plurality of grooves on the upper surface of the second substrate, removing the first and second etching mask films, the second etching film remaining on the etched portion of the second surface of the glass substrate, and encapsulating the organic electroluminescent display between the first and second substrates. | 11-15-2012 |
20140131695 | ORGANIC ELECTROLUMINESCENT DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME - A top emission type organic electroluminescent display device includes a first substrate including a pixel region, a switching thin film transistor and a driving thin film transistor in the pixel region on the first substrate, a passivation layer covering the switching thin film transistor and the driving thin film transistor and exposing a drain electrode of the driving thin film transistor, a first electrode on the passivation layer and connected to the drain electrode of the driving thin film transistor, a buffer pattern in a border of the pixel region and overlapping an edge of the first electrode, a first spacer on the buffer pattern along a first direction, the first spacer having a first thickness and a dam shape, a second spacer on the buffer pattern along a second direction, the second spacer having a second thickness and a dam shape, a third spacer on the buffer pattern at a crossing portion of the first and second spacers, the third spacer having a third thickness and a columnar shape, wherein the third thickness is thicker than the first thickness or the second thickness, an organic emission layer on the first electrode between adjacent buffer patterns, a second electrode on the organic emission layer and the first, second and third spacers, a second substrate facing the first substrate, and a seal pattern between peripheries of the first and second substrates. | 05-15-2014 |
Patent application number | Description | Published |
20110122403 | INSPECTION METHOD FOR BONDED WAFER USING LASER - Provided is a bonded wafer inspection method using a laser method allowing a simple and reliable test in an examination of a bonded wafer interface using a laser. To do this, a laser used bonded wafer inspection method includes, emitting a laser beam through a laser means, diffusing the emitted laser beam by a laser diffusion means, illuminating the diffused laser beam on a bonded wafer, and detecting a laser beam illuminated and transmitted at the bonded wafer using a detecting means. In a case a bonded wafer inspection method using a laser of the invention is used, defects by a foreign substance occurring at an interface of a bonded wafer is can be examined in a simple way and thus high work performance may be expected. | 05-26-2011 |
20110287529 | Syringe-Shaped Culture Tube and Cell Culture Apparatus Using Same - Disclosed are a syringe-shaped culture tube which has a wide surface area and is changeable by a user to a desired size, and a cell culture apparatus in which a plurality of the culture tubes are mounted. The cell culture apparatus allows a culture medium to constantly and smoothly contact the entire inner circumference of the culture tube and rotate by a rotation unit at a preset speed when the culture tube is filled with the culture medium. Thus, the cell culture apparatus can promote stirring and gas supply and increase the gas exchange rate. Also, it can reduce consumption of the culture medium. | 11-24-2011 |
20120314212 | INSPECTION DEVICE FOR BONDED WAFER USING LASER - Disclosed is a device for inspecting a bonded wafer using laser, which has a simple structure to facilitate an operation of the device and can detect an interface defect of the bonded wafer economically and highly reliably. To this end, the device for inspecting the bonded wafer using laser includes a laser unit, a laser diffusion unit, and a detection unit. If the device of inspecting the bonded wafer using laser according to the present invention is used, it is possible to advantageously inspect a wafer interface at a magnification desired by an inspector. In addition, the device has a simple structure, and thus it is advantageously easy to operate the device. | 12-13-2012 |
Patent application number | Description | Published |
20090040955 | Method for Adaptive Discontinuous Reception Based On Extented Paging Indicator for Improvement of Power Effective Performance at Mobile Terminal on WCDMA - An extended paging indicator-based adaptive discontinuous reception method is proposed so as to improve a power saving performance of a terminal in an asynchronous wideband code division multiple access schemes. To this end, a plurality of terminals for performing power saving receive an extended paging indicator for a discontinuous reception cycle, conform a type of a bit Run for configuring the extended paging indicator, and change the discontinuous reception period. In addition, the terminals set the discontinuous reception period update factor value to be varied according to the extended paging indicator as an initial value so as to determine a next paging occasion block, change the discontinuous reception period update factor value according to the paging indicator of the bit Run received from base station, and change the discontinuous reception period according to the variance of the discontinuous reception period update factor value. The extended paging indicator-based adaptive discontinuous reception method may improve transmission time delay and transmission failure probability performances for packet reception as well as a power saving performance in comparison with a conventional fixed discontinuous reception method. | 02-12-2009 |
20130016672 | APPARATUS AND METHOD OF AVOIDING CONTROL CHANNEL BLOCKING - The present invention is directed to a wireless communication system. In particular, the present invention is directed to a method of processing a control channel at a user equipment in a wireless communication system using multiple carriers, the method comprising: receiving a plurality of search spaces, wherein each search space comprises a plurality of control channel candidates and each search space is corresponding to respective carrier; and monitoring the control channel candidates for the control channel, wherein if the control channel candidates have a common information size over two or more search spaces, the control channel can be received via any one of the two or more the search spaces, and an apparatus therefore. | 01-17-2013 |
20140119302 | METHOD AND APPARATUS FOR TRANSMITTING UPLINK SIGNAL - A method and device for transmitting an uplink signal in a wireless communication system is provided. A user equipment transmits a physical uplink shared channel (PUSCH) on a SRS subframe for a first serving cell to a base station if a SRS transmission on the SRS subframe for the first serving cell is overlapped with an uplink transmission for a second serving cell. The PUSCH is transmitted on remaining orthogonal frequency division multiplexing (OFDM) symbols in the SRS subframe except a single OFDM symbol reserved for the SRS transmission regardless of whether a SRS is transmitted on the single OFDM symbol or not. | 05-01-2014 |
Patent application number | Description | Published |
20080219547 | METHOD OF ANALYZING A WAFER SAMPLE - In a method of analyzing a wafer sample, a first defect of a photoresist pattern on the wafer sample having shot regions exposed with related exposure conditions is detected. A first portion of the pattern includes the shot regions exposed with an exposure condition corresponding to a reference exposure condition and a tolerance error range of the reference exposure condition. The first defect repeatedly existing in at least two of the shot regions in a second portion of the pattern is set up as a second defect of the pattern. A first reference image displaying the second defect is obtained. The first defect of the shot regions in the first portion corresponding to the second defect is set up as a third defect corresponding to weak points of the pattern. The exposure conditions of the shot region having no weak points are set up as an exposure margin of an exposure process. | 09-11-2008 |
20090219520 | APPARATUS AND METHOD FOR INSPECTING A SURFACE OF A WAFER - A surface inspection apparatus and method increase wafer productivity, wherein to increase an efficiency of the surface inspection apparatus to detect defects during a scanning of the wafer surface, a scanning speed for a subsequent defect detection is varied according to an increase/decrease of defect density represented on a plurality of images acquired successively. When the density of defects is reduced, the scanning speed increases and a level of a skip rule increases, and when the density of defects increases, the scanning speed decreases and a level of the skip rule decreases to precisely detect defects, thereby increasing reliability, throughput, and productivity. | 09-03-2009 |
20090238445 | Method of detecting a defect on an object - In a method of detecting a defect on an object, a preliminary reference image can be obtained from a plurality of comparison regions defined on the object. The preliminary reference image is divided into reference zones by a similar brightness. Each of the reference zones is provided with substantially the same gray level, respectively, to obtain a reference image. Whether a defect exists in an inspection region in the comparison regions is determined using the reference image. Thus, defects in the inspection regions having different brightnesses can be detected using the properly obtained reference image. | 09-24-2009 |
20100136717 | APPARATUS AND METHOD TO INSPECT DEFECT OF SEMICONDUCTOR DEVICE - An apparatus and method to inspect a defect of a semiconductor device. The amount of secondary electrons generated due to a scanning electron microscope (SEM) may depend on the topology of a pattern of a semiconductor substrate. The amount of secondary electrons emitted from a recess of an under layer is far smaller than that of secondary electrons emitted from a projection of a top layer. Since the recess is darker than the projection, a ratio of a value of a secondary electron signal of the under layer to a value of a secondary electron signal of the top layer may be increased in order to improve a pattern image used to inspect a defect in the under layer. To do this, a plurality of conditions under which electron beams (e-beams) are irradiated may be set, at least two may be selected out of the set conditions, and the pattern may be scanned under the selected conditions. Thus, secondary electron signals may be generated according to the respective conditions and converted into image data so that various pattern images may be displayed on a monitor. Scan information on the pattern images may be automatically stored in a computer storage along with positional information on a predetermined portion of the semiconductor substrate. When calculation conditions are input to a computer, each of scan information on the pattern images may be calculated to generate a new integrated pattern image. | 06-03-2010 |
20110097829 | METHOD FOR INSPECTION OF DEFECTS ON A SUBSTRATE - A method for inspection of defects on a substrate includes positioning a probe of a scanning probe microscopy (SPM) over and spaced apart from a substrate, includes scanning the substrate by changing a relative position of the probe with respect to the substrate on a plane spaced apart from and parallel to the substrate, and includes measuring a value of an induced current generated via the probe in at least two different regions of the substrate. The value of the induced current is variable according to at least a shape and a material of the substrate. The method further includes determining whether a defect exists by comparing the values of the induced currents measured in the at least two different regions of the substrate. | 04-28-2011 |
20120080597 | APPARATUS AND METHOD TO INSPECT DEFECT OF SEMICONDUCTOR DEVICE - An apparatus and method to inspect a defect of a substrate. Since a recess of an under layer of a substrate is darker than a projection of a top layer, a ratio of a value of a secondary electron signal (of an SEM) of the under layer to a value of the top layer may be increased to improve a pattern image used to inspect an under layer defect. Several conditions under which electron beams are irradiated may be set, and the pattern may be scanned under such conditions. Secondary electron signals may be generated according to the conditions and converted into image data to display various pattern images. Scan information on the images may be stored with positional information on the substrate. Each of scan information on the pattern images may be calculated to generate a new integrated image. | 04-05-2012 |
20120314205 | DEFECT INSPECTION APPARATUS AND DEFECT INSPECTION METHOD USING THE SAME - A defect inspection apparatus comprises a table on which a substrate is placed, a first detection unit which is disposed above the table to detect an optical signal from the substrate, a second detection unit which is disposed above the table to detect an electrical signal from the substrate, and a signal processing unit which is connected to the first detection unit and the second detection unit to detect a chemical defect using the optical signal and the electrical signal. | 12-13-2012 |
20120315583 | METHODS OF GENERATING THREE-DIMENSIONAL PROCESS WINDOW QUALIFICATION - In a method of generating a three-dimensional process window qualification, a photoresist layer is coated on a substrate including an underlying structure. A plurality of circular-shaped regions of the substrate are distinguished into 1 to n regions to partition the substrate into a center portion and an edge portion, n being a natural number greater than 2. 1 to n exposing ranges are set, including a common exposing condition for the 1 to n regions. A photoresist pattern is fox led by exposing each shot portion in the 1 to n regions using a split exposing condition in the 1 to n exposing ranges. The photoresist pattern is detected, and a normal photoresist pattern with respect to each of the 1 to n regions is selected to generate the three-dimensional process window qualification. | 12-13-2012 |
20130169140 | BROADBAND LIGHT ILLUMINATORS - A broadband light illuminator of an optical inspector for optically detecting defects of an inspection object may include an electrode-less chamber including a plasma area from which broadband light is generated; a first energy provider, exterior to the chamber, configured to provide first energy for ionizing high pressure gases to form ionized gases in the chamber; a second energy provider, exterior to the chamber, configured to provide second energy for transforming the ionized gases into a plasma state to form the plasma area at a central portion of the chamber; an elliptical reflector having a first focus at which the chamber is positioned and a second focus such that the broadband light is reflected from the elliptical reflector toward the second focus; and a lens unit focusing the reflected broadband light onto the inspection object to form an inspection light for detecting the defects of the inspection object. | 07-04-2013 |
20130175445 | MICROELECTRONIC SUBSTRATE INSPECTION EQUIPMENT USING HELIUM ION MICROSCOPY - Microelectronic substrate inspection equipment includes a gas container which contains helium gas, a helium ion generator which is disposed in the gas container and converts the helium gas into helium ions and a wafer stage which is disposed under the gas container and on which a substrate to be inspected is placed. The equipment further includes a secondary electron detector which is disposed above the wafer stage and detects electrons generated from the substrate, a compressor which receives first gaseous nitrogen from a continuous nitrogen supply device and compresses the received first gaseous nitrogen into liquid nitrogen, a liquid nitrogen dewar which is connected to the compressor and stores the liquid nitrogen, and a cooling device that is coupled to the helium ion generator. The cooling device is disposed on the gas container, and cools the helium ion generator by vaporizing the liquid nitrogen. Related methods are also disclosed. | 07-11-2013 |
20130208486 | REFLECTOR STRUCTURE OF ILLUMINATION OPTIC SYSTEM - An illumination optic system includes a convex mirror to reflect light from a light source to towards a lens. The light source is at a first focus position and the lens is at a second focus position of the mirror. The system also includes a reflector to reflect light not incident on the lens toward the convex mirror. The reflector has a light guide hole to guide light to the incidence surface of the lens. | 08-15-2013 |
20130214180 | SYSTEM AND METHOD FOR PROVIDING LIGHT - An optical system includes a first light source to radiate light in a first wavelength band, a reflector to reflect light from the first light source, a second light source to radiate light in a second wavelength band, and a reflector reflect the second light source. The fourth reflector is set at a first position to allow light from the first light source to each the condenser lens and set to a second position to allow light from the second light source to reach the condenser lens. | 08-22-2013 |
20130234021 | METHOD AND APPARATUS TO MEASURE STEP HEIGHT OF DEVICE USING SCANNING ELECTRON MICROSCOPE - A method of measuring a step height of a device using a scanning electron microscope (SEM), the method may include providing a device which comprises a first region and a second region, wherein a step is formed between the first region and the second region, obtaining a SEM image of the device by photographing the device using a SEM, wherein the SEM image comprises a first SEM image region for the first region and a second SEM image region for the second region, converting the SEM image into a gray-level histogram and calculating a first peak value related to the first SEM image region and a second peak value related to the second SEM image region, wherein the first peak value and the second peak value are repeatedly calculated by varying a focal length of the SEM, and determining a height of the step by analyzing a trend of changes in the first peak value according to changes in the focal length and a trend of changes in the second peak value according to the changes in the focal length. | 09-12-2013 |
20130301903 | METHOD OF INSPECTING WAFER - A method of inspecting a wafer includes performing a fabricating process on a wafer, irradiating broadband light on the wafer, such that the light is reflected from the wafer, generating a spectral cube by using the light reflected from the wafer, extracting a spectrum of a desired wafer inspection region from the spectral cube, and inspecting the desired wafer inspection region by analyzing the extracted spectrum. | 11-14-2013 |
20150070690 | Method of Detecting a Defect of a Substrate and Apparatus for Performing the Same - In a method of detecting a defect of a substrate, a first light having a first intensity may be irradiated to a first region of the substrate through a first aperture. A defect in the first region may be detected using a first reflected light from the first region. A second light having a second intensity may be irradiated to a second region of the substrate through a second aperture. A defect in the second region may be detected using a second reflected light from the second region. Thus, the defects by the regions of the substrate may be accurately detected. | 03-12-2015 |
Patent application number | Description | Published |
20090089321 | Method and system for managing social brokering services in an online social network - A method and system for managing social brokering services in an online social network has developed that is comprising: social network database storing member information, human network information by member information on basis of a social network, and Needs information; an application server converting written Needs request into Needs information and storing it as said social network database after making payment of charges for use when the written Needs request for solving problems is inputted from Social Brokering Users, acting as members, providing Needs proposal with Social Brokering Users when the written Needs proposal is conveyed from Social Brokers, members, making payment of the amount according to types of dealing, like purchase, sales, exchange, etc., and contracts upon establishing contracts between Social Brokering Users and Social Brokers, and transferring the payment amount upon completing the contract; a Needs server delivering undelivered Needs information to the first human connection according to human network information of Social Brokering Users or Social Forwarders by searching Needs information stored in said social network database; and a payment server processing charges for use and payment when payment is executed in said application server. According to the present invention, it is possible to describe the problem and set up the amount of compensation in case that it is required to resolve various visible and invisible problems each member obtains; to overcome problems of trust and reliance by utilizing connection among people as brokers for assisting settlement of problems in the process of being delivered in accordance with a human network in the online social network if the step of delivering human connection among people is set up, and the amount of compensation(costs for dealing, and brokerage) and charges for use are paid; to support prompt settlement of problems for active anticipation of people, who have an ability to solve problems, from others; to provide costs for solving problems and brokerage in accordance with market forces for people who solve problems and to make the economical compensation granted by distributing brokerage with Needs forwarders in the middle step of human connection; and to form mutual relation during resolving problems. | 04-02-2009 |
20100241468 | System and method for measuring social capital index in an online social network - A system and method for measuring social capital index in an online social network has developed to measure competitive power, coherence, etc. with social capital index by a plurality of element (trust, integrity, solidarity, openness, importance, intimacy) towards specific network with each individual, and the whole network; to set up standards of route search in the social network map (GUI which expresses the social connection network as a graphic map); perform innovative services with obtaining asymmetric information of the link, the object of network analysis of the social connection network, and to establish a stable network. | 09-23-2010 |
20110167071 | METHOD FOR SCORING INDIVIDUAL NETWORK COMPETITIVENESS AND NETWORK EFFECT IN AN ONLINE SOCIAL NETWORK - The present invention relates to a method for scoring individual network competitiveness and network effect by network analysis in an online social network, particularly, to embody a social network in an online way, to measure network competitiveness and network effect of each node in an online social network based on results of mutual evaluation for trust, integrity, solidarity, openness, importance, and intimacy among the 1 | 07-07-2011 |