Patent application number | Description | Published |
20080271041 | PROGRAM PROCESSING METHOD AND INFORMATION PROCESSING APPARATUS - According to one embodiment, a program processing method includes converting parallel execution control description into graph data structure generating information, extracting a program module based on preceding information included in the graph data structure generating information when input data is given, generating a node indicating an execution unit of the program module for the extracted program module, adding the generated node to a graph data structure configured based on preceding and subsequent information defined in the graph data structure generating information, executing a program module corresponding to a node included in a graph data structure existing at that time, by setting values for the parameter, based on performance information of the node when all nodes indicating a program module defined in the preceding information have been processed, and obtaining and saving performance information of the node when a program module corresponding to the node has been executed. | 10-30-2008 |
20090083751 | INFORMATION PROCESSING APPARATUS, PARALLEL PROCESSING OPTIMIZATION METHOD, AND PROGRAM - According to one embodiment, an information processing apparatus includes a plurality of execution units and a scheduler which controls assignment of a plurality of basic modules of a program to the plurality of execution units. The scheduler detects a parallel degree representing a parallelization ratio in parallel processing of a program by the plurality of execution units, and detects a load associated with control of assigning the plurality of basic modules in the parallel processing of the program by the plurality of execution units. And then, the scheduler combines two or more basic modules which are successively executed according to a paralleled execution description in order to assign two or more basic modules as a module to a single execution unit, when a value of the parallel degree exceeds a predetermined value and a value of the load exceeds a predetermined value. | 03-26-2009 |
20090249132 | Data Processing Apparatus and Method of Verifying Programs - According to one embodiment, an information processing apparatus includes a plurality of execution modules, a system memory shared by the plurality or execution modules, and a scheduler which controls assignment of a plurality of basic modules to the plurality of execution modules in order to execute a program in parallel by the plurality of execution modules. The scheduler saves data items, which is to be input by the execution modules as input data items of the basic modules and is stored in the storage areas of the system memory, in other storage areas of the system memory before the basic modules are executed, and compares the data items stored in the storage areas of the system memory and accessed by the execution modules with the data items saved in the other storage areas of the system memory after the basic modules have been executed. | 10-01-2009 |
20090327669 | INFORMATION PROCESSING APPARATUS, PROGRAM EXECUTION METHOD, AND STORAGE MEDIUM - According to one embodiment, an information processing apparatus comprises a storage storing program modules and parallel execution control description describing relationships of the program modules, a conversion module extracting a part relating to the program module from the parallel execution control description, and creating graph data structure creation information including preceding and succeeding information of the program module, an adding module extracting graph data structure creation information to which the input data is given, creating a node, and adding the created node to a formerly created graph data structure, and an execution module subjecting the graph data structure to at least one of depth-first search and breadth-first search with a restricted breadth, selecting one node from nodes stored in the node memory, and executing a program module corresponding to the selected node. | 12-31-2009 |
20100083185 | COMPUTER PROGRAM, MULTIPROCESSOR SYSTEM, AND GROUPING METHOD - According to one embodiment, a grouping method for process units, each including basic modules and data, the process units being assigned to processors in a program for a multiprocessor system, the program including the basic modules and a parallel statement describing relationships between parallel processes for the basic modules, the method includes displaying a dataflow graph visually showing a process status of each process unit based on the parallel statement, and specifying a candidate for a connection of process units on the dataflow graph, wherein the dataflow graph displays data entries, nodes in the basic modules, and edges connecting the data entries and the nodes. | 04-01-2010 |
20100275213 | INFORMATION PROCESSING APPARATUS, PARALLEL PROCESS OPTIMIZATION METHOD - According to one embodiment, parallel processing optimization method for an apparatus configured to assign dynamically a part of some of basic modules, into which a program is divided and which comprise a execution rule which defines a executing order of the basic modules and are executable asynchronously with another modules, to threads includes identifiers based on the execution rule wherein the some of the basic modules are assignable to the threads, and configured to execute in parallel the threads by execution modules, the method includes managing the part of some of the basic modules and the identifiers of the threads assigned the part of some of the basic modules, managing an executable set includes the some of the basic modules, calculating transfer costs of the some of the basic modules when data, and selecting one of the basic module with a minimum transfer cost in the transfer costs. | 10-28-2010 |
20110072309 | Debugger for Multicore System - A debugger includes: a plurality of processor cores; and a scheduler configured to control an allocation of a plurality of basic modules to the processor cores based on an execution rule for enabling parallel execution of a program that is divided into the basic modules that are executable asynchronously with one another, the program being defined with the execution rule of the basic modules for executing the basic modules in time series, wherein the scheduler includes a break point setting module configured to set a group of break points that are designated through a graphical user interface. | 03-24-2011 |
20110283093 | MINIMIZING PROGRAM EXECUTION TIME FOR PARALLEL PROCESSING - According to one embodiment, an information processing apparatus comprises a storage storing program modules and parallel execution control description describing relationships of the program modules, a conversion module extracting a part relating to the program module from the parallel execution control description, and creating graph data structure creation information including preceding and succeeding information of the program module, an adding module extracting graph data structure creation information to which the input data is given, creating a node, and adding the created node to a formerly created graph data structure, and an execution module subjecting the graph data structure to at least one of first search and second search with a restricted breadth, selecting one node from nodes stored in the node memory, and executing a program module corresponding to the selected node. | 11-17-2011 |
20130166887 | DATA PROCESSING APPARATUS AND DATA PROCESSING METHOD - According to one embodiment, a data processing apparatus includes a processor and a memory. The processor includes core blocks. The memory stores a command queue and task management structure data. The command queue stores a series of kernel functions. The task management structure data defines an order of execution of kernel functions by associating a return value of a previous kernel function with an argument of a subsequent kernel function. Core blocks of the processor are capable of executing different kernel functions. | 06-27-2013 |
20130336532 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM PRODUCT - According to one embodiment, an information processing apparatus includes: a detector configured to set a plurality of detection areas to a single piece of face image included in a video image that is based on input video data, with reference to a position of the face image to detect movements of an operator giving an operation instruction in the detection areas; and an output module configured to output operation data indicating the operation instruction based on a combination of the movements detected in the detection areas. | 12-19-2013 |
20130342448 | INFORMATION PROCESSING APPARATUS, INFORMATION PROCESSING METHOD, AND PROGRAM PRODUCT - According to one embodiment, an information processing apparatus includes: a detector configured to set a detection area curved in an arc shape to a frame image included in a video that is based on input video data, with reference to a position of a face image included in the video to detect a movement of an operator giving an operation instruction in the detection area; and an output module configured to output operation data indicating the operation instruction given by the movement detected by the detector. | 12-26-2013 |
20140168078 | ELECTRONIC DEVICE AND INFORMATION PROCESSING METHOD - According to one embodiment, electronic device including, shadow image generating module, shadow image position identification module, and output image processing module. Shadow image generating module configured to compare corrected image with original image and configured to generate shadow image. Shadow image position identification module configured to identify position on projection image designated by shadow image. Output image processing module configured to superimpose shadow image identified by shadow image position identification module on projection image and configured to output superimposed image. | 06-19-2014 |
20140223419 | COMPILER, OBJECT CODE GENERATION METHOD, INFORMATION PROCESSING APPARATUS, AND INFORMATION PROCESSING METHOD - According to one embodiment, a compiler applicable to a parallel computer including processors, wherein a source program is input to the compiler and a local code for each of the processors are generated, the compiler includes a generation module and an object code generation module. The generation module is configured to analyze the input source program, extract a data transfer point from a procedure described in the source program, and generate a call processing for data copy. The object code generation module is configured to generate an object code including the call processing. | 08-07-2014 |