Patent application number | Description | Published |
20080290514 | Semiconductor device package and method of fabricating the same - In a semiconductor device, a package including the semiconductor device and a method of forming the same, the semiconductor device package includes a semiconductor device, a wiring board, and an underfill material layer. The semiconductor device includes a semiconductor chip, a metal layer, and solder balls for bump contacts. The semiconductor chip includes an active surface having bonding pads and a rear surface opposite the active surface and having concave portions corresponding to the bonding pads. The metal layer fills the concave portions and covers the rear surface. The solder balls for bump contacts are provided on the bonding pads. The wiring board includes an upper surface to which the semiconductor device is mounted and a lower surface opposite the upper surface. The underfill material layer fills a space between the active surface of the semiconductor device and the upper surface of the wiring board. The semiconductor device and the wiring board are electrically connected to each other by the solder balls for bump contacts of the semiconductor device and bonding electrodes included in the upper surface of the wiring board. | 11-27-2008 |
20090014876 | Wafer level stacked package having via contact in encapsulation portion and manufacturing method thereof - Provided are a wafer level stacked package with a via contact in an encapsulation portion, and a manufacturing method thereof. A plurality of semiconductor chips and encapsulation portions may be vertically deposited and electrically connected through a via contact that may be vertically formed in the encapsulation portion. Thus, an effective fan-out structure may be produced, vertical deposition may be available regardless of the type of a semiconductor device, and productivity may be improved. | 01-15-2009 |
20090065920 | Semiconductor package embedded in substrate, system including the same and associated methods - A device includes a base substrate, a package including an encapsulated die, the package at least partially embedded in the base substrate, and a wiring portion on the package and extending across at least a portion of the base substrate adjacent to the package. | 03-12-2009 |
20090197090 | Composition, anti-oxide film including the same, electronic component including the anti-oxide film, and methods for forming the anti-oxide film and electronic component - Disclosed herein is a composition, including a fluorine-based polymer or a perfluoropolyether (PFPE) derivative and a PFPE-miscible polymer, an anti-oxide film and electronic component including the same, and methods of forming an anti-oxide film and an electronic component. Use of the composition may achieve formation of an anti-oxide film through a solution process and electronic components using a metal having increased conductivity and decreased production costs. | 08-06-2009 |
20140048318 | COMPOSITION, ANTI-OXIDE FILM INCLUDING THE SAME, ELECTRONIC COMPONENT INCLUDING THE ANTI-OXIDE FILM, AND METHODS FOR FORMING THE ANTI-OXIDE FILM AND ELECTRONIC COMPONENT - Disclosed herein is a composition, including a fluorine-based polymer or a perfluoropolyether (PFPE) derivative and a PFPE-miscible polymer, an anti-oxide film and electronic component including the same, and methods of forming an anti-oxide film and an electronic component. Use of the composition may achieve formation of an anti-oxide film through a solution process and electronic components using a metal having increased conductivity and decreased production costs. | 02-20-2014 |
Patent application number | Description | Published |
20130112225 | DISH WASHER AND CONTROL METHOD THEREOF - A dish washer includes a washing tub accommodating a detergent containing a first enzyme activated at an active temperature range and a second enzyme activated at another active temperature range differing from the active temperature range of the first enzyme, and wash water in which the detergent is dissolved, a heating unit heating wash water, and a controller controls driving of the heating unit such that the temperature of wash water is maintained within the active temperature range of the first enzyme for a first designated time, and controls driving of the heating unit such that the temperature of wash water is maintained within the active temperature range of the second enzyme for a second designated time, when the first designated time has elapsed. | 05-09-2013 |
20130145562 | DRUM WASHING MACHINE AND WASHING METHOD THEREOF - A drum washing machine and washing method are provided. The washing machine directly sprays water to laundry inside the drum through a nozzle unit. The method includes passing some water through a detergent container and directly spraying some water to the inside of a drum through a nozzle unit such that a high concentration of detergent bubbles is generated while applying a force to the laundry. The washing machine includes a cabinet, a tub inside the cabinet, a drum inside the tub, a door on the cabinet, a diaphragm, and a nozzle unit installed so interference with the door is avoided and to receive water directly from an external source to spray water inside the drum during a washing cycle and a rinsing cycle. The nozzle unit adjusts water jetting according to a displacement of an actuator installed inside the nozzle unit. | 06-13-2013 |
20130152969 | DISHWASHER AND METHOD FOR CONTROLLING THE SAME - A dishwasher, in which a reservoir provided with an electrolyzer is connected to a water collector via a flow path change valve, and wash water in the reservoir is electrolyzed by the electrolyzer during non-operation of the wash water, to generate sterilizing water and to circulate the sterilizing water into the dishwasher, thereby achieving an enhancement in sterilizability of the dishwasher. A method for controlling a dishwasher makes it possible to suppress propagation of microorganisms left in the dishwasher and to remove organic substances, using a sterilizing agent or high-temperature water. It is also possible to reduce generation of offensive odor caused by decomposition of bacteria, through a reduction in the amount of bacteria in the dishwasher. Since sterilization of the dishwasher is automatically carried out, enhanced user convenience is provided. | 06-20-2013 |
20130319458 | DISHWASHER - A dishwasher including a washing chamber to wash dishes, a sump concavely formed at a lower portion of the washing chamber to collect water used in washing, a microfilter disposed at the sump to filter out dirt produced when the dishes are washed, and an ultrasonic generator to radiate ultrasonic waves toward the microfilter. Since the microfilter is automatically cleaned by the ultrasonic generator, a user may not need to manually clean the microfilter. | 12-05-2013 |
20130319477 | DISHWASHER - A dishwasher including a washing compartment at which washing of dishware is performed, a water collecting unit provided at a lower portion of the washing compartment in a concave manner to collect water that has been used for the washing, a micro filter disposed at the water collecting unit and configured to filter garbage being generated at the time of the washing of the dishware, and an ultrasonic wave generating apparatus configured to radiate an ultrasonic wave at the micro filter, thereby automatically cleaning the micro filter and thus, a user may not need to directly clean the micro filter. | 12-05-2013 |
20140258361 | APPARATUS AND METHOD FOR PROVIDING CONTENT - An apparatus and method for providing content is provided, which performs a web service initialization through a provided local offline web server and manages a plurality of content provided through a multithreaded web service. The apparatus for providing content includes a communication unit receiving one or more sets of content; a thread creation unit creating one or more threads that are given to the content to process a work; and a page creation unit having a frame per thread and creating an image page for playing the content on a web browser. | 09-11-2014 |
20140298835 | DEODORIZING FILTER AND REFRIGERATOR HAVING THE SAME - A deodorizing filter including at least one deodorizing member to adsorb odor particles contained in fluid. The deodorizing member includes a substrate having plural pass-through pores to allow passage of the fluid, an adherent material applied to a surface of the substrate, and plural porous deodorizer materials fixed to the surface of the substrate by the adherent material to adsorb the odor particles. The deodorizing filter more effectively deodorizes interior air of a refrigerator owing to an increased contact area between interior air of the refrigerator and the deodorizer materials of the deodorizing filter. | 10-09-2014 |
20150059398 | STORAGE CONTAINER AND REFRIGERATOR HAVING THE SAME - A storage container includes an inflow hole and an outflow hole through which cold air flows, and deodorizing filters for removing odorous materials are mounted in the inflow hole and the outflow hole. Therefore, when foods containing odor-causing materials are put in the storage container to be stored in a storage compartment, the odor-causing materials are prevented from spreading inside the storage compartment, thereby fundamentally removing odors from the storage compartment. In addition, the cold air of the storage compartment continuously flows in and out of the storage container through the inflow hole and the outflow hole, and therefore foods stored in the storage container may be kept fresh. | 03-05-2015 |
20160123217 | CONTROL VALVE SYSTEM FOR COOLANT - A control valve system for a coolant includes an inlet through which a coolant flows into a water chamber. A plurality of outlets discharges the coolant outside the water chamber. A valve housing defines the water chamber which is fluidically connected to the inlet and the plurality of outlets. At least one rotary valve is rotatably installed in the water chamber. An actuator rotates the rotary valve. A controller is configured to control a flow rate of the coolant discharged to the plurality of outlets by adjusting a rotational angle of the rotary valve by the actuator. The plurality of outlets include a first outlet connected to a radiator which cools the coolant, and a second outlet connected to a reservoir tank which removes bubbles of the coolant. | 05-05-2016 |
Patent application number | Description | Published |
20110052425 | CLUTCH WATER PUMP, CONTROL SYSTEM THEREOF, AND CONTROL METHOD THEREOF - A clutch water pump may include a pulley, a brake pad attached on an interior surface of the clutch compartment of the pulley, a clutch disk disposed corresponding to the brake pad in the clutch compartment, a hub rotatably mounted into the penetrating hole and coupled to the clutch disk through a plurality of spring pins, the plurality of spring pins connecting slidably the clutch disk to the hub, a magnetic actuator fixed to the hub and disposed to the clutch disk to selectively move the clutch disk toward or away from the brake pad, and a main shaft, one end of which is fixed to the center of the hub and the other end of which is fixed to an impeller. Furthermore, a method of controlling the clutch water pump according to the engine rotation speed, the coolant temperature, and a condition of the coolant temperature sensor is provided. | 03-03-2011 |
20130075220 | CLUTCH WATER PUMP, CONTROL SYSTEM THEREOF, AND CONTROL METHOD THEREOF - A clutch water pump may include a pulley, a brake pad attached on an interior surface of the clutch compartment of the pulley, a clutch disk disposed corresponding to the brake pad in the clutch compartment, a hub rotatably mounted into the penetrating hole and coupled to the clutch disk through a plurality of spring pins, the plurality of spring pins connecting slidably the clutch disk to the hub, a magnetic actuator fixed to the hub and disposed to the clutch disk to selectively move the clutch disk toward or away from the brake pad, and a main shaft, one end of which is fixed to the center of the hub and the other end of which is fixed to an impeller. Furthermore, a method of controlling the clutch water pump according to the engine rotation speed, the coolant temperature, and a condition of the coolant temperature sensor is provided. | 03-28-2013 |
20130085037 | CLUTCH WATER PUMP, CONTROL SYSTEM THEREOF, AND CONTROL METHOD THEREOF - A clutch water pump may include a pulley, a brake pad attached on an interior surface of the clutch compartment of the pulley, a clutch disk disposed corresponding to the brake pad in the clutch compartment, a hub rotatably mounted into the penetrating hole and coupled to the clutch disk through a plurality of spring pins, the plurality of spring pins connecting slidably the clutch disk to the hub, a magnetic actuator fixed to the hub and disposed to the clutch disk to selectively move the clutch disk toward or away from the brake pad, and a main shaft, one end of which is fixed to the center of the hub and the other end of which is fixed to an impeller. Furthermore, a method of controlling the clutch water pump according to the engine rotation speed, the coolant temperature, and a condition of the coolant temperature sensor is provided. | 04-04-2013 |
Patent application number | Description | Published |
20090087994 | METHOD OF FORMING FINE PATTERNS AND MANUFACTURING SEMICONDUCTOR LIGHT EMITTING DEVICE USING THE SAME - A method of forming a fine pattern begins with providing a c-plane hexagonal semiconductor crystal. A mask having a predetermined pattern is formed on the semiconductor crystal. The semiconductor crystal is dry-etched by using the mask to form a first fine pattern on the semiconductor crystal. The semiconductor crystal including the first fine pattern is wet-etched to expand the first fine pattern in a horizontal direction to form a second fine pattern. The second fine pattern obtained in the wet-etching the semiconductor crystal has a bottom surface and a sidewall that have unique crystal planes, respectively. The present fine-pattern forming process can be advantageously applied to a semiconductor light emitting device, particularly, to a phonic crystal structure required to have fine patterns or a structure using a surface plasmon resonance principle. | 04-02-2009 |
20110317950 | Motor device - Disclosed is a motor device. The motor device according to an exemplary embodiment of the present invention includes a sleeve having a shaft hole expanding downwardly in an axial direction; a shaft having a head part having exposed to a top portion of the sleeve and a body part having a shape corresponding to the shaft hole; a rotor case combined to the head part and rotating in connection with the shaft; an oil sealing part formed between the rotor case and the sleeve and an oil interface to seal oil provided to have a taper shape; and a thrust dynamic part formed on at least one of the rotor case and the sleeve and pumping the oil interface in an inner-diameter direction from the oil interface at the time of the rotation of the rotor case. | 12-29-2011 |
20120169165 | SPINDLE MOTOR - There is provided a spindle motor including: a sleeve rotatably supporting a shaft and having an insertion groove provided in a top surface thereof; and a rotor case mounted on a top end of the shaft and including a protruding wall part inserted into the insertion groove, wherein a lubricant, provided to generate a dynamic pressure when the shaft rotates, forms an interface with air in a clearance formed by the protruding wall part and the insertion groove. | 07-05-2012 |
20130234170 | SEMICONDUCTOR LIGHT EMITTING DEVICE HAVING MULTI-CELL ARRAY - A semiconductor light emitting device (LED) includes a first light emitting cell having a first plurality of electrodes. A second light emitting cell includes a second plurality of electrodes. The first and second light emitting cells are disposed on the substrate and are physically separated from each other. A first interconnection unit electrically connects the first plurality of electrodes to the second plurality of the electrodes. | 09-12-2013 |
20130242460 | MULTILAYER CERAMIC ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME - There are provided a multilayer ceramic electronic component and a method of manufacturing the same, the multilayer ceramic electronic including: a ceramic body; and a plurality of internal electrodes laminated within the ceramic body, wherein, when T1 is the greatest distance between an upper outermost internal electrode and a lower outermost internal electrode among the plurality of internal electrodes and T2 is the distance between the highest point and the lowest point in each of the upper outermost internal electrode and the lower outermost internal electrode in a thickness direction of the ceramic body, T2/T1<0.05 is satisfied, and thus, defects in alignment of internal electrodes of the multilayer ceramic electronic component may be suppressed. | 09-19-2013 |
20130306997 | SEMICONDUCTOR LIGHT EMITTING DEVICE HAVING MULTI-CELL ARRAY AND MANUFACTURING METHOD THEREOF, LIGHT EMITTING MODULE, AND ILLUMINATION APPARATUS - A semiconductor light emitting device includes a substrate and a plurality of light emitting cells disposed on the substrate. Each light emitting cell includes first and second conductive semiconductor layers having an active layer formed therebetween, and first and second electrodes formed on the first and second layers. A first insulation layer is formed on portions of the light emitting cell, while a second insulation layer entirely covers at least one light emitting cell. A method of manufacturing the semiconductor light emitting device, and a light emitting module and an illumination apparatus including the semiconductor light emitting device are also provided. | 11-21-2013 |
20140104750 | MULTI-LAYERED CERAMIC CAPACITOR - There is provided a multi-layered ceramic capacitor including: a ceramic body formed by multi-layering a plurality of dielectric layers; a plurality of first and second internal electrodes including at least one side exposed through edges of the dielectric layer; upper and lower cover layers formed at upper and lower portions of the ceramic body, respectively; first and second external electrodes formed to be spaced apart from each other at a lower surface of the lower cover layer; first and second connecting electrodes contacting outer peripheral surfaces of a plurality of second and first margin to connect exposed portions of the plurality of first and second internal electrodes, respectively; and an insulating side part formed so as to cover lateral surfaces at which the first and second internal electrodes are exposed. | 04-17-2014 |
20140146436 | MULTILAYER CERAMIC ELECTRONIC COMPONENT - Multilayer ceramic electronic component includes: a ceramic body including dielectric layers and having first and second main surfaces, first and second side surfaces, and first and second end surfaces; a first internal electrode including a capacitance forming portion having an overlap region for forming capacitance and a first lead-out portion extended from the capacitance forming portion to be exposed to the first side surface; a second internal electrode alternately stacked with the first internal electrode, having the dielectric layer interposed therebetween, insulated from the first internal electrode, and having a second lead-out portion extended from the capacitance forming portion to be exposed to the first side surface; first and second external electrodes connected to the first and second lead-out portions, respectively; an insulation layer. | 05-29-2014 |
20140160617 | MULTILAYER CERAMIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME - There is provided a multilayer ceramic capacitor, and a method of manufacturing the same, the multilayer ceramic capacitor including: a ceramic body; a first internal electrode; a second internal electrode; a first external electrode; a second external electrode; and an insulating layer. | 06-12-2014 |
20140160619 | MULTILAYER CERAMIC ELECTRONIC COMPONENT - There is provided a multilayer ceramic electronic component, including a ceramic body including dielectric layers, and having first and second main surfaces, first and second side surfaces and first and second end surfaces; first and second internal electrodes having overlap regions forming a capacitance part, the first internal electrodes having a first lead out portion to be exposed to the first side surface, and being alternately laminated with the second internal electrodes while being insulated therefrom, the second internal electrodes having a second lead out portion; first and second external electrodes connected to the first and second lead out portions, respectively; and an insulating layer formed on the first side surface, wherein a length of the first lead out portion is longer than that of the second lead out portion and the capacitance part has different distances from the first side surface. | 06-12-2014 |
20140240895 | MULTILAYER CERAMIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME - A multilayer ceramic capacitor includes a ceramic body having dielectric layers laminated therein; an active layer including first and second internal electrodes alternately exposed through end surfaces of the ceramic body having the dielectric layer interposed therebetween; upper and lower cover layers formed above and below the active layer; first and second external electrodes formed on end surfaces of the ceramic body, respectively; first and second dummy patterns extended from the first and second external electrodes into margin portions of the active layer in a length direction, respectively; and first and second dummy electrodes opposing each other in a length direction within the upper and lower cover layers, the first and second dummy electrodes being extended inwardly from the first and second external electrodes. | 08-28-2014 |
20140345925 | MULTILAYER CERAMIC CAPACITOR AND MOUNTING BOARD THEREFOR - There is provided a multilayer ceramic capacitor including: a ceramic body including dielectric layers and satisfying T/W>1.1 when a width thereof is defined as W and a thickness thereof is defined as T; first internal electrodes each having a first lead part exposed to at least one side surface of the ceramic body; second internal electrodes each having a second lead part exposed to the at least one side surface of the ceramic body; first and second external electrodes electrically connected to the first lead part and the second lead part, respectively, and extended from the side surface of the ceramic body to which the first lead part and the second lead part are exposed to at least one of the first and second main surfaces; and an insulating layer formed to cover the first and second external electrodes formed on the first and second side surfaces. | 11-27-2014 |
20140360764 | MULTILAYER CERAMIC CAPACITOR AND BOARD FOR MOUNTING THE SAME - A multilayer ceramic capacitor includes a ceramic body including dielectric layers; first and second internal electrode groups disposed to be misaligned by a predetermined interval in the length direction, having the dielectric layers interposed therebetween; first and second external electrodes extended from at least one of the first and second side surfaces to at least one of the first and second main surfaces; and an insulating layer covering portions of the first and second external electrodes formed on the at least one of the first and second side surfaces, wherein the first internal electrode group includes first and second internal electrodes including first and second pattern parts and first and second lead parts, respectively, and the second internal electrode group includes third and fourth internal electrodes including third and fourth pattern parts and third and fourth lead parts, respectively. | 12-11-2014 |
20140362492 | MULTILAYER CERAMIC ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME - There is provided a multilayer ceramic electronic component, including: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes alternately exposed through both end surfaces of the ceramic body, having respective ones of the dielectric layers interposed therebetween, and being placed alternately to the left and to the right in a width direction of the ceramic body to be offset from one another, when the ceramic body is viewed in a width-thickness cross-sectional direction; and first and second external electrodes formed on the end surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. | 12-11-2014 |
20140376151 | METHOD OF MANUFACTURING MULTILAYER CERAMIC ELECTRONIC COMPONENT AND MULTILAYER CERAMIC ELECTRONIC COMPONENT MANUFACTURED THEREBY - There is provided a method of manufacturing a multilayer ceramic electronic component, the method including: preparing a ceramic multilayer body by stacking and sintering ceramic green sheets having internal electrodes formed thereon; determining whether or not a distance d | 12-25-2014 |
20150041193 | MULTILAYER CERAMIC CAPACITOR AND BOARD HAVING THE SAME MOUNTED THEREON - There is provided a multilayer ceramic capacitor including: a ceramic body; an active layer disposed in the ceramic body and including first internal electrodes each having a first lead part exposed to at least one of the first and second side surfaces, and second internal electrodes each having a second lead part exposed to the at least one of the first and second side surfaces, thereby forming capacitance; an upper cover layer formed on an upper portion of the active layer in the thickness direction; a lower cover layer formed on a lower portion of the active layer in the thickness direction and having a thickness greater than that of the upper cover layer; a first external; and a second external electrode. | 02-12-2015 |
20160084125 | CONTROL METHOD FOR OIL PUMP - A system and method of controlling an automotive electric oil pump are provided. The method of controlling an oil pump can minimize power consumption of a vehicle and improve the fuel efficiency accordingly by learning the performance of the electric oil pump and operating the electric oil pump based on performance. | 03-24-2016 |
Patent application number | Description | Published |
20100210061 | METHOD FOR FABRICATING SOLAR CELL USING INDUCTIVELY COUPLED PLASMA CHEMICAL VAPOR DEPOSITION - A method for fabricating a solar cell using inductively coupled plasma chemical vapor deposition (ICP-CVD) including a first electrode, a P layer, an intrinsic layer, an N-type layer and a second electrode. The method includes forming an intrinsic layer including a hydrogenated amorphous silicon (Si) thin film by an inductively coupled plasma chemical vapor deposition (ICP-CVD) device using mixed gas including hydrogen (H | 08-19-2010 |
20120077303 | Method for Fabricating Solar Cell Using Inductively Coupled Plasma Chemical Vapor Deposition - In one example, a method for fabricating a solar cell comprising a first electrode, a first-type layer, an intrinsic layer, a second-type layer and a second electrode is disclosed. The method comprising forming a second-type layer including an amorphous silicon (Si) carbide thin film by an inductively coupled plasma chemical vapor deposition (ICP-CVD) device using mixed gas including hydrogen (H | 03-29-2012 |
20120077306 | Method for Fabricating Solar Cell Using Inductively Coupled Plasma Chemical Vapor Deposition - In one example, a method for fabricating a solar cell comprising a first electrode, a first-type layer, an intrinsic layer, a second-type layer and a second electrode is disclosed. At least one of the second-type layer, the intrinsic layer and the first-type layer is formed as a crystallized Si layer by an inductively coupled plasma chemical vapor deposition (ICP-CVD) device using mixed gas including hydrogen (H | 03-29-2012 |
20130029450 | METHOD FOR MANUFACTURING SOLAR CELL - The present invention provides a method for manufacturing a solar cell capable of suppressing volatilization of selenium and deformation of a substrate during a manufacturing process. According to the present invention, the method for manufacturing the solar cell comprises the steps of: providing a substrate; forming a rear electrode on the substrate; forming a precursor film for a light absorption film on the rear electrode; forming a light absorption film by progressing a crystallization process for the precursor film for the light absorption film; forming a buffer film on the light absorption film; forming a window film on the buffer film, and forming an anti-reflection film on the window film; and partially patterning the anti-reflection film, and forming a grid electrode in a patterned area. Said precursor film for the light absorption film includes Cu—Zn—Sn—S (Cu | 01-31-2013 |
20130078551 | METHOD FOR MANUFACTURING UNIT CELLS OF SOLID OXIDE FUEL CELL - A manufacturing method for a solid oxide fuel cell (SOFC) unit cell is disclosed. The manufacturing method may include manufacturing an Ni—CeScSZ anode layer; manufacturing a CeScSZ electrolyte layer; manufacturing a gadolinia-doped ceria (GDC) buffer layer; and manufacturing a lanthanum strontium cobalt ferrite (LSCF) cathode layer. Accordingly, an ohmic resistance of electrolyte and a polarization resistance may be reduced and high output may be obtained even at a middle low temperature. | 03-28-2013 |
20150364714 | ORGANIC LIGHT EMITTING DEVICE MANUFACTURING METHOD USING SHADOW MASK AND ORGANIC LIGHT EMITTING DEVICE MANUFACTURED THEREBY - The present inventions relates to an organic light emitting device capable of decreasing a leakage current, and more particularly, to an organic light emitting device manufacturing method and an organic light emitting device using the same, which can decrease a leakage current, by flattening a lower electrode in order to decrease a leakage current of the lower electrode deposited through a shadow mask. | 12-17-2015 |
Patent application number | Description | Published |
20080261360 | METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE - In a method of manufacturing a semiconductor device, a gate insulation layer is formed on a substrate including a first channel of a first conductive type and a second channel of a second conductive type different from the first conductive type. A first conductive layer including a first metal is formed on the gate insulation layer, and a second conductive layer including a second metal different from the first metal is formed on the first conductive layer formed over the second channel. The second conductive layer is partially removed by a wet etching process to form a second conductive layer pattern over the second channel. | 10-23-2008 |
20130234611 | LIGHT EMITTING DEVICE - Light emitting devices. A light emitting device including a power source; and a plurality of light emitting diode (LED) arrays coupled to the power source unit; and at least one delay unit. Each delay unit is coupled to a corresponding light emitting diode array of the light emitting diode arrays. | 09-12-2013 |
20140022690 | MULTILAYERED CERAMIC ELECTRONIC COMPONENT AND MANUFACTURING METHOD OF THE SAME - There is provided a multilayered ceramic electronic component including: a ceramic body in which a plurality of dielectric layers are stacked; a plurality of first and second internal electrodes formed on at least one of the dielectric layers and alternately exposed through both ends of the ceramic body in a stacking direction of the ceramic body; an a step compensation cover including a ceramic material having a viscosity higher than that of a ceramic material included in the ceramic body and formed on at least one of an upper surface and a lower surface of the ceramic body. | 01-23-2014 |
20140219304 | SEMICONDUCTOR LIGHT EMITTING DEVICE - A semiconductor light emitting device includes a conductive substrate, a light emitting laminate including a second conductivity type semiconductor layer, an active layer, and a first conductivity type semiconductor layer stacked on the conductive substrate, a first electrode layer electrically connected to the first conductivity type semiconductor layer, a second electrode layer between the conductive substrate and the second conductivity type semiconductor layer, the second electrode layer being electrically connected to the second conductivity type semiconductor layer, and a passivation layer between the active layer and the second electrode layer, the passivation layer covering at least a lateral surface of the active layer of the light emitting laminate. | 08-07-2014 |
20140345926 | MULTILAYERED CERAMIC CAPACITOR AND BOARD FOR MOUNTING THE SAME - There is provided a multilayered ceramic capacitor including a ceramic body including a dielectric layer and having first and second main surfaces, first and second end surfaces, and first and second side surfaces; a first internal electrode having a first lead part; a second internal electrode having a second lead part; a first external electrode electrically connected to the first lead part and extending from the side surface having the first lead part exposed thereto, to at least one of the first and second main surfaces; a second external electrode electrically connected to the second lead part and extending from the side surface having the second lead part exposed thereto, to at least one of the first and second main surfaces; and an insulating layer covering the first and second external electrodes disposed on the first and second side surfaces. | 11-27-2014 |
20150019073 | OIL PUMP SYSTEM OF HYBRID VEHICLE AND METHOD FOR CONTROLLING THE SAME - An oil pump system of a hybrid vehicle may include an electric oil pump which supplies operating hydraulic pressure to the transmission based on a speed command; a data detector which detects data for controlling the electric oil pump; and a controller which sets a driving mode of the electric oil pump based on the data detected by the data detector, determines a basic flow rate of the set driving mode, determines a final flow rate by compensating for the basic flow rate, and applies the speed command to the electric oil pump, in which the operating hydraulic pressure is supplied to the transmission only by the electric oil pump, and the speed command is determined based on target hydraulic pressure, an oil temperature, and the final flow rate. | 01-15-2015 |
20150255213 | MULTILAYER CERAMIC ELECTRONIC COMPONENT AND ASSEMBLY BOARD HAVING THE SAME - The present application describes a multilayer ceramic electronic component including a ceramic body having a thickness greater than a width and includes a dielectric layers, and has upper and lower surfaces opposing each other in a thickness direction. First and second side surfaces oppose each other in a width direction, and first and second end surfaces oppose each other in a length direction. First and second internal electrodes are stacked with at least one of the dielectric layers interposed therebetween within the ceramic body in the width direction. A volume increasing part is disposed in a lower portion of the ceramic body in the thickness direction to allow a volume of a lower margin portion of the ceramic body to be greater than that of an upper margin portion thereof. | 09-10-2015 |
20150287533 | MULTILAYER CERAMIC CAPACITOR AND ASSEMBLY BOARD HAVING THE SAME - A multilayer ceramic capacitor may include: a ceramic body having upper and lower surfaces opposing each other in a thickness direction thereof and first and second end surfaces opposing each other in a length direction thereof, a thickness of the ceramic body being greater than a width thereof; a first external electrode disposed on the first end surface to allow a predetermined region of the first end surface adjacent to the upper surface to be exposed; a second external electrode disposed on the second end surface to allow a predetermined region of the second end surface adjacent to the upper surface to be exposed; and first and second internal electrodes disposed within the ceramic body, stacked in a width direction of the ceramic body, and connected to the first and second external electrodes, respectively. | 10-08-2015 |
20150318109 | MULTILAYER CERAMIC ELECTRONIC COMPONENT AND METHOD OF MANUFACTURING THE SAME - A multilayer ceramic electronic component may include: a plurality of active parts including a plurality of dielectric layers and a plurality of internal electrodes that are alternately disposed, the plurality of active parts being stacked; an interlayer margin part disposed between the active parts adjacent to each other and containing magnesium; an upper cover part disposed on an upper portion of an uppermost active part among the plurality of active parts and containing magnesium; and a lower cover part disposed on a lower portion of a lowermost active part among the plurality of active parts and containing magnesium, wherein the upper and lower cover parts and the interlayer margin part include magnesium-nickel oxide layers formed on interfaces thereof adjacent to the active parts. | 11-05-2015 |
20150318110 | MULTILAYER CERAMIC ELECTRONIC COMPONENT - A multilayer ceramic electronic component may include: a ceramic body including an active part in which dielectric layers and internal electrodes are alternately disposed, an upper cover part disposed on an upper portion of the active part, and a lower cover part disposed on a lower portion thereof; a first dummy electrode disposed between a central portion of the upper or lower cover part in a length direction and one end surface of the cover part in the length direction; and a second dummy electrode disposed between the central portion of the upper or lower cover part in the length direction and the other end surface of the cover part in the length direction, and spaced apart from the first dummy electrode. | 11-05-2015 |
20150318111 | PASTE FOR EXTERNAL ELECTRODE, MULTILAYER CERAMIC ELECTRONIC COMPONENT, AND METHOD OF MANUFACTURING THE SAME - A multilayer ceramic electronic component may include: a ceramic body including a plurality of dielectric layers; internal electrodes disposed in the ceramic body and having one ends exposed to outer surfaces of the ceramic body; and external electrodes disposed on the outer surfaces of the ceramic body to be connected to the respective one ends of the internal electrodes and containing a conductive metal and a conductive ceramic powder. | 11-05-2015 |
20160005539 | MULTILAYER CERAMIC CAPACITOR, MANUFACTURING METHOD THEREOF, AND BOARD HAVING THE SAME - A multilayer ceramic capacitor may include: a ceramic body having first and second main surfaces opposing each other in a thickness direction and first and second end surfaces opposing each other in a length direction, a thickness of the ceramic body being greater than a width thereof; a first external electrode disposed on the first end surface and having a greater thickness in a region thereof adjacent to the second main surface than in a region thereof adjacent to the first main surface; a second external electrode disposed on the second end surface and having a greater thickness in a region thereof adjacent to the second main surface than in a region thereof adjacent to the first main surface; and first and second internal electrodes disposed in the ceramic body and connected to the first and second external electrodes, respectively. | 01-07-2016 |
20160042859 | CHIP ELECTRONIC COMPONENT - There is provided a chip electronic component including: a magnetic body having an internal coil part embedded therein, wherein the magnetic body includes: a central portion provided inside of the internal coil part and including a core; and an outer peripheral portion provided outside of the central portion, the central portion and the outer peripheral portion having different magnetic permeabilities. | 02-11-2016 |
20160126012 | MULTILAYER CERAMIC CAPACITOR AND METHOD OF MANUFACTURING THE SAME - A method of manufacturing a multilayer ceramic capacitor includes stacking dielectric sheets on which internal electrode patterns are printed, to form a multilayer body, forming additional dielectric sheets on portions of opposite side surfaces of the multilayer body, and sintering the multilayer body to form a ceramic body in which internal electrodes are disposed. Here, the additional dielectric sheets form attachment parts on the opposite side surfaces of the ceramic body by the sintering of the multilayer body. | 05-05-2016 |
Patent application number | Description | Published |
20090045513 | SEMICONDUCTOR CHIP PACKAGE, ELECTRONIC DEVICE INCLUDING THE SEMICONDUCTOR CHIP PACKAGE AND METHODS OF FABRICATING THE ELECTRONIC DEVICE - A semiconductor chip package including a semiconductor chip including a first surface having bonding pads, a second surface facing the first surface, and sidewalls; a molding extension part surrounding the second surface and the sidewalls of the semiconductor chip; redistribution patterns extending from the bonding pads over the molding extension part, and electrically connected to the bonding pads; bump solder balls on the redistribution patterns; and a molding layer configured to cover the first surface of the semiconductor chip and the molding extension part, while exposing portions of each of the bump solder balls. The molding layer has concave meniscus surfaces between the bump solder balls adjacent to each other. | 02-19-2009 |
20090267129 | DIELECTRIC MULTILAYER STRUCTURES OF MICROELECTRONIC DEVICES AND METHODS FOR FABRICATING THE SAME - A dielectric multilayer structure of a microelectronic device, in which a leakage current characteristic and a dielectric constant are improved, is provided in an embodiment. The dielectric multilayer structure includes a lower dielectric layer, which is made of amorphous silicate (M | 10-29-2009 |
20100025781 | Transistors with Multilayered Dielectric Films and Methods of Manufacturing Such Transistors - Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film. | 02-04-2010 |
20110287622 | Transistors with Multilayered Dielectric Films and Methods of Manufacturing Such Transistors - Transistors that include multilayered dielectric films on a channel region are provided. The multilayered dielectric comprises a lower dielectric film that may have a thickness that is at least 50% the thickness of the multilayered dielectric film and that comprises a metal oxide, a metal silicate, an aluminate, or a mixture thereof, and an upper dielectric film on the lower dielectric film, the upper dielectric film comprising a Group III metal oxide, Group III metal nitride, Group XIII metal oxide or Group XIII metal nitride. A gate electrode is provided on the multilayered dielectric film. | 11-24-2011 |
20120129327 | METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING A HARD MASK AND DIFFUSION - Provided is a method that can include forming a gate dielectric layer, a first diffusion layer, and a hard mask layer on a substrate defined to include first and second spaced apart regions, forming a photoresist pattern on the hard mask layer in the first region and exposing the hard mask layer on the second region, removing the exposed hard mask layer on the second region and the first diffusion layer on the second region to expose the gate dielectric layer on the second region, removing the photoresist pattern, forming a second diffusion layer on uppermost surfaces of the first and second regions, and performing a heat treatment process to diffuse a first diffusion material included in the first diffusion layer and a second diffusion material included in the second diffusion layer. | 05-24-2012 |
20130022642 | Dual Antagonist for TNF-A and IL-21 for Preventing and Treating Autoimmune Diseases - The present invention relates to TNFR2-IL21R fusion protein acting as a double-antagonist to TNF-alpha (α) and IL-21. The composition containing the double antagonist to TNF-α and Il-21 (TNFR2-IL21R fusion protein), known as major causes of autoimmune rheumatoid arthritis, one of autoimmune diseases, can reduce the secretion of inflammatory cytokine, increase the secretion of anti-inflammatory cytokine, and suppress the differentiation of osteoclasts better than single proteins such as TNFR2-Fc and IL21R-Fc. The TNFR2-IL21R fusion protein of the present invention has not only excellent treatment effect on arthritis in CIA mouse model not also excellent treatment effect on autoimmune rheumatoid arthritis by increasing the expression of Treg, the immune suppressive cells. Therefore, the TNFR2-IL21R fusion protein of the present invention can be effectively used as an active ingredient for the composition for the prevention and treatment of autoimmune disease. | 01-24-2013 |
20130214308 | SEMICONDUCTOR LIGHT EMITTING DEVICE, LIGHT EMITTING MODULE, AND ILLUMINATION APPARATUS - A semiconductor light emitting device includes a substrate, a semiconductor laminate having a base semiconductor layer, a first conductivity-type semiconductor layer, an active layer, and a second conductivity-type semiconductor layer sequentially formed on the substrate and divided by an isolation region to provide a plurality of light emitting cells, an intermediate separation layer interposed between the base semiconductor layer and the first conductivity-type semiconductor layer, a plurality of first and second electrodes connected to the first and second conductivity-type semiconductor layers, respectively, of the plurality of light emitting cells, and a wiring unit connecting the first and second electrodes of different light emitting cells. | 08-22-2013 |
Patent application number | Description | Published |
20080265432 | MULTI-CHIP PACKAGE AND METHOD OF MANUFACTURING THE MULTI-CHIP PACKAGE - A multi-chip package includes a mounting substrate, a first semiconductor chip, a second semiconductor chip, a reinforcing member, conductive wires and an encapsulant. The first semiconductor chip is disposed on the mounting substrate. The second semiconductor chip is disposed on the first semiconductor chip. An end portion of the second semiconductor chip protrudes from a side portion of the first semiconductor chip. A reinforcing member is disposed on an overlapping region of the second semiconductor chip where the second semiconductor chip overlaps with the side portion of the first semiconductor chip such that the reinforcing member decreases downward bending of the second semiconductor chip from the side portion of the first semiconductor chip. The conductive wires electrically connect the first and second semiconductor chips to the mounting substrate. The encapsulant is disposed on the mounting substrate to cover the first and second semiconductor chips and the conductive wires. | 10-30-2008 |
20080283996 | SEMICONDUCTOR PACKAGE USING CHIP-EMBEDDED INTERPOSER SUBSTRATE - A semiconductor package using a chip-embedded interposer substrate is provided. The chip-embedded interposer substrate includes a chip including a plurality of chip pads; a substrate having the chip mounted thereon and including a plurality of redistribution pads for redistributing the chip pads; bonding wires for connecting the chip pads to the redistribution pads; a protective layer having via holes for exposing the redistribution pads while burying the chip and the substrate; and vias connected to the redistribution pads through the via holes. The semiconductor package including chips of various sizes is fabricated using the chip-embedded interposer substrate. | 11-20-2008 |
20080290513 | SEMICONDUCTOR PACKAGE HAVING MOLDED BALLS AND METHOD OF MANUFACTURING THE SAME - Provided are a semiconductor package having molded balls on a bottom surface of a PCB and a method of manufacturing the semiconductor package. The semiconductor package includes: a semiconductor chip mounting member comprising circuit patterns on a first surface, an insulating layer defining openings exposing at least portions of the circuit patterns, and external contact terminals arranged on the portions of circuit patterns exposed by the openings; a semiconductor chip formed on a second surface of the semiconductor chip mounting member and electrically connected to the semiconductor chip mounting member; a first sealing portion coating the second surface of the semiconductor chip mounting member and the semiconductor chip; and a second sealing portion arranged on the insulating layer and the external contact terminals such that at least portions of the external contact terminals are exposed. | 11-27-2008 |
20080308935 | SEMICONDUCTOR CHIP PACKAGE, SEMICONDUCTOR PACKAGE INCLUDING SEMICONDUCTOR CHIP PACKAGE, AND METHOD OF FABRICATING SEMICONDUCTOR PACKAGE - Provided are a semiconductor chip package, a semiconductor package, and a method of fabricating the same. In some embodiments, the semiconductor chip packages includes a semiconductor chip including an active surface, a rear surface, and side surfaces, bump solder balls provided on bonding pads formed on the active surface, and a molding layer provided to cover the active surface and expose portions of the bump solder balls. The molding layer between adjacent bump solder balls may have a meniscus concave surface, where a height from the active surface to an edge of the meniscus concave surface contacting the bump solder ball is about a 1/7 length of the maximum diameter of a respective bump solder ball at below or above a section of the bump solder ball having the maximum diameter. | 12-18-2008 |
20090115069 | SEMICONDUCTOR CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME - A semiconductor chip package having a molding layer is provided. The semiconductor chip package includes a semiconductor chip, a plurality of external connection terminals, and the molding layer. The semiconductor chip comprises a backside surface, side surfaces, and an active surface having a plurality of chip pads disposed thereon. The molding layer substantially covers the backside surface, the side surfaces, and the active surface of the semiconductor chip and defines at least one opening exposing a portion of the backside surface of the semiconductor chip. A multi-chip package including the semiconductor chip package and a method of manufacturing the semiconductor chip package are also provided. | 05-07-2009 |
Patent application number | Description | Published |
20090309206 | SEMICONDUCTOR PACKAGE AND METHODS OF MANUFACTURING THE SAME - A semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package includes a first package that a first semiconductor chip is mounted on a front side of a first substrate and a redistributed pad including a first redistributed pad electrically connected to the first substrate and a second redistributed pad electrically connected to the first redistributed pad is disposed on the first semiconductor chip and a second package that a second semiconductor chip is mounted on a front side of a second substrate, the second package including a connection member electrically connected to the second redistributed pad. The connection member electrically connected to the redistributed pad electrically connects the first and second packages to each other. | 12-17-2009 |
20100230811 | SEMICONDUCTOR DEVICE HAVING A CONDUCTIVE BUMP - In one embodiment, a semiconductor device includes a semiconductor substrate and a bonding pad disposed thereon. The semiconductor device also includes a passivation layer, a buffer layer, and an insulating layer sequentially stacked on the semiconductor substrate. According to one aspect, a first recess is defined within the passivation layer, the buffer layer, and the insulating layer to expose at least a region of the bonding pad and a second recess is defined within the insulating layer to expose at least a region of the buffer layer and spaced apart from the first recess such that a portion of the insulating layer is interposed therebetween. Further, the semiconductor device includes a conductive solder bump disposed within the first and second recesses. The conductive solder bump may be connected to the bonding pad in the first recess and supported by the buffer layer through a protrusion of the conductive solder bump extending into the second recess. | 09-16-2010 |
20110079897 | INTEGRATED CIRCUIT CHIP AND FLIP CHIP PACKAGE HAVING THE INTEGRATED CIRCUIT CHIP - In an integrated circuit (IC) chip and a flip chip package having the same, no wiring line is provided and the first electrode pad does not make contact with the wiring line in a pad area of the IC chip. Thus, the first bump structure makes contact with the first electrode regardless of the wiring line in the pad area. The second electrode pad makes contact with the wiring line in a pseudo pad area of the IC chip. Thus, the second bump structure in the pseudo pad area makes contact with an upper surface of the second electrode at a contact point(s) spaced apart from the wiring line under the second electrode. | 04-07-2011 |
20110193181 | SEMICONDUCTOR DEVICE HAVING DIFFERENT METAL GATE STRUCTURES - A semiconductor includes a channel region in a semiconductor substrate, a gate dielectric film on the channel region, and a gate on the gate dielectric film. The gate includes a doped metal nitride film, formed from a nitride of a first metal and doped with a second metal which is different from the first metal, and a conductive polysilicon layer formed on the doped metal nitride film. The gate may further include a metal containing capping layer interposed between the doped metal nitride film and the conductive polysilicon layer. | 08-11-2011 |
20110193228 | MOLDED UNDERFILL FLIP CHIP PACKAGE PREVENTING WARPAGE AND VOID - A molded underfill flip chip package may include a printed circuit board, a semiconductor chip mounted on the printed circuit board, and a sealant. The printed circuit board has at least one resin passage hole passing through the printed circuit board and at least one resin channel on a bottom surface of the printed circuit board, the at least one resin channel extending from the at least one resin passage hole passing through the printed circuit board. The sealant seals a top surface of the printed circuit board, the semiconductor chip, the at least one resin passage hole, and the at least one resin channel. | 08-11-2011 |
20110244634 | SEMICONDUCTOR PACKAGE AND METHODS OF MANUFACTURING THE SAME - A semiconductor package and a method of manufacturing the semiconductor package. The semiconductor package includes a first package that a first semiconductor chip is mounted on a front side of a first substrate and a redistributed pad including a first redistributed pad electrically connected to the first substrate and a second redistributed pad electrically connected to the first redistributed pad is disposed on the first semiconductor chip and a second package that a second semiconductor chip is mounted on a front side of a second substrate, the second package including a connection member electrically connected to the second redistributed pad. The connection member electrically connected to the redistributed pad electrically connects the first and second packages to each other. | 10-06-2011 |
20130009286 | SEMICONDUCTOR CHIP AND FLIP-CHIP PACKAGE COMPRISING THE SAME - A semiconductor chip includes stress-relief to mitigate the effects of differences in coefficients of thermal expansion (CTE) between a printed circuit board (PCB) and a semiconductor chip and a flip-chip package including the semiconductor chip. The semiconductor chip includes a stress-relief buffer coupling a bump and a semiconductor chip pad. | 01-10-2013 |
20130150197 | POWER STRUCTURE OF HYBRID SYSTEM - Provided is a power structure of a hybrid system. In particular, the power structure of a hybrid system includes a planetary gear part including a sun gear, a carrier, and a ring gear, a first motor connected with the sun gear, a second motor connected with the ring gear, an engine and a brake connected with the carrier to drive a hybrid car by two motors at the time of EV traveling, thereby improving traveling performance and increase an EV region without increasing the motor size, thereby improving fuel efficiency. | 06-13-2013 |
20130256847 | SEMICONDUCTOR DEVICES INCLUDING ELECTROMAGNETIC INTERFERENCE SHIELD - Provided are a semiconductor device including an EMI shield, a method of manufacturing the same, a semiconductor module including the semiconductor device, and an electronic system including the semiconductor device. The semiconductor device includes a lower semiconductor package, an upper semiconductor package, a package bump, and an EMI shield. The lower semiconductor package includes a lower substrate, a lower semiconductor chip mounted on the lower substrate, and a ground wire separated from the lower semiconductor chip. The upper semiconductor package includes an upper substrate stacked on the lower semiconductor package, and an upper semiconductor chip stacked on the upper substrate. The package bump electrically connects the upper semiconductor package and the lower semiconductor package. The EMI shield covers the upper and lower semiconductor packages and is electrically connected to the ground wire. | 10-03-2013 |
20130256917 | SEMICONDUCTOR PACKAGES - A semiconductor package includes a master chip and a slave chip stacked on a substrate. The master chip and the slave chip are connected to one another by a bonding wire. The master chip and the slave chip are connected in series with an external circuit. The semiconductor package may have a low loading factor and excellent performance, and may be mass produced at low costs. | 10-03-2013 |
20140167177 | SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME - A semiconductor device includes a channel layer over an active region, first and second field regions adjacent the active region, and a gate structure over the channel layer and portions of the first and second field regions. The first and second field regions include grooves adjacent respective sidewalls of the channel layer, and bottom surfaces of the grooves are below a bottom surface of the channel layer. | 06-19-2014 |
20140363960 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - Provided are methods for fabricating a semiconductor device. A gate dielectric layer is formed on a substrate including first through third regions. A first functional layer is formed on only the first region of the first through third regions. A second functional layer is formed on only the first and second regions of the first through third regions. A threshold voltage adjustment layer is formed on the first through third regions. The threshold voltage adjustment layer includes a work function adjustment material. The work function adjustment material is diffused into the gate dielectric layer by performing a heat treatment process with respect to the substrate. | 12-11-2014 |
20150037937 | SEMICONDUCTOR DEVICES INCLUDING ELECTROMAGNETIC INTERFERENCE SHIELD - Provided are a semiconductor device including an EMI shield, a method of manufacturing the same, a semiconductor module including the semiconductor device, and an electronic system including the semiconductor device. The semiconductor device includes a lower semiconductor package, an upper semiconductor package, a package bump, and an EMI shield. The lower semiconductor package includes a lower substrate, a lower semiconductor chip mounted on the lower substrate, and a ground wire separated from the lower semiconductor chip. The upper semiconductor package includes an upper substrate stacked on the lower semiconductor package, and an upper semiconductor chip stacked on the upper substrate. The package bump electrically connects the upper semiconductor package and the lower semiconductor package. The EMI shield covers the upper and lower semiconductor packages and is electrically connected to the ground wire. | 02-05-2015 |
20150041913 | SEMICONDUCTOR DEVICE HAVING TRI-GATE TRANSISTOR AND METHOD OF MANUFACTURING THE SAME - A semiconductor device includes a substrate including an NMOS region, a fin active region protruding from the substrate in the NMOS region, the fin active region including an upper surface and a sidewall, a gate dielectric layer on the upper surface and the sidewall of the fin active region, a first metal gate electrode on the gate dielectric layer, the first metal gate electrode having a first thickness at the upper surface of the fin active region and a second thickness at the sidewall of the fin active region, and a second metal gate electrode on the first metal gate electrode, the second metal gate electrode having a third thickness at the upper surface of the fin active region and a fourth thickness at the sidewall of the fin active region, wherein the third thickness is less than the fourth thickness. | 02-12-2015 |
20150187763 | SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING SEMICONDUCTOR DEVICES - Semiconductor devices are provided. A semiconductor device includes a substrate including first through fourth areas. Moreover, first through fourth gate insulating layers are on the first through fourth areas, respectively. Amounts of work function control materials in the first through fourth gate insulating layers, nitrogen concentrations in the first through fourth gate insulating layers, and/or thicknesses of the first through fourth gate insulating layers vary among the first through fourth gate insulating layers. Methods for fabricating semiconductor devices are also provided. | 07-02-2015 |
20150243607 | METHOD OF MANUFACTURING SEMICONDUCTOR PACKAGE HAVING MAGNETIC SHIELD UNIT - A method of manufacturing a semiconductor package having a magnetic shield function is provided. The method includes forming cracks in a lattice structure on an active surface in which electrode terminals are formed; grinding a back surface of a wafer facing the active surface, bonding a tape on the active surface of the wafer, expanding the tape such that the wafer on the tape is divided as semiconductor chips, forming a shield layer on surfaces of the semiconductor chips and the tape, cutting the shield layer between the semiconductor chips and individualizing as each of the semiconductor chips which has a first shield pattern formed on back surface and sides, bonding the semiconductor chips on a substrate, and forming a second shield pattern on each of the active surfaces of the semiconductor chips, wherein the semiconductor chips and the substrate are physically and electrically connected by a bonding wire. | 08-27-2015 |
20150270177 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - Provided is a method for fabricating a semiconductor device. The method includes forming an interlayer insulating layer on a substrate, the interlayer insulating layer including a first trench; forming a high-k dielectric layer in the first trench; successively forming a diffusion layer and a blocking layer on the high-k dielectric layer; subsequently performing annealing; after the annealing, successively removing the blocking layer and the diffusion layer; forming a first barrier layer on the high-k dielectric layer; successively forming a work function adjustment layer and a gate conductor on the first barrier layer; and forming a capping layer on the gate conductor. | 09-24-2015 |
20150357298 | SEMICONDUCTOR CHIP, SEMICONDUCTOR PACKAGE HAVING THE SAME AND METHOD OF MANUFACTURING THE SAME - A semiconductor chip includes a semiconductor chip die having a first surface and a second surface facing the first surface, a connection pad on the first surface of the semiconductor chip die, and a redistribution pad arranged on the first surface of the semiconductor chip die and electrically connected to the connection pad and including an end portion having a concave-convex structure and extended to a lateral surface of the semiconductor chip die. | 12-10-2015 |