Schmalzbauer
Uwe Schmalzbauer, Unterfohring DE
Patent application number | Description | Published |
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20080296668 | SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE - A semiconductor device has a substrate having a plurality of neighboring trenches, and a contact area, one mesa stripe each being formed between two neighboring trenches. The contact area contacts mesa stripes and surrounds an opening region in which the contact area is not formed and which is formed such that the contact area contacts the same mesa stripes at two positions between which the opening region is arranged, and the opening region having a region of elongate extension which intersects the mesa stripes in a skewed or perpendicular manner. | 12-04-2008 |
Uwe Schmalzbauer, Honenkirchen-Siegeatbiaan DE
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20080265427 | Anchoring Structure and Intermeshing Structure - An anchoring structure for a metal structure of a semiconductor device includes an anchoring recess structure having at least one overhanging side wall, the metal structure being at least partly arranged within the anchoring recess structure. | 10-30-2008 |
Uwe Schmalzbauer, Siegertsbrunn DE
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20140027772 | Wafers and Chips Comprising Test Structures - Wafers with chips thereon and corresponding chips are provided where test structures or parts thereof are provided in a peripheral chip area of the chip. Corresponding methods are also disclosed. | 01-30-2014 |
20140167043 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING A SEMICONDUCTOR DEVICE - A semiconductor device includes a semiconductor substrate including a main surface with a polygonal geometry and a main electric circuit manufactured within a main region on the semiconductor substrate. The main electric circuit is operable to perform an electric main function. The main region extends over the main surface of the semiconductor substrate leaving open at least one corner area at a corner of the polygonal geometry of the main surface of the semiconductor substrate. The corner area extends at least 300 μm along the edges of the semiconductor substrate beginning at the corner. | 06-19-2014 |
20140167044 | Semiconductor Device and Method for Manufacturing a Semiconductor Device - A semiconductor device includes a semiconductor substrate including a main surface with a polygonal geometry and a main electric circuit manufactured within a main region on the semiconductor substrate. The main electric circuit is operable to perform an electric main function. The main region extends over the main surface of the semiconductor substrate leaving open at least one corner area at a corner of the polygonal geometry of the main surface of the semiconductor substrate. The corner area extends at least 300 μm along the edges of the semiconductor substrate beginning at the corner. | 06-19-2014 |
20140346509 | Semiconductor Component with Integrated Crack Sensor and Method for Detecting a Crack in a Semiconductor Component - A first embodiment relates to a semiconductor component. The semiconductor component has a semiconductor body with a bottom side and a top side spaced distant from the bottom side in a vertical direction. In the vertical direction, the semiconductor body has a certain thickness. The semiconductor component further has a crack sensor configured to detect a crack in the semiconductor body. The crack sensor extends into the semiconductor body. A distance between the crack sensor and the bottom side is less than the thickness of the semiconductor body. | 11-27-2014 |
Uwe Schmalzbauer, Hoehenkirchen-Siegertsbrunn DE
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20140042597 | SEMICONDUCTOR DEVICE INCLUDING A STRESS RELIEF LAYER AND METHOD OF MANUFACTURING - A semiconductor device includes a main body having a single crystalline semiconductor body. A layered structure directly adjoins a central portion of a main surface of the main body and includes a hard dielectric layer provided from a first dielectric material with Young's modulus greater than 10 GPa. A stress relief layer directly adjoins the layered structure opposite to the main body and extends beyond an outer edge of the layered structure. Providing the layered structure at a distance to the edge of the main body and covering the outer surface of the layered structures with the stress relief layer enhances device reliability. | 02-13-2014 |
Uwe Schmalzbauer, Hoehenklrchen-Siegertsbrunn DE
Patent application number | Description | Published |
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20140315391 | Method of Manufacturing a Semiconductor Device Including a Stress Relief Layer - A method of manufacturing a semiconductor device includes providing a layered structure having a hard dielectric layer containing a first dielectric material having a Young's modulus greater than 10 GPa in a central portion of a main surface of a main body comprising a single crystalline semiconductor body, and providing a dielectric stress relief layer containing a second dielectric material having a lower Young's modulus than the first dielectric material, the stress relief layer covering the layered structure and extending beyond an outer edge of the layered structure. | 10-23-2014 |