Patent application number | Description | Published |
20110189273 | AMANTADINE COMPOSITIONS AND METHODS OF USE - Methods of nighttime administration of amantadine to reduce sleep disturbances in patient undergoing treatment with amantadine are described, as well as compositions of extended release amantadine that are suitable for nighttime administration. | 08-04-2011 |
20140242163 | AMANTADINE COMPOSITIONS AND METHODS OF USE - Methods of nighttime administration of amantadine to reduce sleep disturbances in patient undergoing treatment with amantadine are described, as well as compositions of extended release amantadine that are suitable for nighttime administration. | 08-28-2014 |
20150045438 | AMANTADINE COMPOSITIONS AND METHODS OF USE - Methods of nighttime administration of amantadine to reduce sleep disturbances in patient undergoing treatment with amantadine are described, as well as compositions of extended release amantadine that are suitable for nighttime administration. | 02-12-2015 |
20150045439 | AMANTADINE COMPOSITIONS AND METHODS OF USE - Methods of nighttime administration of amantadine to reduce sleep disturbances in patient undergoing treatment with amantadine are described, as well as compositions of extended release amantadine that are suitable for nighttime administration. | 02-12-2015 |
20150045446 | AMANTADINE COMPOSITIONS AND METHODS OF USE - Methods of nighttime administration of amantadine to reduce sleep disturbances in patient undergoing treatment with amantadine are described, as well as compositions of extended release amantadine that are suitable for nighttime administration. | 02-12-2015 |
20150045447 | AMANTADINE COMPOSITIONS AND METHODS OF USE - Methods of nighttime administration of amantadine to reduce sleep disturbances in patient undergoing treatment with amantadine are described, as well as compositions of extended release amantadine that are suitable for nighttime administration. | 02-12-2015 |
20150045448 | AMANTADINE COMPOSITIONS AND METHODS OF USE - Methods of nighttime administration of amantadine to reduce sleep disturbances in patient undergoing treatment with amantadine are described, as well as compositions of extended release amantadine that are suitable for nighttime administration. | 02-12-2015 |
20150051292 | AMANTADINE COMPOSITIONS AND METHODS OF USE - Methods of nighttime administration of amantadine to reduce sleep disturbances in patient undergoing treatment with amantadine are described, as well as compositions of extended release amantadine that are suitable for nighttime administration. | 02-19-2015 |
20150057355 | AMANTADINE COMPOSITIONS AND METHODS OF USE - Methods of nighttime administration of amantadine to reduce sleep disturbances in patient undergoing treatment with amantadine are described, as well as compositions of extended release amantadine that are suitable for nighttime administration. | 02-26-2015 |
Patent application number | Description | Published |
20080213997 | SELECTIVE COPPER-SILICON-NITRIDE LAYER FORMATION FOR AN IMPROVED DIELECTRIC FILM/COPPER LINE INTERFACE - A process to form a copper-silicon-nitride layer on a copper surface on a semiconductor wafer is described. The process may include the step of exposing the wafer to a first plasma made from helium. The process may also include exposing the wafer to a second plasma made from a reducing gas, where the second plasma removes copper oxide from the copper surface, and exposing the wafer to silane, where the silane reacts with the copper surface to selectively form copper silicide. The process may further include exposing the wafer to a third plasma made from ammonia and molecular nitrogen to form the copper silicon nitride layer. | 09-04-2008 |
20090269923 | ADHESION AND ELECTROMIGRATION IMPROVEMENT BETWEEN DIELECTRIC AND CONDUCTIVE LAYERS - A method and apparatus for processing a substrate is provided. The method of processing a substrate includes providing a substrate comprising a conductive material, performing a pre-treatment process on the conductive material, flowing a silicon based compound on the conductive material to form a silicide layer, performing a post treatment process on the silicide layer, and depositing a barrier dielectric layer on the substrate. | 10-29-2009 |
20090286402 | METHOD FOR CRITICAL DIMENSION SHRINK USING CONFORMAL PECVD FILMS - A method and apparatus for forming narrow vias in a substrate is provided. A pattern recess is etched into a substrate by conventional lithography. A thin conformal layer is formed over the surface of the substrate, including the sidewalls and bottom of the pattern recess. The thickness of the conformal layer reduces the effective width of the pattern recess. The conformal layer is removed from the bottom of the pattern recess by anisotropic etching to expose the substrate beneath. The substrate is then etched using the conformal layer covering the sidewalls of the pattern recess as a mask. The conformal layer is then removed using a wet etchant. | 11-19-2009 |
20090325381 | PREVENTION AND REDUCTION OF SOLVENT AND SOLUTION PENETRATION INTO POROUS DIELECTRICS USING A THIN BARRIER LAYER - A method and apparatus for treating a substrate is provided. A porous dielectric layer is formed on the substrate. In some embodiments, the dielectric may be capped by a dense dielectric layer. The dielectric layers are patterned, and a dense dielectric layer deposited conformally over the substrate. The dense conformal dielectric layer seals the pores of the porous dielectric layer against contact with species that may infiltrate the pores. The portion of the dense conformal pore-sealing dielectric layer covering the field region and bottom portions of the pattern openings is removed by directional selective etch. | 12-31-2009 |
20120208366 | PREVENTION AND REDUCTION OF SOLVENT AND SOLUTION PENETRATION INTO POROUS DIELECTRICS USING A THIN BARRIER LAYER - A method and apparatus for treating a substrate is provided. A porous dielectric layer is formed on the substrate. In some embodiments, the dielectric may be capped by a dense dielectric layer. The dielectric layers are patterned, and a dense dielectric layer deposited conformally over the substrate. The dense conformal dielectric layer seals the pores of the porous dielectric layer against contact with species that may infiltrate the pores. The portion of the dense conformal pore-sealing dielectric layer covering the field region and bottom portions of the pattern openings is removed by directional selective etch. | 08-16-2012 |
Patent application number | Description | Published |
20110092077 | METHOD TO MINIMIZE WET ETCH UNDERCUTS AND PROVIDE PORE SEALING OF EXTREME LOW K (K<2.5) DIELECTRICS - Methods of processing films on substrates are provided. In one aspect, the methods comprise treating a patterned low dielectric constant film after a photoresist is removed form the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and/or nitrogen on the film. The thin layer provides a carbon-rich, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet cleaning processes and penetration by precursors for layers that are subsequently deposited on the low dielectric constant film. | 04-21-2011 |
20120196450 | METHOD TO INCREASE SILICON NITRIDE TENSILE STRESS USING NITROGEN PLASMA IN-SITU TREATMENT AND EX-SITU UV CURE - Stress of a silicon nitride layer may be enhanced by deposition at higher temperatures. Employing an apparatus that allows heating of a substrate to substantially greater than 400° C. (for example a heater made from ceramic rather than aluminum), the silicon nitride film as-deposited may exhibit enhanced stress allowing for improved performance of the underlying MOS transistor device. In accordance with some embodiments, a deposited silicon nitride film is exposed to curing with plasma and ultraviolet (UV) radiation, thereby helping remove hydrogen from the film and increasing film stress. In accordance with other embodiments, a silicon nitride film is formed utilizing an integrated process employing a number of deposition/curing cycles to preserve integrity of the film at the sharp corner of the underlying raised feature. Adhesion between successive layers may be promoted by inclusion of a post-UV cure plasma treatment in each cycle. | 08-02-2012 |
20120196452 | METHOD TO INCREASE TENSILE STRESS OF SILICON NITRIDE FILMS USING A POST PECVD DEPOSITION UV CURE - High tensile stress in a deposited layer, such as a silicon nitride layer, may be achieved utilizing one or more techniques employed either alone or in combination. In one embodiment, a silicon nitride film having high tensile stress may be formed by depositing the silicon nitride film in the presence of a porogen. The deposited silicon nitride film may be exposed to at least one treatment selected from a plasma or ultraviolet radiation to liberate the porogen. The silicon nitride film may be densified such that a pore resulting from liberation of the porogen is reduced in size, and Si—N bonds in the silicon nitride film are strained to impart a tensile stress in the silicon nitride film. In another embodiment, tensile stress in a silicon nitride film may be enhanced by depositing a silicon nitride film in the presence of a nitrogen-containing plasma at a temperature of less than about 400° C., and exposing the deposited silicon nitride film to ultraviolet radiation. | 08-02-2012 |
Patent application number | Description | Published |
20110298099 | SILICON DIOXIDE LAYER DEPOSITED WITH BDEAS - A silicon dioxide layer is deposited onto a substrate using a process gas comprising BDEAS and an oxygen-containing gas such as ozone. The silicon dioxide layer can be part of an etch-resistant stack that includes a resist layer. In another version, the silicon dioxide layer is deposited into through holes to form an oxide liner for through-silicon vias. | 12-08-2011 |
20120097330 | DUAL DELIVERY CHAMBER DESIGN - A substrate processing system includes a thermal processor or a plasma generator adjacent to a processing chamber. A first processing gas enters the thermal processor or plasma generator. The first processing gas then flows directly through a showerhead into the processing chamber. A second processing gas flows through a second flow path through the showerhead. The first and second processing gases are mixed below the showerhead and a layer of material is deposited on a substrate under the showerhead. | 04-26-2012 |
20120289049 | COPPER OXIDE REMOVAL TECHNIQUES - A method for the removal of copper oxide from a copper and dielectric containing structure of a semiconductor chip is provided. The copper and dielectric containing structure may be planarized by chemical mechanical planarization (CMP) and treated by the method to remove copper oxide and CMP residues. Annealing in a hydrogen (H | 11-15-2012 |
20130130405 | APPARATUS AND METHODS FOR SILICON OXIDE CVD RESIST PLANARIZATION - Embodiments of the present invention provide methods and apparatus for forming a patterned magnetic layer for use in magnetic media. According to embodiments of the present application, a silicon oxide layer formed by low temperature chemical vapor deposition is used to form a pattern in a hard mask layer, and the patterned hard mask is used to form a patterned magnetic layer by plasma ion implantation. | 05-23-2013 |
20130230986 | ADHESION IMPROVEMENT FOR LOW K DIELECTRICS TO CONDUCTIVE MATERIALS - Methods are provided for processing a substrate for depositing an adhesion layer between a conductive material and a dielectric layer. In one aspect, the invention provides a method for processing a substrate including positioning a substrate having a conductive material disposed thereon, introducing a reducing compound or a silicon based compound, exposing the conductive material to the reducing compound or the silicon based compound, and depositing a silicon carbide layer without breaking vacuum. | 09-05-2013 |
20130333923 | MODULATED COMPOSITIONAL AND STRESS CONTROLLED MULTILAYER ULTRATHIN CONFORMAL SiNx DIELECTRICS USED IN NANO DEVICE FABRICATION - A layer of silicon nitride having a thickness from 0.5 nanometers to 2.4 nanometers is deposited on a substrate. A plasma nitridation process is carried out on the layer. These steps are repeated for a plurality of additional layers of silicon nitride, until a predetermined thickness is attained. Such steps can be used to provide a multilayer silicon nitride dielectric formed on a substrate having an upper surface of dielectric material with Cu and other conductors embedded within, and a plurality of steps. The multilayer silicon nitride dielectric has a plurality of individual layers each having a thickness from 0.5 nanometers to 2.4 nanometers, and the multilayer silicon nitride dielectric conformally covers the steps of the substrate with a conformality of at least seventy percent. A multilayer silicon nitride dielectric, and a multilevel back end of line interconnect wiring structure using same, are also provided. | 12-19-2013 |
20140273438 | CU/BARRIER INTERFACE ENHANCEMENT - Embodiments of the present invention provide processes to selectively form a metal layer on a conductive surface, followed by flowing a silicon based compound over the metal layer to form a metal silicide layer. In one embodiment, a substrate having a conductive surface and a dielectric surface is provided. A metal layer is then deposited on the conductive surface. A metal silicide layer is formed as a result of flowing a silicon based compound over the metal layer. A dielectric is formed over the metal silicide layer. | 09-18-2014 |
20140273516 | VBD AND TDDB IMPROVEMENT THRU INTERFACE ENGINEERING - Methods for the repair of damaged low k films are provided. In one embodiment, the method comprises providing a substrate having a low k dielectric film deposited thereon, and exposing a surface of the low k dielectric film to an activated carbon-containing precursor gas to form a conformal carbon-containing film on the surface of the low k dielectric film, wherein the carbon-containing precursor gas has at least one or more Si—N—Si linkages in the molecular structure. | 09-18-2014 |
20140349480 | COBALT SELECTIVITY IMPROVEMENT IN SELECTIVE COBALT PROCESS SEQUENCE - Embodiments of the invention provide processes to selectively form a cobalt layer on a copper surface over exposed dielectric surfaces. Embodiments described herein control selectivity of deposition by preventing damage to the dielectric surface, repairing damage to the dielectric surface, such as damage which can occur during the cobalt deposition process, and controlling deposition parameters for the cobalt layer. | 11-27-2014 |
Patent application number | Description | Published |
20090087977 | LOW TEMPERATURE CONFORMAL OXIDE FORMATION AND APPLICATIONS - The present invention generally provides apparatus and method for processing a semiconductor substrate. Particularly, embodiments of the present invention relate to a method and apparatus for forming semiconductor devices having a conformal silicon oxide layer formed at low temperature. One embodiment of the present invention provides a method for forming a semiconductor gate structure. The method comprises forming a gate stack on a semiconductor substrate, forming a conformal silicon oxide layer on the semiconductor substrate using a low temperature cyclic method, and forming a spacer layer on the conformal silicon oxide layer. | 04-02-2009 |
20090093100 | METHOD FOR FORMING AN AIR GAP IN MULTILEVEL INTERCONNECT STRUCTURE - The present invention generally provides a method for forming multilevel interconnect structures, including multilevel interconnect structures that include an air gap. One embodiment provides a method for forming conductive lines in a semiconductor structure comprising forming trenches in a first dielectric layer, wherein air gaps are to be formed in the first dielectric layer, depositing a conformal dielectric barrier film in the trenches, wherein the conformal dielectric barrier film comprises a low k dielectric material configured to serve as a barrier against a wet etching chemistry used in forming the air gaps in the first dielectric layer, depositing a metallic diffusion barrier film over the conformal low k dielectric layer, and depositing a conductive material to fill the trenches. | 04-09-2009 |
20090093112 | METHODS AND APPARATUS OF CREATING AIRGAP IN DIELECTRIC LAYERS FOR THE REDUCTION OF RC DELAY - A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches. | 04-09-2009 |
20110104891 | METHODS AND APPARATUS OF CREATING AIRGAP IN DIELECTRIC LAYERS FOR THE REDUCTION OF RC DELAY - A method and apparatus for generating air gaps in a dielectric material of an interconnect structure. One embodiment provides a method for forming a semiconductor structure comprising depositing a first dielectric layer on a substrate, forming trenches in the first dielectric layer, filling the trenches with a conductive material, planarizing the conductive material to expose the first dielectric layer, depositing a dielectric barrier film on the conductive material and exposed first dielectric layer, depositing a hard mask layer over the dielectric barrier film, forming a pattern in the dielectric barrier film and the hard mask layer to expose selected regions of the substrate, oxidizing at least a portion of the first dielectric layer in the selected region of the substrate, removing oxidized portion of the first dielectric layer to form reversed trenches around the conductive material, and forming air gaps in the reversed trenches while depositing a second dielectric material in the reversed trenches. | 05-05-2011 |
20120276301 | ADHESION IMPROVEMENT OF DIELECTRIC BARRIER TO COPPER BY THE ADDITION OF THIN INTERFACE LAYER - Embodiments described herein provide a method of processing a substrate. The method includes depositing an interface adhesion layer between a conductive material and a dielectric material such that the interface adhesion layer provides increased adhesion between the conductive material and the dielectric material. In one embodiment a method for processing a substrate is provided. The method comprises depositing an interface adhesion layer on a substrate comprising a conductive material, exposing the interface adhesion layer to a nitrogen containing plasma, and depositing a dielectric layer on the interface adhesion layer after exposing the interface adhesion layer to the nitrogen containing plasma. | 11-01-2012 |
Patent application number | Description | Published |
20100089920 | INDUCTION ACTIVATED COVER ASSEMBLY FOR CONTAINER - A cover assembly of a container includes a first part and a second part mounted on an open top of the container, the first part includes an opening and the second part includes a through hole which is located corresponding to the opening. The second part including two sidewalls and each sidewall has a plurality of guide slots such that a plurality of plates are respectively and slidably engaged with the guide slots between the two sidewalls to open the through hole or to close the through hole. A driving unit is located on the second part and driving the plates to move along the guide slots. An induction unit is connected to a front end of the first part and includes an induction member which activates the driving unit. | 04-15-2010 |
20110062277 | AUTOMATIC SENSING AND OUTPUTTING DEVICE - The automatic sensing and outputting device of the present invention includes a base, a shell, a cover and a roller unit. The base has a longitudinal rod extending from an upper side thereof which the shell parallels. The cover pivoted at one ends on the shell and is swayable. The roller unit is rotatably disposed in the shell and is driven by a rotating means. Thereby, the cover and the roller unit are adapted to clamp a sheet-like object therebetween and to output the sheet-like object when the roller unit rotates. | 03-17-2011 |
20110074316 | INDUCTION ACTIVATED COVER ASSEMBLY - An induction activated cover assembly includes a main body, a cover, a covering plate and two pivots. The main body has an opening vertically penetrating the main body. A lateral connecting groove is formed on a top surface of the main body. Two through holes are formed on two ends of the connecting groove respectively. The cover is pivotably disposed on the main body. A lateral connecting body is formed on a rear end of the cover, and the connecting body has a connecting body opening facing downward. Two pivot bores are formed on two ends of the connecting body. The covering plate encloses the connecting body opening. A receiving room is defined between the connecting body and the covering plate for the pivots to be received therein. Each pivot inserts through one of the pivot bores and its corresponding through hole to pivot the cover on the main body. | 03-31-2011 |
20130036541 | SENSOR-ACTIVATED TOILET SEAT - The present invention is to provide a sensor-activated toilet seat, including a base body, a toilet lid, a seat, a controller, a first lid lifter, a second lid lifter, a first sensor, a second sensor and an electricity device. The controller comprises a micro processor. When the first sensor detects a human body, the micro processor starts up the second sensor and makes the toilet lid pivot to a lifting position. When the first sensor detects the human body again, the seat pivots to the lifting position. And when the human body is away from the second sensor, the micro processor would make the toilet lid and the seat pivot to a closing position with closing the second sensor. Thus, the sensor-activated toilet seat of the present invention provides a two-stage method of an auto-lifting toilet lid. | 02-14-2013 |
20130213965 | GARBAGE CONTAINER - A garbage container of the present invention includes a main body, a sensor, a pedal, a connecting member, a driving mechanism, and a lid. A receiving opening is formed on a top of the main body. The pedal contacts with the sensor. The lid connects with the connecting member. When the pedal is pressed or released, a resistance of the sensor changes, and then the sensor sends a signal to a controller. After receiving signals, the controller drives the connecting member to elevate or to descend via the driving mechanism. When the pedal is pressed, the connecting member is elevated, and the lid is lifted to enable the receiving opening to communicate with an external space. When the connecting member is descended, the lid covers the receiving opening to unenable the receiving opening to communicate with the external space. | 08-22-2013 |
20150021325 | TISSUE PAPER BOX WITH AUTOMATIC LID - A tissue paper box with automatic lid includes a case, a lid pivotally disposed on a top of a rear wall of the case, and at least one induction devices disposed on fringe of the lid. The rear wall of the case is hollow for receiving a driving mechanism, a deceleration mechanism, a circuit board, and a power supply. When the induction device detects objects approaching, the circuit board triggers a pivot axle to rotate via the deceleration mechanism to lift the lid up. Specifically, the pivot axle, the driving mechanism, the deceleration mechanism, the circuit board, and the power supply are arranged on a same plane parallel to the rear wall to reduce volume. | 01-22-2015 |