Patent application number | Description | Published |
20080240471 | ELECTRONIC DEVICE INCLUDING INTERNAL MICROPHONE ARRAY - An electronic device includes a housing, a circuit board, and a microphone array. A plurality of acoustic openings is defined in the housing. The circuit board is placed in the housing. The microphone array is placed on the circuit board for receiving external sound via the acoustic openings in the housing. | 10-02-2008 |
20090196452 | MICROPHONE ASSEMBLY CAPABLE OF AVOIDING DEFORMATION AND SHIFTING OF NON-WOVEN FABRIC - A microphone assembly includes a flexible holder, a microphone, and a piece of non-woven fabric. The flexible holder has a top opening. The microphone is fitted into the flexible holder. The piece of non-woven fabric is attached to the microphone and totally disposed in the top opening of the flexible holder. | 08-06-2009 |
20100187549 | LIGHT EMITTING DIODE PACKAGE - A light emitting diode (LED) package includes a substrate, a plurality of LED chips, and a plurality of electrode pairs. The LED chips are disposed on the substrate, and each of the LED chips is electrically isolated from one another. The electrode pairs are disposed on the substrate, and each of the electrode pairs is electrically isolated from one another. The number of the electrode pairs is equal to the number of the LED chips, and each of the electrode pairs electrically connects one of the LED chips corresponding thereto. | 07-29-2010 |
20100213496 | LIGHT EMITTING DIODE PACKAGE - A light emitting diode (LED) package including a carrier, a housing, at least one LED chip and at least one electrostatic discharge protector (ESD protector) is provided. The housing encapsulating a portion of the carrier has at least one first opening, at least one second opening and a barricade. The barricade separates the first opening from the second opening. The first opening and the second opening expose a first surface of the carrier. The LED chip is disposed on the first surface of the carrier, located in the first opening, and electrically connected to the carrier. The ESD protector is disposed on the first surface of the carrier, located in the second opening, and electrically connected to the carrier. | 08-26-2010 |
20100246877 | Miniature MEMS Condenser Microphone Package and Fabrication Method Thereof - MEMS microphone packages and fabrication methods thereof are disclosed. A MEMS microphone package includes a casing with a conductive part disposed over a substrate, to enclose a cavity. A MEMS acoustic sensing element and an IC chip are disposed inside the cavity. An opening with an acoustic passage connects the cavity to an ambient space. A first ground pad is disposed on a backside of the substrate connecting to the conductive part of the casing through a via hole of the substrate. A second ground pad is disposed on the backside of the substrate connecting to the MEMS acoustic sensing element or the IC chip through an interconnection of the substrate, wherein the first ground pad and the second ground pad are isolated from each other. | 09-30-2010 |
20120306405 | LIGHT CONTROLLER - A light controller is provided in the present invention. The light controller for adjusting a plurality of lights in a space, including a body having a slot, a touch interface and a control module; a spatial information map replaceably contained in the slot and schematically showing an information in the space; a touch interface configured on the body corresponding to the spatial information map and receiving a touch input; and a control module electrically connected with the touch interface and the plurality of lights and setting a controlled relationship on the touch interface with respect to each of the plurality of lights in accordance with the information shown by the spatial information map. | 12-06-2012 |
Patent application number | Description | Published |
20120134416 | Method and Apparatus for Derivation of MV/MVP Candidate for Inter/Skip/Merge Modes - A method and apparatus for deriving a temporal motion vector predictor (MVP) are disclosed. The MVP is derived for a current block of a current picture in Inter, or Merge, or Skip mode based on co-located reference blocks of a co-located block. The co-located reference blocks comprise an above-left reference block of the bottom-right neighboring block of the co-located block. The reference motion vectors associated with the co-located reference blocks are received and used to derive the temporal MVP. Various configurations of co-located reference blocks can be used to practice the present invention. If the MVP cannot be found based on the above-left reference block, search for the MVP can be continued based on other co-located reference blocks. When an MVP is found, the MVP is checked against the previously found MVP. If the MVP is the same as the previously found MVP, the search for MVP continues. | 05-31-2012 |
20120236941 | Method and Apparatus for Derivation of Spatial Motion Vector Candidate and Motion Vector Prediction Candidate - An apparatus and method for deriving a motion vector predictor are disclosed. In video coding systems, the spatial and temporal redundancy is exploited using spatial and temporal prediction to reduce the information to be transmitted or stored. Motion vector prediction has been used to further conserve the bitrate associated with motion vector coding. In a conventional coding system, a motion vector predictor (MVP) is selected from the spatial MVPs and temporal MVP. The spatial MVP according to a conventional approach is based on motion vectors (MVs) of neighboring blocking pointing to a target reference picture in a given reference list. Embodiments according to the present invention perform the MVP search among an extended search set including MVs pointing to other reference pictures in the given reference list or the other reference list and MVs pointing to the target reference picture in the given reference list or the other reference list. Other aspects of the present invention address the search order of the search set and configuration of neighboring blocks. | 09-20-2012 |
20120236942 | Method and Apparatus for Deriving Temporal Motion Vector Prediction - A method and apparatus for deriving a temporal motion vector predictor (MVP) are disclosed. The MVP is derived for a current block of a current picture in Inter, or Merge, or Skip mode based on co-located reference blocks of a co-located block and a flag is used to indicate the co-located picture. More than one co-located reference blocks can be used to derive the temporal MVP and the co-located reference blocks can be selected from the co-located block as well as neighboring blocks of the co-located block. A search set comprises search motion vectors associated with the co-located reference block(s) is formed. The search motion vector (MV) corresponding to the co-located reference block in the same reference list is searched before the search MV in a different reference list. Various schemes to accommodate implicit method of deriving co-located picture are also disclosed. | 09-20-2012 |
20140078254 | Method and Apparatus of Motion and Disparity Vector Prediction and Compensation for 3D Video Coding - A method and apparatus for deriving MV/MVP (motion vector or motion vector predictor) or DV/DVP (disparity vector or disparity vector predictor) associated Skip mode, Merge mode or Inter mode for a block of a current picture in three-dimensional (3D) video coding are disclosed. The 3D video coding may use temporal prediction and inter-view prediction to exploit temporal and inter-view correlation. MV/DV prediction is applied to reduce bitrate associated with MV/DV coding. The MV/MVP or DV/DVP for a block is derived from spatial candidates, temporal candidates and inter-view candidates. For the inter-view candidate, the position of the inter-view co-located block can be located using a global disparity vector (GDV) or warping the current block onto the co-located picture according to the depth information. The candidate can also be derived as the vector corresponding to warping the current block onto the co-located picture according to the depth information. | 03-20-2014 |
20140092981 | METHOD AND APPARATUS FOR REMOVING REDUNDANCY IN MOTION VECTOR PREDICTORS - A method and apparatus of deriving a motion vector predictor (MVP) for a current block in an Inter, Merge, or Skip mode are disclosed. Embodiments according to the present invention determine redundant MVP candidates according to a non-MV-value based criterion. The redundant MVP candidates are then removed from the MVP candidate set. In other embodiments according to the present invention, motion IDs are assigned to MVP candidates to follow the trail of motion vectors associated with the MVP candidate. An MVP candidate having a same motion ID as a previous MVP is redundant and can be removed from the MVP candidate set. In yet another embodiment, redundant MVP candidates correspond to one or more of the MVP candidates that cause the second 2N×N or N×2N PU to be merged into a 2N×2N PU are removed from the MVP candidate set. | 04-03-2014 |
20140241434 | METHOD AND APPARATUS OF MOTION AND DISPARITY VECTOR DERIVATION FOR 3D VIDEO CODING AND HEVC - A method and apparatus for deriving MVP (motion vector predictor) for a block for three-dimensional video coding or multi-view video coding are disclosed. Embodiments according to the present invention replace an unavailable inter-view MV of one neighboring block with a disparity vector derived from depth data of a subset of a depth block corresponding to one neighboring block. A method and apparatus for generating additional candidates for motion vector prediction associated with Merge mode or AMVP (Inter) mode for a block are disclosed. Embodiments according to the present invention generate one or more additional MVP candidates to add to the MVP list if the MVP list size is less than a given list size. The additional MVP candidates are generated either by reducing precision of an available MVP in the MVP list or by adding an offset to the available MVP in the MVP list. | 08-28-2014 |
20140247884 | METHOD AND APPARATUS FOR MV SCALING WITH INCREASED EFFECTIVE SCALING RATIO - A method and apparatus for deriving a scaled MV (motion vector) for a current block based on a candidate MV associated with a candidate block are disclosed. Embodiments according to the present invention increase effective scaling factor of motion vector scaling. In one embodiment, a distance ratio of a first picture distance between a current picture and a target reference picture pointed to by a current motion vector of the current block to a second picture distance between a candidate picture corresponding to the candidate block and a candidate reference picture pointed to by the candidate MV is computed. The scaled MV is then generated based on the candidate MV according to the distance ratio, where the scaled MV has an effective scaling ratio between −m and n, and wherein m and n are positive integers greater than 4. The values of m and n can be 8, 16 or 32. | 09-04-2014 |
20140328389 | METHOD AND APPARATUS OF TEXTURE IMAGE COMPRESSION IN 3D VIDEO CODING - A method and apparatus for 3D video coding system are disclosed. Embodiments according to the present invention apply SAO process (sample adaptive offset process) to at least one dependent-view image of the processed multi-view images if processed multi-view images are received. Also embodiments according to the present invention apply the SAO process to at least one dependent-view image of the processed multi-view images or at least one depth map of the processed multi-view depth maps if both processed multi-view images and the processed multi-view depth maps are received. The SAO can be applied to each color component of the processed multi-view images or the processed multi-view depth maps. The SAO parameters associated with a target region in one dependent-view image or in one depth map corresponding to one view may share or may be predicted by second SAO parameters associated with a source region corresponding to another view. | 11-06-2014 |
20150022633 | METHOD OF FAST ENCODER DECISION IN 3D VIDEO CODING - Multi-view video encoding using early Merge mode decision and/or early CU split termination is disclosed. The present invention encodes a current coding block using the Merge/Skip mode without evaluating coding performance for at least one of Inter modes and Intra modes if the coding conditions associated with the current coding block and a neighboring block set of the current coding block are asserted. The coding conditions may correspond to whether the coding performance of the Skip mode is better than the coding performance of 2N×2N Merge mode for the current coding block and whether all blocks in the neighboring block set select the Merge mode or the Skip mode. Similarly, the process of splitting the current coding block into smaller coding blocks can be terminated without evaluating coding performance associated with the smaller coding blocks from splitting the current coding block if some coding conditions are asserted. | 01-22-2015 |
20150085932 | METHOD AND APPARATUS OF MOTION VECTOR DERIVATION FOR 3D VIDEO CODING - A method and apparatus for deriving MVP (motion vector predictor) for Skip or Merge mode in 3D video coding are disclosed. In one embodiment, the method comprises determining an MVP candidate set for a selected block and selecting one MVP from an MVP list for motion vector coding of the block. The MVP candidate set may comprise multiple spatial MVP candidates associated with neighboring blocks and one inter-view candidate, and the MVP list is selected from the MVP candidate set. The MVP list may consist of only one MVP candidate or multiple MVP candidates. If only one MVP candidate is used, there is no need to incorporate an MVP index associated with the MVP candidate in the video bitstream corresponding to the three-dimensional video coding. Also, the MVP candidate can be the first available MVP candidate from the MVP candidate set according to a pre-defined order. | 03-26-2015 |
20150110170 | Method and Apparatus for Simplified Depth Coding with Extended Prediction Modes - A method and apparatus for Simplified Depth Coding (SDC) with extended Intra prediction modes are disclosed. Embodiments of the present invention use an extended Intra prediction mode set including Horizontal mode and Vertical mode. When the Horizontal mode is selected, the prediction samples for the current depth block are derived based on a reconstructed neighboring depth column adjacent to a left block boundary of the current depth block by generating rows of the prediction samples from the reconstructed neighboring depth column. When the Vertical mode is selected, the prediction samples for the current depth block are derived based on a reconstructed neighboring depth row adjacent to a top block boundary of the current depth block by generating columns of the prediction samples from the reconstructed neighboring depth row. | 04-23-2015 |
20150181229 | Method and Apparatus of Inter-View Candidate Derivation in 3D Video Coding - A method and apparatus for three-dimensional video coding are disclosed. Embodiments according to the present invention apply the pruning process to one or more spatial candidates and at least one of the inter-view candidate and the temporal candidate to generate a retained candidate set. The pruning process removes any redundant candidate among one or more spatial candidates and at least one of the inter-view candidate and the temporal candidate. A Merge/Skip candidate list is then generated, which includes the retained candidate set. In one embodiment, the temporal candidate is exempted from the pruning process. In another embodiment, the inter-view candidate is exempted from the pruning process. In other embodiments of the present invention, the pruning process is applied to the inter-view candidate and two or more spatial candidates. The pruning process compares the spatial candidates with the inter-view candidate. | 06-25-2015 |
20150189321 | Method of Binarization and Context Adaptive Binary Arithmetic Coding of Depth Coding Syntax - A method for improved binarization and entropy coding process of syntax related to depth coding is disclosed. In one embodiment, a first value associated with the current depth block is bypass coded, where the first value corresponds to the residual magnitude of a block coded by an Intra or Inter SDC mode, the delta magnitude of a block coded by a DMM mode, or a residual sign of a block coded by the Inter SDC mode. In another embodiment, a first bin of a binary codeword is coded using arithmetic coding and the rest bins of the binary codeword are coded using bypass coding. The codeword corresponds to the residual magnitude of a block coded by the Intra or Inter SDC mode, or the delta DC magnitude of a block coded by the DMM mode. | 07-02-2015 |
20150189323 | Method of Three-Dimensional and Multiview Video Coding Using a Disparity Vector - A method and apparatus for a three-dimensional or multi-view video encoding or decoding system are disclosed, where a three-dimensional coding tool relying on a disparity vector are adaptively applied depending on whether the inter-view reference picture pointed by the disparity vector is in the reference list associated with the current slice. The three-dimensional coding tool may correspond to the Inter-View Motion Prediction (IVMP) or View Synthesis Prediction (VSP). If the inter-view reference picture pointed by the DV is not in the current reference list associated with the current slice, the selected three-dimensional coding tool is disabled for the current block. If the inter-view reference picture pointed by the DV is in the current reference list associated with the current slice, the selected three-dimensional coding tool can be applied to the current block. | 07-02-2015 |
20150195506 | Method of Reference Picture Selection and Signaling in 3D and Multi-view Video Coding - A method of video coding utilizing ARP (advanced residual prediction) by explicitly signaling the temporal reference picture or deriving the temporal reference picture at the encoder and the decoder using identical process is disclosed. To encode or decode a current block in a current picture from a dependent view, a corresponding block in a reference view corresponding to the current block is determined based on a DV (disparity vector). For the encoder side, the temporal reference picture in the reference view of the corresponding block is explicitly signaled using syntax element(s) in the slice header or derived using an identical process as the decoder. For the decoder side, the temporal reference picture in the reference view of the corresponding block is determined according to the syntax element(s) in the slice header or derived using an identical process as the decoder. The temporal reference picture is then used for ARP. | 07-09-2015 |
20150201214 | METHOD AND APPARATUS OF DISPARITY VECTOR DERIVATION IN 3D VIDEO CODING - A method and apparatus for three-dimensional video encoding or decoding using the disparity vector derived from an associated depth block are disclosed. The method determines an associated depth block for a current texture block and derives a derived disparity vector based on a subset of depth samples of the associated depth block. The subset contains less depth samples than the associated depth block and the subset excludes a single-sample subset cprresponding to a center sample of the associated depth block. The derived disparity vector can be used as an inter-view motion (disparity) vector predictor in Inter mode, an inter-view (disparity) candidate in Merge mode or Skip mode. The derived disparity vector can also be used to locate a reference block for inter-view motion prediction in Inter mode, inter-view candidate in Merge or Skip mode, inter-view motion prediction, inter-view disparity prediction, or inter-view residual prediction. | 07-16-2015 |
20150201215 | METHOD OF CONSTRAIN DISPARITY VECTOR DERIVATION IN 3D VIDEO CODING - A method for three-dimensional video encoding or decoding are disclosed. In one embodiment, the method constrains the disparity vector (DV) to generate a constrained DV, wherein horizontal, vertical, or both components of the constrained DV is constrained to be zero or within a range from M to N units of DV precision, and M and N are integers. In another embodiment, a derived DV for DV based motion-compensated-prediction is determined from a constrained neighboring block set of the current block. In yet another embodiment, a derived disparity vector is derived to replace an inter-view Merge candidate if the inter-view Merge candidate of the current block is not available or not valid. In yet another embodiment, a DV difference (DVD) or a motion vector difference (MVD) for the current block is determined according to a DV and the DVD/MVP is constrained to be zero or within a range. | 07-16-2015 |
20150201216 | Method and Apparatus of Unified Disparity Vector Derivation for 3D Video Coding - A method and apparatus for three-dimensional video coding or multi-view video coding are disclosed. Embodiments according to the present invention derive a unified disparity vector from depth information for Inter mode and Skip/Direct mode. The unified disparity vector is derived from a subset of depth samples in an associated depth block corresponding to the current block using a unified derivation method. The unified derivation method is applied in Inter mode, Skip mode, or Direct mode when a disparity vector derived from depth data is required for encoding or decoding. The unified disparity vector can also be applied to derive a disparity vector for locating a corresponding block, and thus an inter-view motion vector candidate can be determined for Skip mode or Direct mode. | 07-16-2015 |
20150281708 | METHOD AND APPARATUS OF SCALABLE VIDEO CODING - A method and apparatus for coding video data using Inter prediction mode or Merge mode in a video coding system are disclosed, where the video data is configured into a Base Layer (BL) and an Enhancement Layer (EL), and the EL has higher spatial resolution or better video quality than the BL. In one embodiment, at least one information piece of motion information associated with one or more BL blocks in the BL is identified. A motion vector prediction (MVP) candidate list or a Merge candidate list for the selected block in the EL is then determined, where said at least one information piece associated with said one or more BL blocks in the BL is included in the MVP-candidate list or a Merge candidate MVP candidate list or the Merge candidate list. The input data associated with the selected block is coded or decoded using the MVP candidate list or the Merge candidate list. | 10-01-2015 |
20150304681 | METHOD AND APPARATUS OF INTER-VIEW MOTION VECTOR PREDICTION AND DISPARITY VECTOR PREDICTION IN 3D VIDEO CODING - A method and apparatus for deriving inter-view candidate for a block in a picture for three-dimensional video coding are disclosed. Embodiments of the present invention derive the inter-view candidate from an inter-view collocated block in an inter-view picture corresponding to the current block of the current picture, wherein the inter-view picture is an inter-view reference picture and wherein the inter-view reference picture is in a reference picture list of the current block. The derived inter-view candidate is then used for encoding or decoding of the current motion vector or disparity vector of the current block. One aspect of the invention addresses re-use of the motion information of the inter-view collocated block. Another aspect of the invention addresses constrains on the inter-view picture that can be used to derive the inter-view candidate. | 10-22-2015 |
Patent application number | Description | Published |
20120064679 | METAL GATE TRANSISTOR AND METHOD FOR FABRICATING THE SAME - A method for fabricating metal gate transistor is disclosed. First, a substrate having a first transistor region and a second transistor region is provided. Next, a stacked film is formed on the substrate, in which the stacked film includes at least one high-k dielectric layer and a first metal layer. The stacked film is patterned to form a plurality of gates in the first transistor region and the second transistor region, a dielectric layer is formed on the gates, and a portion of the dielectric layer is planarized until reaching the top of each gates. The first metal layer is removed from the gate of the second transistor region, and a second metal layer is formed over the surface of the dielectric layer and each gate for forming a plurality of metal gates in the first transistor region and the second transistor region. | 03-15-2012 |
20120244669 | Method of Manufacturing Semiconductor Device Having Metal Gates - The present invention provides a method of manufacturing semiconductor device having metal gates. First, a substrate is provided. A first conductive type transistor having a first sacrifice gate and a second conductive type transistor having a second sacrifice gate are disposed on the substrate. The first sacrifice gate is removed to form a first trench. Then, a first metal layer is formed in the first trench. The second sacrifice gate is removed to form a second trench. Next, a second metal layer is formed in the first trench and the second trench. Lastly, a third metal layer is formed on the second metal layer wherein the third metal layer is filled into the first trench and the second trench. | 09-27-2012 |
20120256276 | Metal Gate and Fabricating Method Thereof - A method of manufacturing a metal gate is provided. The method includes providing a substrate. Then, a gate dielectric layer is formed on the substrate. A multi-layered stack structure having a work function metal layer is formed on the gate dielectric layer. An O | 10-11-2012 |
20120322218 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating a semiconductor device includes the following steps. Firstly, a dummy gate structure having a dummy gate electrode layer is provided. Then, the dummy gate electrode layer is removed to form an opening in the dummy gate structure, thereby exposing an underlying layer beneath the dummy gate electrode layer. Then, an ammonium hydroxide treatment process is performed to treat the dummy gate structure. Afterwards, a metal material is filled into the opening. | 12-20-2012 |
20130280900 | MANUFACTURING METHOD FOR SEMICONDUCTOR DEVICE HAVING METAL GATE - A manufacturing method for a semiconductor device having a metal gate is provided. First and second gate trenches are respectively formed in first and second semiconductor devices. A work-function metal layer is formed in the first and second gate trenches. A shielding layer is formed on the substrate. A first removing step is performed, so that the remaining shielding layer is at bottom of the second gate trench and fills up the first gate trench. A second removing step is performed, so that the remaining shielding layer is at bottom of the first gate trench to expose the work-function metal layer at sidewall of the first gate trench and in the second gate trench. The work-function metal layer not covered by the remaining shielding layer is removed, so that the remaining work-function metal layer is only at bottom of the first gate trench. The remaining shielding layer is removed. | 10-24-2013 |
20140339652 | SEMICONDUCTOR DEVICE WITH OXYGEN-CONTAINING METAL GATES - A semiconductor device with oxygen-containing metal gates includes a substrate, a gate dielectric layer and a multi-layered stack structure. The multi-layered stack structure is disposed on the substrate. At least one layer of the multi-layered stack structure includes a work function metal layer. The concentration of oxygen in the side of one layer of the multi-layered stack structure closer to the gate dielectric layer is less than that in the side of one layer of the multi-layered stack structure opposite to the gate dielectric layer. | 11-20-2014 |
20150076623 | METAL GATE TRANSISTOR AND METHOD FOR FABRICATING THE SAME - A method for fabricating metal gate transistor is disclosed. The method includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a dummy gate on each of the NMOS region and the PMOS region respectively; removing the dummy gates from each of the NMOS region and the PMOS region; forming a n-type work function layer on the NMOS region and the PMOS region; removing the n-type work function layer in the PMOS region; forming a p-type work function layer on the NMOS region and the PMOS region; and depositing a low resistance metal layer on the p-type work function layer of the NMOS region and the PMOS region. | 03-19-2015 |
20150243754 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD OF THE SAME - A semiconductor structure and a manufacturing method thereof are disclosed. The semiconductor structure includes an isolation layer, a gate dielectric layer, a first work function metal, a first bottom barrier layer, a second work function metal, and a first top barrier layer. The isolation layer is formed on a substrate and has a first gate trench. The gate dielectric layer is formed in the first gate trench. The first work function metal is formed on the gate dielectric layer in the first gate trench. The first bottom barrier layer is formed on the first work function metal. The second work function metal is formed on the first bottom barrier layer. The first top barrier layer is formed on the second work function metal. | 08-27-2015 |
20160035854 | METHOD FOR FABRICATING SEMICONDUCTOR DEVICE - A method for fabricating metal gate transistor is disclosed. The method includes the steps of: providing a substrate having a NMOS region and a PMOS region; forming a dummy gate on each of the NMOS region and the PMOS region respectively; removing the dummy gates from each of the NMOS region and the PMOS region; forming a n-type work function layer on the NMOS region and the PMOS region; removing the n-type work function layer in the PMOS region; forming a p-type work function layer on the NMOS region and the PMOS region; and depositing a low resistance metal layer on the p-type work function layer of the NMOS region and the PMOS region. | 02-04-2016 |
20160099179 | METHOD OF FORMING SEMICONDUCTOR DEVICE - A method of forming a semiconductor device is disclosed. A substrate having multiple fins is provided. An insulating layer fills a lower portion of a gap between two adjacent fins. At least one first stacked structure is formed on one fin and at least one second stacked structure is formed on one insulation layer. A first dielectric layer is formed to cover the first and second stacked structures. A portion of the first dielectric layer and portions of the first and second stacked structures are removed. Another portion of the first dielectric layer is removed until a top of the remaining first dielectric layer is lower than tops of the first and second stacked structures. A second dielectric layer is formed to cover the first and second stacked structures. A portion of the second dielectric layer is removed until the tops of the first and second stacked structures are exposed. | 04-07-2016 |
20160104786 | SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME - A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having an interlayer dielectric (ILD) layer thereon; forming a first recess, a second recess, and a third recess in the ILD layer; forming a material layer on the ILD layer and in the first recess, the second recess, and the third recess; performing a first treatment on the material layer in the first recess; and performing a second treatment on the material layer in the first recess and second recess. | 04-14-2016 |
Patent application number | Description | Published |
20120183069 | Frame Prediction System and Prediction Method Thereof - The present invention discloses a frame prediction system and a prediction method thereof. An initializing module initializes a first image block having a plurality of pixels. A providing module provides a first centroid and a first motion vector of a second image block. The location lookup module finds a location according to the first centroid, and generates a first weight and a second weight respectively according to a relationship between each of the pixels, the first centroid and the location. A vector lookup module finds a second motion vector, which gives a minimum pixel intensity error for the plurality of pixels in the first image block according to the first centroid, the first motion vector, the location, the first weight and the second weight. A processing module sequentially calculates a plurality of predictive intensity values according to the motion vectors and the weights. | 07-19-2012 |
20130208804 | Method and Apparatus for Parsing Error Robustness of Temporal Motion Vector Prediction - A method and apparatus for deriving a motion vector predictor (MVP) are disclosed. The MVP is selected from spatial MVP and temporal MVP candidates. The method uses a flag to indicate whether temporal MVP candidates are disabled. If the flag indicates that the temporal MVP candidates are disabled, the MVP is derived from the spatial MVP candidates only. Otherwise, the MVP is derived from the spatial and temporal MVP candidates. The method may further skip spatial redundant MVP removal by comparing MV values. Furthermore, the parsing error robustness scheme determines a forced temporal MVP when a temporal MVP is not available and the temporal MVP candidates are allowed as indicated by the flag. The flag may be incorporated in sequence, picture, slice level, or a combination of these levels. | 08-15-2013 |
20130243098 | METHOD AND APPARATUS FOR DERIVATION OF MOTION VECTOR CANDIDATE AND MOTION VECTOR PREDICTION CANDIDATE - An apparatus and method for deriving a motion vector predictor are disclosed. A search set comprising of multiple (spatial, or temporal) search MVs with priority is determined, wherein the search MVs for multiple neighboring reference block or one or more co-located reference blocks arc configured into multiple search MV groups. In order to improve coding efficiency, embodiments according to the present invention, perform redundancy check every time after a search MV group is searched to determine whether an available search MV found. If an available search MV is found and the available search MV is not the same as a previously derived motion vector predictor (MVP), the available search MV is used as the MVP and the MVP derivation process terminates. Otherwise, the MVP derivation process moves to the next reference block. The search MV group can be configured to include different search MV(s) associated with reference blocks. | 09-19-2013 |
20150208086 | METHOD AND APPARATUS FOR INTER-COMPONENT MOTION PREDICTION IN THREE-DIMENSIONAL VIDEO CODING - Embodiments of the present invention identify a texture collocated block of a texture picture in the given view corresponding to a current depth block. A Merge candidate, or a motion vector predictor (MVP) or disparity vector predictor (DVP) candidate is derived from a candidate list including a texture candidate derived from motion information of the texture collocated block. Coding or decoding is then applied to the input data associated with the current depth block using the texture candidate if the texture candidate is selected as the Merge candidate in Merge mode or the texture candidate is selected as the MVP or DVP candidate in Inter mode. | 07-23-2015 |
20150264397 | METHOD AND APPARATUS OF DISPARITY VECTOR DERIVATION AND INTER-VIEW MOTION VECTOR PREDICTION FOR 3D VIDEO CODING - A method and apparatus for three-dimensional video coding and multi-view video coding are disclosed. Embodiments according to the present invention derive a unified disparity vector (DV) based on neighboring blocks of the current block or depth information associated with the current block and locate a single corresponding block in a reference view according to the unified DV. An inter-view motion vector prediction (MVP) candidate is then derived for both list0 and list1 from the single corresponding block. List0 and list1 MVs of the inter-view MVP candidate are derived from the single corresponding block located according to the unified DV. | 09-17-2015 |
20150264399 | METHOD OF SIGNALING FOR DEPTH-BASED BLOCK PARTITIONING - A method of signaling depth-based block partitioning (DBBP) for multi-view or three-dimensional (3D) video coding is disclosed. In one embodiment, the DBBP flag is signaled for all candidate prediction modes of the current texture coding unit including a non-2N×N partition mode. The group of candidate prediction modes may consist of 2N×N partition mode and N×2N partition mode. If the DBBP flag indicates the DBBP being used for the current texture coding unit, DBBP encoding is applied to the current texture coding unit or DBBP decoding is applied to one or more PUs associated with the current texture coding unit to recover the current texture coding unit. If the DBBP flag indicates the DBBP being not used for the current texture coding unit, a prediction partition mode is signaled at an encoder side or parsed at a decoder side from a CU (coding unit) level of the bitstream. | 09-17-2015 |
20150271486 | METHOD OF SIGNALING FOR MODE SELECTION IN 3D AND MULTI-VIEW VIDEO CODING - A method and apparatus for signaling one or more coding modes selected from a mode group for multi-view or three-dimensional (3D) video coding are disclosed. The mode group comprises a pulse code modulation (PCM) mode, a segment-wise depth coding (SDC) mode and a depth-based block partitioning (DBBP) mode. According to the present invention, a first mode is determined regarding whether it is enabled, where the first mode corresponds to one of at least two mode members selected from the PCM mode, the SDC mode and the DBBP mode. If the first mode is enabled, a first mode flag corresponding to the first mode is signaled to indicate whether the first mode is asserted. If the first mode is asserted, the current depth or texture block is coded using the first mode and signaling any remaining mode member of at least two mode members is skipped. | 09-24-2015 |
20150281729 | METHOD AND APPARATUS FOR MOTION INFORMATION INHERITANCE IN THREE-DIMENSIONAL VIDEO CODING - A method and apparatus to determine motion information for a current depth region depending on the motion information associated with a co-located texture region are provided for three-dimensional video. The motion information for the current depth region is set to pre-defined motion information or derived motion information if the co-located texture region of the texture picture or any texture sub-region in the co-located texture region is Intra-coded or has no valid motion information. The pre-defined motion information may correspond to motion vector (0,0), reference index 0, and a prediction type as indicated by a slice type. In one embodiment, the motion information for the current depth region is determined according to a subset of 8×8 texture sub-regions for a system with asymmetric resolution and the texture region corresponding to a macroblock. | 10-01-2015 |
20150281733 | METHOD AND APPARATUS OF MOTION INFORMATION MANAGEMENT IN VIDEO CODING - A method and apparatus for three-dimensional and scalable video coding are disclosed. Embodiments according to the present invention determine a motion information set associated with the video data, wherein at least part of the motion information set is made available or unavailable conditionally depending on the video data type. The video data type may correspond to depth data, texture data, a view associated with the video data in three-dimensional video coding, or a layer associated with the video data in scalable video coding. The motion information set is then provided for coding or decoding of the video data, other video data, or both. At least a flag may be used to indicate whether part of the motion information set is available or unavailable. Alternatively, a coding profile for the video data may be used to determine whether the motion information is available or not based on the video data type. | 10-01-2015 |
20150288985 | METHOD AND APPARATUS OF CONSTRAINED DISPARITY VECTOR DERIVATION IN 3D VIDEO CODING - A method and apparatus for three-dimensional video encoding or decoding with conditionally constrained disparity vector are disclosed. In one embodiment, a derived DV (disparity vector) for the current texture block is determined and DV constraint is applied or is not applied to the derived DV to obtain a final derived DV. Inter-view predictive encoding or decoding is then applied to the input data utilizing at least one of selected coding tools, wherein a same final derived DV is used by all selected coding tools, and the selected coding tools comprise inter-view residual prediction, view synthesis prediction and inter-view motion parameter prediction. | 10-08-2015 |
20150296222 | METHOD AND APPARATUS FOR MOTION INFORMATION PREDICTION AND INHERITANCE IN VIDEO CODING - Embodiments of the present invention re-use at least a portion of motion information of the corresponding block for the motion information of the current block if a corresponding reference picture corresponding to a reference picture pointed by the corresponding block is in a current reference picture list of the current block. If the corresponding reference picture is not in the current reference picture list of the current block, the motion information of the current block is determined using an alternative process, where at least a portion of the motion information, which was used in the previous case, is not re-used for the current block according to the alternative process. | 10-15-2015 |
20150341664 | METHOD AND APPARATUS OF DISPARITY VECTOR DERIVATION IN THREE-DIMENSIONAL VIDEO CODING - A derived disparity vector is determined based on spatial neighboring blocks and temporal neighboring blocks of the current block. The temporal neighboring blocks are searched according to a temporal search order and the temporal search order is the same for all dependent views. Any temporal neighboring block from a CTU below the current CTU row may be omitted in the temporal search order. The derived DV can also be used for predicting a DV of a DCP (disparity-compensated prediction) block for the current block in the AMVP mode, the Skip mode or the Merge mode. The temporal neighboring blocks may correspond to a temporal CT block and a temporal BR block. In one embodiment, the temporal search order checks the temporal BR block first and the temporal CT block next. | 11-26-2015 |
20150350676 | METHOD AND APPARATUS OF MOTION DATA BUFFER REDUCTION FOR THREE-DIMENSIONAL VIDEO CODING - A method and apparatus for three-dimensional video coding, multi-view video coding and scalable video coding are disclosed. Embodiments of the present invention use two stage motion data compression to reduce motion data buffer requirement. A first-stage motion data compression is applied after each texture picture or depth map is coded to reduce motion data buffer requirement. Accordingly, first compressed motion data is stored in reduced resolution in the buffer to reduce storage requirement and the first compressed motion data is used for coding process of other texture pictures or depth maps in the same access unit. After all pictures in an access unit are coded, motion data associated with the access unit is further compressed and the second compressed motion data is used during coding process of pictures in other access unit. | 12-03-2015 |
20150358598 | METHOD AND APPARATUS OF DEPTH TO DISPARITY VECTOR CONVERSION FOR THREE-DIMENSIONAL VIDEO CODING - A method and apparatus using a single converted DV (disparity vector) from the depth data for a conversion region are disclosed. Embodiments according to the present invention receive input data and depth data associated with a conversion region of a current picture in a current dependent view. The conversion region is checked to determine whether it is partitioned into multiple motion prediction sub-blocks. If the conversion region is partitioned into multiple motion prediction sub-blocks, then a single converted DV from the depth data associated with the conversion region is determined and each of the multiple motion prediction sub-blocks of the conversion region is processed according to a first coding tool using the single converted DV. If the conversion region is not partitioned into multiple motion prediction sub-blocks, the conversion region is processed according to the first coding tool or a second coding tool using the single converted DV. | 12-10-2015 |
20150358600 | Method and Apparatus of Inter-View Candidate Derivation for Three- Dimensional Video Coding - A method and apparatus of three-dimensional/multi-view coding using a candidate list including a second inter-view candidate in the candidate list for Merge mode, Skip mode or AMVP based (Advanced Motion Vector Prediction based) Inter mode are disclosed. The second inter-view candidate can be derived based on already coded or decoded texture data for the candidate list to include. For example, the second inter-view candidate can be determined from the motion information associated with a corresponding block in a reference view, where the corresponding block is located according to the location of the right-bottom neighboring block and a selected disparity vector. The right-bottom neighboring block is located across from a right-bottom corner of the current texture block. The second inter-view candidate can be inserted into the candidate list only when the number of previous available candidates is smaller than a pre-specified number. | 12-10-2015 |
20150358636 | METHOD AND APPARATUS OF SPATIAL MOTION VECTOR PREDICTION DERIVATION FOR DIRECT AND SKIP MODES IN THREE-DIMENSIONAL VIDEO CODING - A method and apparatus for spatial motion vector prediction (MVP) candidate derivation for Direct mode and Skip mode in three-dimensional video coding are disclosed. The motion vector of each neighboring block is associated with a corresponding reference picture index pointing to a corresponding reference picture. For both the Direct mode and the Skip mode, the motion vector of each neighboring block is selected as the spatial MVP candidate for each neighboring block only if the corresponding reference picture index is the same as a selected target reference picture index. In one embodiment, the target reference picture index is set to 0. In another embodiment, the target reference picture index corresponds to a majority of the corresponding reference picture indexes associated with the neighboring blocks in Direct mode or Skip mode. | 12-10-2015 |
20150365649 | Method and Apparatus of Disparity Vector Derivation in 3D Video Coding - A method and apparatus for three-dimensional video encoding or decoding using an improved refined DV derivation process are disclosed. Embodiments according to the present invention first determine a derived DV (disparity vector) from temporal, spatial, or inter-view neighboring blocks, or any combination thereof of the current block in a dependent view. A refined DV is then determined based on the derived DV when the derived DV exists and is valid. When the derived DV does not exist or is not valid, the refined DV is determined based on a zero DV or a default DV. The derived DV, the zero DV, or the default DV is used respectively to locate a corresponding block in a coded view, and a corresponding depth block in the coded view is used to determine the refined DV. | 12-17-2015 |
20150365694 | Method and Apparatus of Disparity Vector Derivation for Three-Dimensional and Multi-view Video Coding - A method and apparatus for determining a derived disparity vector (DV) directly from associated depth block for motion vector prediction in three-dimensional video encoding or decoding are disclosed. Input data associated with current motion information of a current texture block of a current texture picture in a current dependent view and a depth block associated with the current texture block are received. The derived DV for the current texture block based on the depth block is then determined and used for inter-view or temporal motion vector prediction (MVP). If the current motion information corresponds to inter-view prediction, the current DV is encoded or decoded using the derived DV as a MVP. If the current motion information corresponds to temporal prediction, the current MV is encoded or decoded using a derived MV of a corresponding texture block in a reference view as the MVP. | 12-17-2015 |
20150365698 | Method and Apparatus for Prediction Value Derivation in Intra Coding - A method and apparatus for sample-based Simplified Depth Coding (SDC) are disclosed. The system determines prediction samples for the current depth block based on reconstructed neighboring depth samples according to a selected Intra mode and determines an offset value for the current depth block. The final reconstructed samples are derived by adding the offset value to each of the prediction samples. The offset value corresponds to a difference between a reconstructed depth value and a predicted depth value for the current depth block. The offset value can be derived from the residual value, and the residual value can be derived implicitly at a decoder side or transmitted in the bitstream. The selected Intra mode may correspond to Planar mode, the prediction samples are derived according to the Planar mode. | 12-17-2015 |
20150365699 | Method and Apparatus for Direct Simplified Depth Coding - A method and apparatus for direct Simplified Depth Coding (dSDC) to derive prediction value directly for each segment without deriving depth prediction samples or depth prediction subsamples. The dSDC method substantially reduces the computations associated with deriving the prediction samples or subsamples and calculating the average of the prediction samples or subsamples by deriving the prediction value directly based on the reconstructed neighboring depth samples. The direct SDC can be applied to derive the two prediction values, P0 and P1 for the two segments of a depth block coded by SDC depth modelling mode 1 (DMM-1). | 12-17-2015 |
20150381986 | Method and Apparatus for Bi-Prediction of Illumination Compensation - A method and apparatus for deriving aligned inter-view prediction for uni-prediction and bi-prediction in three-dimensional and multi-view coding with illumination compensation enabled are disclosed. When the illumination compensation is enabled, the derivation process for a single reference block in reference list_0 or reference list_1 in the case of uni-prediction is aligned with the derivation process for a reference block in reference list_0 and a reference block in reference list_1 in the case of bi-prediction. The reconstruction process generates the reference block based on a temporal reference block when Inter prediction is used and based on an inter-view reference block when inter-view prediction is used. For the uni-prediction and bi-prediction, the same clipping process can be included in the reconstruction process, the illumination compensation process, or both. | 12-31-2015 |
20150382019 | Method and Apparatus of View Synthesis Prediction in 3D Video Coding - A method and apparatus for a three-dimensional encoding or decoding system incorporating view synthesis prediction (VSP) with reduced computational complexity and/or memory access bandwidth are disclosed. The system applies the VSP process to the texture data only and applies non-VSP process to the depth data. Therefore, when a current texture block in a dependent view is coded according to VSP by backward warping the current texture block to the reference picture using an associated depth block and the motion parameter inheritance (MPI) mode is selected for the corresponding depth block in the dependent view, the corresponding depth block in the dependent view is encoded or decoded using non-VSP inter-view prediction based on motion information inherited from the current texture block. | 12-31-2015 |
20150382020 | Method of Inter-View Residual Prediction with Reduced Complexity in Three-Dimensional Video Coding - A method and apparatus for 3D coding to support fast bi-prediction having identical motion in the advanced residual prediction (ARP) are disclosed. Embodiment of the present invention use one or more aligned operations including data clipping and reference picture selection associated with motion vector derivation during residual predictor generation. When ARP mode is enabled, the residual prediction process for uni-prediction and bi-prediction perform same data clipping process and same reference picture selection process effectively. A single clipping operation or two clipping operations can be performed for both uni-prediction and bi-prediction. | 12-31-2015 |
20160021393 | Method of Error-Resilient Illumination Compensation for Three- Dimensional Video Coding - A method of illumination compensation for three-dimensional or multi-view encoding and decoding. The method incorporates an illumination compensation flag only if the illumination compensation is enabled and the current coding unit is processed by one 2N×2N prediction unit. The illumination compensation is applied to the current coding unit according to the illumination compensation flag. The illumination compensation flag is incorporated when the current coding unit is coded in Merge mode without checking whether a current reference picture is an inter-view reference picture. | 01-21-2016 |
20160057453 | Method and Apparatus of Camera Parameter Signaling in 3D Video Coding - A method of three-dimensional video encoding and decoding that adaptively incorporates camera parameters in the video bitstream according to a control flag is disclosed. The control flag is derived based on a combination of individual control flags associated with multiple depth-oriented coding tools. Another control flag can be incorporated in the video bitstream to indicate whether there is a need for the camera parameters for the current layer. In another embodiment, a first flag and a second flag are used to adaptively control the presence and location of camera parameters for each layer or each view in the video bitstream. The first flag indicates whether camera parameters for each layer or view are present in the video bitstream. The second flag indicates camera parameter location for each layer or view in the video bitstream. | 02-25-2016 |
20160065964 | Method of Simplified CABAC Coding in 3D Video Coding - A method for reducing the storage requirement or complexity of context-based coding in three-dimensional or multi-view video encoding and decoding is disclosed. The system selects the context based on selected information associated with one or more neighboring blocks of the current block conditionally depending on whether the one or more neighboring blocks are available. The syntax element is then encoded or decoded using context-based coding according to the context selection. The syntax element to be coded may correspond to an IC (illumination compensation) flag or an ARP (advanced residual prediction) flag. In another example, one or more syntax elements for coding a current depth block using DMM (Depth Map Model) are encoded or decoded using context-based coding, where the context-based coding selects a by-pass mode for at least one selected syntax element. | 03-03-2016 |
20160073132 | Method of Simplified View Synthesis Prediction in 3D Video Coding - A method of three-dimensional video encoding or decoding that uses unified depth data access for VSP process and VSP-based merging candidate derivation is disclosed. When the coding tool corresponds to VSP process or VSP-based merging candidate, embodiments of the present invention fetch the same reference depth data in a reference view. A reference depth block in a reference view corresponding to the current texture CU is fetched using a derived DV (disparity vector). For the VSP process, first VSP data for a current PU (prediction unit) within the current CU is generated based on the reference depth block. For the VSP-based merging candidate derivation, second VSP data for a VSP-coded spatial neighboring PU associated with a VSP spatial merging candidates is generated also based on the reference depth block. | 03-10-2016 |
20160080774 | Method of Reference View Selection for 3D Video Coding - A method of deriving VSP (View Synthesis Prediction) Merge candidates with aligned inter-view reference pictures is disclosed. The method generates a second Disparity Vector (DV) using a scaled DV derived from Neighboring Block Disparity Vector (NBDV) of the current block. A method of deriving one or more inter-view DV Merge candidates with aligned DV and associated inter-view reference pictures is also disclosed. The inter-view reference picture pointed by the DV derived from Depth oriented NBDV (DoNBDV) is used as the reference picture and the DV derived from DoNBDV is used as the DV for inter-view DV Merge candidate. Furthermore, a method of deriving temporal DV for NBDV is disclosed, where if the temporal neighboring block has a DV existing, the DV is used as an available DV for the current CU only if the associated inter-view reference picture exists in the reference lists of the current CU. | 03-17-2016 |
Patent application number | Description | Published |
20110051248 | Hybrid Optical Film - A hybrid optical film includes a first layer, a second layer, and a plurality of diffusion structures. The first layer has a light entering face and a first refractive index. The second layer has a second refractive index and is disposed on a face of the first layer opposite to the light entering face, wherein the second refractive index is lower than the first refractive index. The plurality of diffusion structures are disposed on the interface of the first layer and the second layer. The diffusion structure has a third refractive index, wherein the third refractive index is between the first refractive index and the second refractive index and is selectively equal to the first refractive index and the second refractive index. | 03-03-2011 |
20110069509 | BACKLIGHT MODULE - A backlight module includes a back plate, a plurality of position limiting elements, a light guiding plate, and a light source. The position limiting elements are disposed on the back plate, and each of the position limiting elements includes a pillar and a cushion sheath covering the pillar. The light guiding plate is disposed on the back plate, and has a plurality of first position limiting portions. The first position limiting portions respectively contact the position limiting elements to position the light guiding plate on the back plate. The light source is disposed at a side of the light guiding plate. | 03-24-2011 |
20110299296 | BACKLIGHT MODULE AND HEAT DISSIPATION MODULE - A backlight module includes a back plate having a trench, a light guide plate disposed on the back plate, a reflecting sheet disposed between the back plate and the light guide plate, a heat dissipation module, and a light emitting element. The heat dissipation module includes a heat dissipation element, a heat conducting element, and a position-limiting element. The heat dissipation element is disposed on the back plate. The heat conducting element is disposed in the trench. One end of the heat conducting element is aligned with the heat dissipation element. The first position-limiting element is detachably assembled in the trench and supports the reflecting sheet. One section of the heat conducting element is pressed onto a bottom wall of the trench by the first position-limiting element. The light emitting element is disposed on the heat dissipation element and faces one side of the light guide plate. | 12-08-2011 |
20130121021 | COMPOSITE OPTICAL FILM AND BACKLIGHT MODULE USING THE SAME - The present disclosure provides a composite optical film including a brightness enhancement film, a high refractive-index layer, and an intermediate layer. The brightness enhancement film has a plurality of brightness enhancement structures parallel to each other, and a top surface and a bottom surface opposite to each other. The brightness structures are disposed on the top surface. The high refractive-index layer is disposed on the bottom surface, and includes a film and a plurality of inorganic nano-particles disposed within the film. The intermediate layer is disposed between the brightness enhancement film and the high refractive-index layer. | 05-16-2013 |
20140376256 | LIGHT SOURCE MODULE - A light source module includes a light guide plate, at least one light emitting element, a circuit board, and a heat conductive structure. The light guide plate has a light incident surface and a bottom surface adjacent to each other. The light emitting element is disposed beside the light incident surface. The circuit board has a bottom and a sidewall. The bottom extends toward the light guide plate from an end of the sidewall. The sidewall has a first surface facing the light incident surface, and the bottom has a second surface facing the bottom surface. The light emitting element is disposed on the first surface. The heat conductive structure is disposed on the circuit board contacted the first surface and the second surface of the circuit board, for transmitting heat generated by the light emitting element and the circuit board. | 12-25-2014 |
Patent application number | Description | Published |
20110101521 | POST PASSIVATION INTERCONNECT WITH OXIDATION PREVENTION LAYER - A copper interconnect line formed on a passivation layer is protected by a copper-containing material layer including a group III element, a group IV element, a group V element or combinations thereof. | 05-05-2011 |
20110101523 | PILLAR BUMP WITH BARRIER LAYER - A copper pillar bump has a surface covered with by a barrier layer formed of a copper-containing material layer including a group III element, a group IV element, a group V element or combinations thereof. The barrier layer depresses the copper diffusion and reaction with solder to reduce the thickness of intermetallic compound between the pillar pump and solder. | 05-05-2011 |
20110101527 | MECHANISMS FOR FORMING COPPER PILLAR BUMPS - The mechanism of forming a metal bump structure described above resolves the delamination issues between a conductive layer on a substrate and a metal bump connected to the conductive layer. The conductive layer can be a metal pad, a post passivation interconnect (PPI) layer, or a top metal layer. By performing an in-situ deposition of a protective conductive layer over the conductive layer (or base conductive layer), the under bump metallurgy (UBM) layer of the metal bump adheres better to the conductive layer and reduces the occurrence of interfacial delamination. In some embodiments, a copper diffusion barrier sub-layer in the UBM layer can be removed. In some other embodiments, the UBM layer is not needed if the metal bump is deposited by a non-plating process and the metal bump is not made of copper. | 05-05-2011 |
20110233761 | CU PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE - Sidewall protection processes are provided for Cu pillar bump technology, in which a protection structure on the sidewalls of the Cu pillar bump is formed of at least one of non-metal material layers, for example a dielectric material layer, a polymer material layer, or combinations thereof. | 09-29-2011 |
20110254159 | CONDUCTIVE FEATURE FOR SEMICONDUCTOR SUBSTRATE AND METHOD OF MANUFACTURE - An embodiment of the disclosure includes a conductive feature on a semiconductor die. A substrate is provided. A bond pad is formed over the substrate. The bond pad has a first width. A polyimide layer is formed over the substrate and the bond pad. The polyimide layer has a first opening over the bond pad with a second width. A silicon-based protection layer overlies the polyimide layer. The silicon-based protection layer has a second opening over the bond pad with a third width. The first opening and the second opening form a combined opening having sidewalls to expose a portion of the bond pad. A UBM layer is formed over the sidewalls of combined opening to contact the exposed portion of the bond pad. A conductive feature overlies the UBM layer. | 10-20-2011 |
20110266667 | CU PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE - A sidewall protection structure is provided for covering at least a portion of a sidewall surface of a bump structure, in which a protection structure on the sidewalls of a Cu pillar and a surface region of an under-bump-metallurgy (UBM) layer is formed of at least one non-metal material layers, for example a dielectric material layer, a polymer material layer, or combinations thereof. | 11-03-2011 |
20110285011 | CU PILLAR BUMP WITH L-SHAPED NON-METAL SIDEWALL PROTECTION STRUCTURE - An L-shaped sidewall protection process is used for Cu pillar bump technology. The L-shaped sidewall protection structure is formed of at least one of non-metal material layers, for example a dielectric material layer, a polymer material layer or combinations thereof. | 11-24-2011 |
20110298123 | CU PILLAR BUMP WITH NON-METAL SIDEWALL SPACER AND METAL TOP CAP - A bump has a non-metal sidewall spacer on a lower sidewall portion of Cu pillar, and a metal top cap on a top surface and an upper sidewall portion of the Cu pillar. The metal top cap is formed by an electroless or immersion plating technique after the non-metal sidewall spacer formation. | 12-08-2011 |
20120098124 | SEMICONDUCTOR DEVICE HAVING UNDER-BUMP METALLIZATION (UBM) STRUCTURE AND METHOD OF FORMING THE SAME - A semiconductor device has a UBM (under-bump metallization) structure underlying and electrically connected to a solder bump. The UBM structure has a first metallization layer with a first cross-sectional dimension d | 04-26-2012 |
20120178251 | METHOD OF FORMING METAL PILLAR - The disclosure relates to fabrication of to a metal pillar. An exemplary method of fabricating a semiconductor device comprises the steps of providing a substrate having a contact pad; forming a passivation layer extending over the substrate having an opening over the contact pad; forming a metal pillar over the contact pad and a portion of the passivation layer; forming a solder layer over the metal pillar; and causing sidewalls of the metal pillar to react with an organic compound to form a self-assembled monolayer or self-assembled multi-layers of the organic compound on the sidewalls of the metal pillar. | 07-12-2012 |
20120280388 | COPPER PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE AND METHOD OF MAKING THE SAME - This description relates to an integrated circuit device including a conductive pillar formed over a substrate. The conductive pillar has a sidewall surface and a top surface. The integrated circuit device further includes an under-bump-metallurgy (UBM) layer between the substrate and the conductive pillar. The UBM layer has a surface region. The integrated circuit device further includes a protection structure on the sidewall surface of the conductive pillar and the surface region of the UBM layer. The protection structure is formed of a non-metal material. | 11-08-2012 |
20120322255 | Metal Bump Formation - A system and method for forming metal bumps is provided. An embodiment comprises attaching conductive material to a carrier medium and then contacting the conductive material to conductive regions of a substrate. Portions of the conductive material are then bonded to the conductive regions using a bonding process to form conductive caps on the conductive regions, and residual conductive material and the carrier medium are removed. A reflow process is used to reflow the conductive caps into conductive bumps. | 12-20-2012 |
20130009307 | Forming Wafer-Level Chip Scale Package Structures with Reduced number of Seed Layers - A method includes forming a passivation layer over a metal pad, which is overlying a semiconductor substrate. A first opening is formed in the passivation layer, with a portion of the metal pad exposed through the first opening. A seed layer is formed over the passivation layer and to electrically coupled to the metal pad. The seed layer further includes a portion over the passivation layer. A first mask is formed over the seed layer, wherein the first mask has a second opening directly over at least a portion of the metal pad. A PPI is formed over the seed layer and in the second opening. A second mask is formed over the first mask, with a third opening formed in the second mask. A portion of a metal bump is formed in the third opening. After the step of forming the portion of the metal bump, the first and the second masks are removed. | 01-10-2013 |
20130113094 | POST-PASSIVATION INTERCONNECT STRUCTURE AND METHOD OF FORMING THE SAME - A semiconductor device includes a conductive layer formed on the surface of a post-passivation interconnect (PPI) structure by an immersion tin process. A polymer layer is formed on the conductive layer and patterned with an opening to expose a portion of the conductive layer. A solder bump is then formed in the opening of the polymer layer to electrically connect to the PPI structure. | 05-09-2013 |
20130147031 | SEMICONDUCTOR DEVICE WITH BUMP STRUCTURE ON POST-PASSIVATION INTERCONNCET - A semiconductor device includes a post-passivation interconnect (PPI) structure having a landing pad region. A polymer layer is formed on the PPI structure and patterned with a first opening and a second opening to expose portions of the landing pad region. The second opening is a ring-shaped opening surrounding the first opening. A bump structure is formed on the polymer layer to electrically connect the landing pad region through the first opening and the second opening. | 06-13-2013 |
20130175685 | UBM Formation for Integrated Circuits - A method includes forming a polymer layer over a metal pad, forming an opening in the polymer layer to expose a portion of the metal pad, and forming an under-bump-metallurgy (UBM). The UBM includes a portion extending into the opening to electrically couple to the metal pad. | 07-11-2013 |
20130181338 | Package on Package Interconnect Structure - A structure comprises a post passivation interconnect layer formed over a semiconductor substrate, a metal bump formed over the post passivation interconnect layer and a molding compound layer formed over the semiconductor substrate. A lower portion of the metal bump is embedded in the molding compound layer and a middle portion of the metal bump is surrounded by a concave meniscus molding compound protection layer. | 07-18-2013 |
20130207258 | POST-PASSIVATION INTERCONNECT STRUCTURE AMD METHOD OF FORMING SAME - A semiconductor device including a dielectric layer formed on the surface of a post-passivation interconnect (PPI) structures. A polymer layer is formed on the dielectric layer and patterned with an opening to expose a portion of the dielectric layer. The exposed portion of the dielectric layer is then removed to expose a portion of the PPI structure. A solder bump is then formed over and electrically connected to the first portion of the PPI structure. | 08-15-2013 |
20130328190 | Methods and Apparatus of Packaging Semiconductor Devices - Methods and apparatuses for wafer level packaging (WLP) of semiconductor devices are disclosed. A contact pad of a circuit may be connected to a solder bump by way of a post passivation interconnect (PPI) line and a PPI pad. The PPI pad may comprise a hollow part and an opening. The PPI pad may be formed together with the PPI line as one piece. The hollow part of the PPI pad can function to control the amount of solder flux used in the ball mounting process so that any extra amount of solder flux can escape from an opening of the solid part of the PPI pad. A solder ball can be mounted to the PPI pad directly without using any under bump metal (UBM) as a normal WLP package would need. | 12-12-2013 |
20130334692 | Bonding Package components Through Plating - A method includes aligning a first electrical connector of a first package component to a second electrical connector of a second package component. With the first electrical connector aligned to the second electrical connector, a metal layer is plated on the first and the second electrical connectors. The metal layer bonds the first electrical connector to the second electrical connector. | 12-19-2013 |
20140008785 | Package Redistribution Layer Structure and Method of Forming Same - A package-on-package (PoP) device comprises a bottom package on a substrate and a first set of conductive elements coupling the bottom package and the substrate. The PoP device further comprises a top package over the bottom package and a redistribution layer coupling the top package to the substrate. A method of forming a PoP device comprises coupling a first package to a substrate; and forming a redistribution layer over the first package and a top surface of the substrate. The method further comprises coupling a second package to the redistribution layer, wherein the redistribution layer couples the second package to the substrate. | 01-09-2014 |
20140054764 | SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME - A semiconductor package includes a semiconductor substrate, a contact pad overlying the semiconductor substrate, an interconnect layer overlying the contact pad, a passivation layer formed between the contact pad and the interconnect layer, a bump overlying the interconnect layer, and a protection layer overlying the interconnect layer and the passivation layer and covering a lower portion of the bump. The protection layer includes a curved surface region. | 02-27-2014 |
20140183746 | Zero Stand-Off Bonding System and Method - A system and method for a zero stand-off configuration are provided. An embodiment comprises forming a seal layer over a conductive region that is part of a first substrate and breaching the seal with a conductive member of a second substrate in order to bond the first substrate to the second substrate. | 07-03-2014 |
20140335687 | METHOD OF MAKING A CONDUCTIVE PILLAR BUMP WITH NON-METAL SIDEWALL PROTECTION STRUCTURE - A method of making a semiconductor device includes forming an under bump metallurgy (UBM) layer over a substrate, the UBM layer comprising sidewalls and a surface region. The method further includes forming a conductive pillar over the UBM layer, the conductive pillar includes sidewalls, wherein the conductive pillar exposes the surface region of the UBM layer. The method further includes forming a non-metal protective structure over the sidewalls of the conductive pillar, wherein the non-metal protective structure contacts the surface region of the UBM layer, and the non-metal protective structure exposes the sidewalls of the UBM layer. | 11-13-2014 |
20140363970 | METHOD OF MAKING A PILLAR STRUCTURE HAVING A NON-METAL SIDEWALL PROTECTION STRUCTURE - A method of making a pillar structure includes forming a first under-bump-metallurgy (UBM) layer formed on a pad region of a substrate, wherein the first UBM layer includes sidewalls. The method further includes forming a second UBM layer on the first UBM layer, wherein the second UBM layer includes a sidewall surface, an area of the first UBM layer is greater than an area of the second UBM layer. The method further includes forming a copper-containing pillar on the second UBM layer, wherein the copper-containing pillar includes a sidewall surface and a top surface. The method further includes forming a protection structure on the sidewall surface of the copper-containing pillar and on an entirety of the sidewall surface of the second UBM layer, wherein the protection structure does not cover the sidewalls of the first UBM layer, and the protection structure is a non-metal material. | 12-11-2014 |
20150123276 | Methods and Apparatus of Packaging Semiconductor Devices - Methods and apparatuses for wafer level packaging (WLP) of semiconductor devices are disclosed. A contact pad of a circuit may be connected to a solder bump by way of a post passivation interconnect (PPI) line and a PPI pad. The PPI pad may comprise a hollow part and an opening. The PPI pad may be formed together with the PPI line as one piece. The hollow part of the PPI pad can function to control the amount of solder flux used in the ball mounting process so that any extra amount of solder flux can escape from an opening of the solid part of the PPI pad. A solder ball can be mounted to the PPI pad directly without using any under bump metal (UBM) as a normal WLP package would need. | 05-07-2015 |
20150228533 | METHOD OF FORMING CU PILLAR BUMP WITH NON-METAL SIDEWALL SPACER AND METAL TOP CAP - A method of forming an integrated circuit device includes forming a conductive element over a substrate, wherein the conductive element is over an under bump metallurgy (UBM) layer, and the UBM layer comprises a first UBM layer and a second UBM layer over the first UBM layer. The method further includes etching the second UBM layer to expose a portion of the first UBM layer beyond a periphery of the conductive element. The method further includes forming a protection layer over sidewalls of the conductive element, over sidewalls of the second UBM layer and over a top surface of the first UBM layer. The method further includes etching the first UBM layer to remove a portion of the first UBM layer. The method further includes forming a cap layer over a top surface of the conductive element. | 08-13-2015 |
20150243531 | Via Structure For Packaging And A Method Of Forming - A via or pillar structure, and a method of forming, is provided. In an embodiment, a polymer layer is formed having openings exposing portions of an underlying conductive pad. A conductive layer is formed over the polymer layer, filling the openings. The dies are covered with a molding material and a planarization process is performed to form pillars in the openings. In another embodiment, pillars are formed and then a polymer layer is formed over the pillars. The dies are covered with a molding material and a planarization process is performed to expose the pillars. In yet another embodiment, pillars are formed and a molding material is formed directly over the pillars. A planarization process is performed to expose the pillars. In still yet another embodiment, bumps are formed and a molding material is formed directly over the bumps. A planarization process is performed to expose the bumps. | 08-27-2015 |
20150243615 | Packaging Devices and Methods - A method of manufacturing a packaging device may include: forming a plurality of through-substrate vias (TSVs) in a substrate, wherein each of the plurality of TSVs has a protruding portion extending away from a major surface of the substrate. A seed layer may be forming over the protruding portions of the plurality of TSVs, and a conductive ball may be coupled to the seed layer and the protruding portion of each of the plurality of TSVs. The seed layer and the protruding portion of each of the plurality of TSVs may extend into an interior region of the conductive ball. | 08-27-2015 |
20150303161 | Zero Stand-Off Bonding System and Method - A system and method for a zero stand-off configuration are provided. An embodiment comprises forming a seal layer over a conductive region that is part of a first substrate and breaching the seal with a conductive member of a second substrate in order to bond the first substrate to the second substrate. | 10-22-2015 |
20150318252 | Semiconductor Package and Method of Manufacturing the Same - A semiconductor package includes a semiconductor substrate, a contact pad overlying the semiconductor substrate, an interconnect layer overlying the contact pad, a passivation layer formed between the contact pad and the interconnect layer, a bump overlying the interconnect layer, and a protection layer overlying the interconnect layer and the passivation layer and covering a lower portion of the bump. The protection layer includes a curved surface region. | 11-05-2015 |
20150325539 | METHOD OF FORMING POST-PASSIVATION INTERCONNECT STRUCTURE - A method includes coating a passivation layer overlying a semiconductor substrate and forming an interconnect layer overlying the passivation layer. The interconnect layer includes a line region and a landing pad region. The method further includes forming a metallic layer including tin on a surface of the interconnect layer using an immersion process, forming a protective layer on the metallic layer, and exposing a portion of the metallic layer on the landing pad region of the interconnect layer through the protective layer. | 11-12-2015 |
20150325546 | METHOD OF MAKING A PILLAR STRUCTURE HAVING A NON-METAL SIDEWALL PROTECTION STRUCTURE AND INTEGRATED CIRCUIT INCLUDING THE SAME - An integrated circuit device includes a semiconductor substrate; and a pad region over the semiconductor substrate. The integrated circuit device further includes an under-bump-metallurgy (UBM) layer over the pad region. The integrated circuit device further includes a conductive pillar on the UBM layer, wherein the conductive pillar has a sidewall surface and a top surface. The integrated circuit device further includes a protection structure over the sidewall surface of the conductive pillar, wherein sidewalls of the UBM layer are substantially free of the protection structure, and the protection structure is a non-metal material. | 11-12-2015 |
Patent application number | Description | Published |
20090103851 | SURFACE PLASMON RESONANCE FIBER SENSOR - A Surface Plasmon Resonance (SPR) fiber sensor is disclosed, which comprises an optical fiber member and a plurality of optical fiber sensing units. Each of the plurality of the optical fiber sensing units comprises a cladding layer, a core layer, and a groove, and the plurality of the optical fiber sensing units is arranged into a cascade form matrix. In each of the optical fiber sensing units, the cladding layer is located at the periphery of the core layer, and the maximum depth of the groove is larger than the thickness of the cladding layer. An SPR sensing apparatus is also disclosed, which includes a light source, an optical signal detector, a plurality of fibers, and a plurality optical fiber sensing units. Besides, the optical fiber sensing units, the light source, and the optical signal detector are connected with each other through the plurality of fibers. | 04-23-2009 |
20090111713 | Method for biomolecule immobilization - The present invention relates to a method for biomolecule immobilization, comprising: providing a substrate; forming a surface modification layer of carboxy groups on one surface of the substrate, wherein the process for forming the surface modification layer comprises plasma surface modification; and providing pluralities of biomolecules and bonding the biomolecules with the surface modification layer. Accordingly, the method for biomolecule immobilization of the present invention can reduce manufacturing time and enhance the stability of manufacture. In addition, the method can be employed in a biosensor to efficiently enhance sensitivity of the biosensor. | 04-30-2009 |
20110306918 | Phototherapy patch - A phototherapy patch is disclosed, which includes: an adhesive layer, having a first surface and an opposite second surface; a pharmaceutical drug layer, disposed on the first surface of the adhesive layer; and a spontaneous emission layer, disposed over the pharmaceutical drug layer and capable of emitting therapeutic light by light illumination or a chemical reaction. Accordingly, the phototherapy patch according to the present invention has no power supply disposed therein, and thereby is suitable to be manufactured as a particularly thin and thus inconspicuous device. | 12-15-2011 |
20110307035 | Phototherapy device - A phototherapy device is disclosed, which is driven by a power supply and includes: an LED module, driven by the power supply to emit therapeutic light; and a polarizer, disposed in a direction toward which the therapeutic light is emitted by the LED module. Accordingly, the phototherapy device according to the present invention can use light of low intensity to achieve therapeutic effect and thereby can be designed in a portable form. | 12-15-2011 |
20120283623 | PHOTOTHERAPY PATCH - A phototherapy patch is disclosed, which includes: an adhesive layer, having a first surface and an opposite second surface; a pharmaceutical drug layer, disposed on the first surface of the adhesive layer; and a spontaneous emission layer, disposed over the pharmaceutical drug layer and capable of emitting therapeutic light by light illumination or a chemical reaction. Accordingly, the phototherapy patch according to the present invention has no power supply disposed therein, and thereby is suitable to be manufactured as a particularly thin and thus inconspicuous device. | 11-08-2012 |
20130096657 | PHOTOTHERAPY DEVICE - The present invention relates to a phototherapy device, which is driven by a power supply and includes: a housing, having a top portion, a bottom portion and a handheld portion, where the top portion has a light outlet, the handheld portion connects the top portion and the bottom portion, and the handheld portion has at least one protruding part; a light-transmitting plate, which covers the light outlet; a light-blocking part, formed into a protruding rim along the circumferential direction of the light outlet; an LED module, disposed in the housing and corresponding to the light outlet; and a control module, electrically connected to the power supply and the LED module. Accordingly, the phototherapy device according to the present invention is suitable for handheld use. | 04-18-2013 |