Patent application number | Description | Published |
20080259688 | Non-volatile memory devices and methods of operating the same - A non-volatile memory device includes memory transistors disposed on a semiconductor substrate in a NAND string. A string select transistor is disposed at a first end of the NAND string, and a ground select transistor is disposed at a second end of the NAN string. Bit lines are electrically connected to the semiconductor substrate outside of the string select transistor and a gate electrode of the ground select transistor. | 10-23-2008 |
20080285352 | Method of writing/reading data into/from memory cell and page buffer using different codes for writing and reading operations - Provided are a method of writing/reading data into/from a memory cell and a page buffer using different codes for the writing and reading operations. The method of writing/reading data into/from a memory cell that has a plurality of threshold voltage distributions includes a data writing operation and a data reading operation. In the data writing operation, data having a plurality of bits is written into the memory cell by using a plurality of writing codes corresponding to threshold voltage distributions. In the data reading operation, the data having a plurality of bits is read from the memory cell by using reading codes corresponding to the threshold voltage distributions from among the threshold voltage distributions. In the method of writing/reading data into/from a memory cell, a part of the writing codes is different from a corresponding part of the reading codes. | 11-20-2008 |
20080316824 | Non-volatile memory device and method of operating the same - Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell. | 12-25-2008 |
20090027971 | Apparatuses, computer program products and methods for reading data from memory cells - In reading data from a memory cell, a determining circuit determines whether a received voltage value is within at least one first voltage range through a one-time read operation using a semiconductor device that senses an output current corresponding to the received voltage value. The at least one first voltage range includes a first upper limit voltage value and a first lower limit voltage value. A data value of the memory cell is set as a first data value when the received voltage value is within the specific voltage range. | 01-29-2009 |
20090091974 | Methods of programming non-volatile memory cells - A method of programming a non-volatile memory cell includes programming a first bit of multi-bit data by setting a threshold voltage of the non-volatile memory cell to a first voltage level within a first of a plurality of threshold voltage distributions. A second bit of the multi-bit data is programmed by setting the threshold voltage to a second voltage level based on a value of the second bit. The second voltage level is the same as the first voltage level if the second bit is a first value and the second voltage level is within a second of the plurality of threshold voltage distributions if the second bit is a second value. A third bit of the multi-bit data is programmed by setting the threshold voltage to a third voltage level based on a value of the third bit. | 04-09-2009 |
20090091991 | Apparatuses and methods for multi-bit programming - Multi-bit programming apparatuses and methods are provided. A multi-bit programming apparatus includes a page buffer configured to store first data of the page programming operation, an input control unit configured to determine whether to invert the first data based on a number of bits having a first value and a number of bits having a second value. The input control unit is further configured to invert the first data to generate second data if the number of bits having a first value is greater than the number of bits having a second value and store the second data in the page buffer. The multi-bit programming apparatus further includes a page programming unit configured to program the second data stored in the page buffer in at least one multi-bit cell. | 04-09-2009 |
20090096060 | Antifuse structures, antifuse array structures, methods of manufacturing the same - Antifuse structures, antifuse arrays, methods of manufacturing, and methods of operating the same are provided. An antifuse structure includes bitlines formed as first diffusing regions within a semiconductor substrate, an insulation layer formed on the bitlines, and wordlines formed on the insulation layer. An antifuse array includes a plurality of antifuse structures arranged in an array. | 04-16-2009 |
20090097321 | Non-volatile memory device, method of operating the same, and method of fabricating the same - A non-volatile memory device may include at least one semiconductor layer, a plurality of control gate electrodes, a plurality of charge storage layers, at least one first auxiliary electrode, and/or at least one second auxiliary electrode. The plurality of control gate electrodes may be recessed into the semiconductor layer. The plurality of charge storage layers may be between the plurality of control gate electrodes and the semiconductor layer. The first and second auxiliary electrodes may be arranged to face each other. The plurality of control gate electrodes may be between the first and second auxiliary electrodes and capacitively coupled with the semiconductor layer. | 04-16-2009 |
20090109748 | Apparatus and method of multi-bit programming - Multi-bit programming apparatuses and/or methods are provided. A multi-bit programming apparatus may include: a first control unit that allocates any one of 2 | 04-30-2009 |
20090109761 | Method of operating nonvolatile memory device - Provided is a method of operating a three-dimensional nonvolatile memory device which may increase the reliability and efficiency of the three-dimensional nonvolatile memory device. The method of operating a nonvolatile memory device may include: resetting the nonvolatile memory device by injecting charges into charge storage layers of a plurality of memory cells of a block; and setting the nonvolatile memory device by removing at least some of the charges injected into the charge storage layers of one or more memory cells selected from among the plurality of memory cells. | 04-30-2009 |
20090141547 | Non-volatile memory devices and methods of fabricating and using the same - Provided are a non-volatile memory device, which may have a stacked structure and may be easily integrated at increased density, and a method of fabricating and using the non-volatile memory device. The non-volatile memory device may include at least one pair of first electrode lines. At least one second electrode line may be between the at least one pair of first electrode lines. At least one data storage layer may be between the at least one pair of first electrode lines and the at least one second electrode line and may locally store a resistance change. | 06-04-2009 |
20090144480 | MULTI-PROCESSOR SYSTEM ON CHIP PLATFORM AND DVB-T BASEBAND RECEIVER USING THE SAME - A multi-processor system on chip (SoC) platform and a DVB-T baseband receiver using the same are disclosed. The multi-processor SoC platform includes a first processor, at least one second processor, at least one slave device communicating with the first processor and the second processor and a communication interface (CI) unit connecting the slave device to the first processor and the second processor according to a cross-bar switching method to allow the slave device to be communicated with the first processor and the second processor. Therefore, the multi-processor SoC platform having flexibility with being adapted for high speed calculation by using a cross-bar switch is provided. | 06-04-2009 |
20090184360 | Non-volatile memory device and method of fabricating the same - Provided are a non-volatile memory device that may expand to a stacked structure and may be more easily highly integrated and an economical method of fabricating the non-volatile memory device. The non-volatile memory device may include at least one semiconductor column. At least one first control gate electrode may be arranged on a first side of the at least one semiconductor column. At least one second control gate electrode may be arranged on a second side of the at least one semiconductor column. A first charge storage layer may be between the at least one first control gate electrode and the at least one semiconductor column. A second charge storage layer may be between the at least one second control gate electrode and the at least one semiconductor column. | 07-23-2009 |
20090207643 | Data storage devices using magnetic domain wall movement and methods of operating the same - Data storage devices using movement of magnetic domain walls and methods of operating the same are provided. A data storage device includes a magnetic track having a verifying region. Within the verifying region, first and second magnetic domains are arranged alternately. The first magnetic domains correspond to first data and the second magnetic domains correspond to second data. A verification sensor is arranged at an end of the verifying region. A current applying element is configured to apply one or more pulse currents to the magnetic track. A first counter is connected to the verification sensor and configured to count the number of magnetic domains passing through the verification sensor. | 08-20-2009 |
20090207718 | Information storage devices using magnetic domain wall motion and methods of operating the same - An information storage device using magnetic domain wall motion and a method of operating the same are provided. The information storage device includes a magnetic track having a plurality of magnetic domains and magnetic domain walls arranged alternately. A current supply unit is configured to apply current to the magnetic track, and a plurality of reading/writing units are arranged on the magnetic track. The information storage device further includes a plurality of storage units. Each of the plurality of storage units is connected to a corresponding one of the plurality of reading/writing units for storing data temporarily. | 08-20-2009 |
20090244514 | DISTANCE MEASURING SENSORS INCLUDING VERTICAL PHOTOGATE AND THREE-DIMENSIONAL COLOR IMAGE SENSORS INCLUDING DISTANCE MEASURING SENSORS - A distance measuring sensor may include: a photoelectric conversion region; first and second charge storage regions; first and second trenches; and/or first and second vertical photogates. The photoelectric conversion region may be in a substrate and/or may be doped with a first impurity in order to generate charges in response to received light. The first and second charge storage regions may be in the substrate and/or may be doped with a second impurity in order to collect charges. The first and second trenches may be formed to have depths in the substrate that correspond to the first and second charge storage regions, respectively. The first and second vertical photogates may be respectively in the first and second trenches. A three-dimensional color image sensor may include a plurality of unit pixels. Each unit pixel may include a plurality of color pixels and the distance measuring sensor. | 10-01-2009 |
20090251581 | Sub-pixels, unit pixels, image sensors and methods of operating the same - An image sensor includes a plurality of unit pixels arranged in an array. Each unit pixel includes a plurality of sub-pixels configured to be irradiated by light having the same wavelength. Each sub-pixel includes a plurality of floating body transistors. Each floating body transistor includes a source region, a drain region, a floating body region between the source region and the drain region, and a gate electrode formed on the floating body region. | 10-08-2009 |
20090273054 | Non-volatile memory device and method of fabricating the same - A non-volatile memory device and methods of fabricating the device according to example embodiments involve a stacked layer structure. The non-volatile memory device may include at least one first horizontal electrode including a first sidewall and a second sidewall; at least one second horizontal electrode including a third sidewall and a fourth sidewall; wherein the third sidewall may be disposed to face the first sidewall; at least one vertical electrode may be interposed between the first sidewall and the third sidewall, in such a way as to cross or intersect each of the at least one first and second horizontal electrodes, and; at least one data storage layer that may be capable of locally storing a change of electrical resistance may be interposed where the at least one first horizontal electrode and the at least one vertical electrode cross or intersect and where the at least one horizontal electrode and the at least one vertical electrodes cross or intersect. | 11-05-2009 |
20090284731 | Distance measuring sensor including double transfer gate and three dimensional color image sensor including the distance measuring sensor - Provided are a distance measuring sensor including a double transfer gate, and a three dimensional color image sensor including the distance measuring sensor. The distance measuring sensor may include first and second charge storage regions which are spaced apart from each other on a substrate doped with a first impurity, the first and second charge storage regions being doped with a second impurity; a photoelectric conversion region between the first and second charge storage regions on the substrate, being doped with the second impurity, and generating photo-charges by receiving light; and first and second transfer gates which are formed between the photoelectric conversion region and the first and second charge storage regions above the substrate to selectively transfer the photo-charges in the photoelectric conversion region to the first and second charge storage regions. | 11-19-2009 |
20100012186 | Bulb-Type Light Concentrated Solar Cell Module - Provided is a bulb-type light concentrated solar cell module that includes a reflective mirror unit that is concavely formed to convergingly reflect sunlight and has a first hole on a bottom thereof; a solar cell that generates electrical energy in response to light received from the reflective mirror unit; a socket that blocks the first hole at a lower part of the reflective mirror unit and is fixed on the reflective mirror unit; and a power control unit that is electrically connected to the solar cell to generate electricity in the socket. | 01-21-2010 |
20100033611 | Pixel array of three-dimensional image sensor - Provided is a pixel array of a three-dimensional image sensor. The pixel array includes unit pixel patterns each including a color pixel and a distance-measuring pixel arranged in an array form. The unit pixel patterns are arranged in such a way that a group of distance-measuring pixels are disposed adjacent to each other. | 02-11-2010 |
20100073462 | Three dimensional image sensor - A three-dimensional (3D) image sensor includes a plurality of color pixels, and a plurality of distance measuring pixels. Where the plurality of color pixels and the plurality of distance measuring pixels are arranged in an array, and a group of distance measuring pixels, from among the plurality of distance measuring pixels, are disposed so that a corner of each distance measuring pixel in the group of distance-measuring pixels is adjacent to a corner of an adjacent distance-measuring pixel in the group of distance-measuring pixels. The group of distance measuring pixels is capable of jointly outputting one distance measurement signal. | 03-25-2010 |
20100303299 | Three dimensional image sensor - A depth sensor includes a light source, a detector, and a signal processor. The light source transmits a source signal to the target according to a transmit control signal having reference time points. The detector receives a reflected signal from the source signal being reflected from the target. The signal processor generates a plurality of sensed values by measuring respective portions of the reflected signal during respective time periods with different time delays from the reference time points. The signal processor determines a respective delay time for a maximum/minimum of the sensed values for determining the distance of the target. | 12-02-2010 |
20110021601 | COMPOSITION CONTAINING MICRORNA-21 INHIBITOR FOR ENHANCING RADIATION SENSITIVITY - Disclosed is a radiation sensitivity-enhancing composition in which a microRNA-21 inhibitor acts as an active ingredient. The microRNA-21 inhibitor is an antisense nucleic acid molecule binding complementarily to microRNA-21. The composition can be administered to a patient in conjunction with irradiation. The inhibitor can act as a radiosensitizer, enhancing the therapeutic effect of such irradiation on cancer high in microRNA-21 expression level, particularly, glioma. | 01-27-2011 |
20110037520 | MULTISTAGE AMPLIFYING CIRCUIT - A multistage amplifying circuit includes a first amplifying circuit that either samples a first analog voltage input or amplifies a difference between the first analog voltage and a first digital voltage converted from the first analog voltage, in response to a control signal. A second amplifying circuit either samples a second analog voltage input or amplifies a difference between the second analog voltage and a second digital voltage converted from the second analog voltage, in response to the control signal. A common amplifier receives output voltages of the first amplifying circuit and the second amplifying circuit and either resets the output voltage of the first amplifying circuit and determines an output voltage by using the second amplifying circuit, or resets the output voltage of the second amplifying circuit and determines an output voltage by using the first amplifying circuit, in response to the control signal. | 02-17-2011 |
20110124712 | ANTI-CANCER COMPOSITION COMPRISING MICRORNA MOLECULES - Disclosed is an anticancer composition for the treatment of hypoxia-induced angiogenesis-associated diseases including cancers. It comprises a microRNA-125 nucleic acid molecule. Also, methods of inhibiting angiogenesis, suppressing the invasion and metastasis of cancer cells, and treating cancers are provided. | 05-26-2011 |
20110264016 | WEARABLE ROBOT FOR ASSISTING MUSCULAR STRENGTH OF LOWER EXTREMITY - A wearable robot for assisting muscular strength of the lower extremity of a user: The wearable robot can be worn on user's legs and includes a central securing part, a hip joint part hingably coupled to either side of a lower end of the central securing part, a femur part fastened to the hip joint part and having rigidity, a knee part including an outer frame and a knee assistant, and a drive unit fastened to one of the hip joint part and the knee joint part to allow operation of the joint part. The outer frame includes an upper side outer frame fastened to a lower end of the femur part and a lower side outer frame fastened to the upper side outer frame by a rotatable knee joint part Both the upper side outer frame and the lower side outer frame are fastened to the knee assistant worn by the user. | 10-27-2011 |
20120012899 | Distance measuring sensor including double transfer gate and three dimensional color image sensor including the distance measuring sensor - Provided are a distance measuring sensor including a double transfer gate, and a three dimensional color image sensor including the distance measuring sensor. The distance measuring sensor may include first and second charge storage regions which are spaced apart from each other on a substrate doped with a first impurity, the first and second charge storage regions being doped with a second impurity; a photoelectric conversion region between the first and second charge storage regions on the substrate, being doped with the second impurity, and generating photo-charges by receiving light; and first and second transfer gates which are formed between the photoelectric conversion region and the first and second charge storage regions above the substrate to selectively transfer the photo-charges in the photoelectric conversion region to the first and second charge storage regions. | 01-19-2012 |
20120026790 | Non-volatile memory device including block state confirmation cell and method of operating the same - Provided are a semiconductor device having a block state confirmation cell that may store information indicating the number of data bits written to a plurality of memory cells, a method of reading memory data based on the number of the data bits written, and/or a memory programming method of storing the information indicating the number of the data bits written. The semiconductor device may include one or more memory blocks and a controller. Each of the memory blocks may include a plurality of memory cells each storing data, and a block state confirmation cell storing information indicating the number of data bits written to the memory cells. The controller may read the data bits from the memory blocks based on the number of data bits, which is indicated in the information in the block state confirmation cell. | 02-02-2012 |
20120299758 | AMPLIFYING CIRCUIT AND ANALOG DIGITAL CONVERSION CIRCUIT WITH THE SAME - An analog to digital converting device includes a first digital conversion (ADC) circuit configured to convert an inputted analog signal into a first digital signal, a first multiplying digital to analog converting (MDAC) circuit configured to amplify a difference between a first converted signal and the inputted analog signal, a second ADC circuit configured to convert an output of the first MDAC circuit into a second digital signal, a second MDAC circuit configured to amplify difference between a second converted signal converted from the second digital signal and the output of the first MDAC circuit, a third ADC circuit configured to convert an output of the second MDAC circuit into a third digital signal, and a common amplifying circuit shared by the first and the second MDAC circuits, wherein the common amplifying circuit consumes current based on which MDAC circuit the common amplifying circuit operates with. | 11-29-2012 |
20150079162 | CERIA NANOCOMPLEX, PHARMACEUTICAL COMPOSITION COMPRISING SAID CERIA NANOCOMPLEX, AND METHOD FOR PREPARING SAME - The present invention relates to ceria nanocomposite, pharmaceutical composition comprising the ceria nanocomposite, and method for preparing same. More particularly, the present invention is directed to a ceria nanocomposite comprising a ceria nanoparticle, wherein the ceria nanoparticle is encapsulated with a surfactant and the surfactant is encapsulated with polyethylene glycol-phospholipid, pharmaceutical composition for preventing or treating ischemic stroke comprising thereof and method for preparing the same. | 03-19-2015 |