Patent application number | Description | Published |
20080229078 | Dynamic Power Management in a Processor Design - Dynamic power management in a processor design is presented. A pipeline stage's stall detection logic detects a stall condition, and sends a signal to idle detection logic to gate off the pipeline's register clocks. The stall detection logic also monitors a downstream pipeline stage's stall condition, and instructs the idle detection logic to gate off the pipeline stage's registers when the downstream pipeline stage is in a stall condition as well. In addition, when the pipeline stage's stall detection logic detects a stall condition, either from the downstream pipeline stage or from its own pipeline units, the pipeline stage's stall detection logic informs an upstream pipeline stage to gate off its clocks and thus, conserve more power. | 09-18-2008 |
20090043995 | Handling Data Cache Misses Out-of-Order for Asynchronous Pipelines - An apparatus and method for handling data cache misses out-of-order for asynchronous pipelines are provided. The apparatus and method associates load tag (LTAG) identifiers with the load instructions and uses them to track the load instruction across multiple pipelines as an index into a load table data structure of a load target buffer. The load table is used to manage cache “hits” and “misses” and to aid in the recycling of data from the L2 cache. With cache misses, the LTAG indexed load table permits load data to recycle from the L2 cache in any order. When the load instruction issues and sees its corresponding entry in the load table marked as a “miss,” the effects of issuance of the load instruction are canceled and the load instruction is stored in the load table for future reissuing to the instruction pipeline when the required data is recycled. | 02-12-2009 |
20090043997 | Time-Of-Life Counter For Handling Instruction Flushes From A Queue - Tracking the order of issued instructions using a counter is presented. In one embodiment, a saturating, decrementing counter is used. The counter is initialized to a value that corresponds to the processor's commit point. Instructions are issued from a first issue queue to one or more execution units and one or more second issue queues. After being issued by the first issue queue, the counter associated with each instruction is decremented during each instruction cycle until the instruction is executed by one of the execution units. Once the counter reaches zero it will be completed by the execution unit. If a flush condition occurs, instructions with counters equal to zero are maintained (i.e., not flushed or invalidated), while other instructions in the pipeline are invalidated based upon their counter values. | 02-12-2009 |
Patent application number | Description | Published |
20090070609 | POWER THROTTLING APPARATUS - Disclosed is an apparatus which deactivates both the AC as well as the DC component of power for various functions in a CPU. The CPU partitions dataflow registers and arithmetic units such that voltage can be removed from the upper portion of dataflow registers when the software is not utilizing same. Clock signals are also prevented from being applied to these non-utilized components. As an example, if a 64 bit CPU (processor unit) is to be used with both 32 and 64 bit software, the mentioned components may be partitioned in equal sized upper and lower portions. The logic signal for activating the removal of voltage may be obtained from a software-accessible architected control register designated as a machine state register in some CPUs. The same logic may be used in connection with removing voltage and clocks from other specialized functional components such as the floating point unit when software instructions do not presently require same. | 03-12-2009 |
20140173312 | DYNAMIC RE-CONFIGURATION FOR LOW POWER IN A DATA PROCESSOR - A data processor includes an execution unit having a multiple number of redundant resources, and a configuration circuit having first and second modes, wherein in the first mode, the configuration circuit enables the multiple number of redundant resources, and in the second mode, the configuration circuit disables the multiple number of redundant resources. | 06-19-2014 |
20140181561 | POWER THROTTLING QUEUE - A power throttling queue includes a queue and a throttling circuit. The queue has multiple entries. Each entry has a data field and a valid field. The multiple entries include a first portion and a selectively disabled second portion. The throttling circuit is coupled to the queue, and selectively disables the second portion in response to a number of valid entries of the first portion. | 06-26-2014 |
Patent application number | Description | Published |
20100246593 | Steering Data Communications Packets For Transparent Bump-In-The-Wire Processing Among Multiple Data Processing Applications - Steering data communications packets for transparent, bump-in-the-wire processing among multiple data processing applications in a link-level data communications switch, the switch including data communications ports, a port connected to a first data communications network and another port connected to a second data communications network, other ports connected to the data processing applications, the switch also including rules governing the steering, including receiving in the switch from the first network data communications packets directed to the second network, each packet containing a source network address and a destination network address and steering by the switch each packet among the applications and through an egress port, such steering carried out only in accordance with the rules, using neither the source network address of the packet, the destination network address of the packet, nor any link-level identifier of any application. | 09-30-2010 |
20100290475 | Source-Based Steering Data Communications Packets For Transparent, Bump-In-The-Wire Processing Among Multiple Service Applications - Steering data communications packets among multiple service applications in a link-level data communications switching apparatus that includes a link-level data communications switch and data communications ports coupling the switching apparatus to networks organized into pairs of networks, and ports connected to service applications, the switching apparatus further including rules governing the steering of data communications among service applications and networks, at least one rule that includes a network code that identifies a network pair and a direction of travel between the networks, including receiving data communications packets directed to a destination network, each packet containing a source network address, and steering by the switching apparatus each packet, the steering carried out only in accordance with the rules, using neither the source network address of the packet, the destination network address of the packet, nor the link-level identifier of any service application. | 11-18-2010 |
20100303083 | Two-Layer Switch Apparatus To Avoid First Layer Inter-Switch Link Data Traffic In Steering Packets Through Bump-In-The-Wire Service Applications - Link-level data communications carried out in a link-level data communications switching apparatus that includes modular link-level data communications switches; the switching apparatus is configured as two layers of link-level data communications switches; all the switches stacked by a stacking protocol that shares administrative configuration information among the switches and presents the switches as a single logical switch; the switching apparatus includes data communications ports coupling the switching apparatus to data communications networks and to service applications, each service application associated with a unique, link-level identifier; the switching apparatus includes rules governing the steering of packets among service applications and networks; including receiving, in the switching apparatus, packets directed to a destination network; and steering each packet among the service applications to the destination network in accordance with the rules, without using the link-level identifier of any service application. | 12-02-2010 |
20100316055 | Two-Layer Switch Apparatus Avoiding First Layer Inter-Switch Traffic In Steering Packets Through The Apparatus - Link-level data communications implemented in switching apparatus comprising modular switches disposed within a modular computer cabinet that includes modular computer systems; the switching apparatus configured as two layers of switches, the first layer switches coupled to one another for communications by inter-switch links, each second layer switch coupled for communications to the modular computer systems; all the switches stacked by a stacking protocol that shares administrative configuration information among the switches through the inter-switch links and presents all the switches as a single logical switch; the switching apparatus including ports coupling the apparatus to networks and to service applications and terminating applications on the modular computer systems; and sending the packet from network to modular computer system to which the packet is directed, or from modular computer system to network to which the packet is directed, the packet traversing none of the inter-switch links among the first layer switches. | 12-16-2010 |
20110261811 | LOAD-BALANCING VIA MODULUS DISTRIBUTION AND TCP FLOW REDIRECTION DUE TO SERVER OVERLOAD - A method, system and/or computer program product route IP packet flows. An Ethernet switch is coupled to a load balancing control engine, which contains load balancing logic that is logically isolated from the Ethernet switch. The Ethernet switch, which routes IP packet flows to servers, receives an IP packet flow. The load balancing control engine determines if the servers are balanced in their workloads. In response to the load balancing control engine determining that the servers are balanced, the Ethernet switch routes the IP packet flow to the servers without the Ethernet switch directly receiving any feedback from the servers regarding their workloads. In response to the load balancing control engine determining that the servers are unbalanced, the load balancing control engine instructs the Ethernet switch to redirect the IP packet flow to a server that is relatively less busy than other servers. | 10-27-2011 |
20110261822 | STEERING FRAGMENTED IP PACKETS USING 5-TUPLE BASED RULES - A method, system and/or computer program steer internet protocol (IP) packet fragments that are components of a series of IP packet fragments. A switch receives an IP packet fragment. In response to determining that the fragment is not a lead packet fragment in a series of IP packet fragments that make up an original IP packet, the IP packet fragment is pushed onto a data stack. The switch then receives an IP packet fragment which is determined to be the lead packet fragment in a series of IP packet fragments. The IP 5-tuple from the lead packet fragment is parsed to steer all fragments in the series to a destination port. | 10-27-2011 |
20120224486 | LOAD-BALANCING VIA MODULUS DISTRIBUTION AND TCP FLOW REDIRECTION DUE TO SERVER OVERLOAD - A method, switch, and/or computer program product routes IP packet flows. An Ethernet switch receives an IP packet flow. Each of the packets in the IP packet flow has a header that contains a same 5-tuple. A load balancing control engine determines whether servers in a group of servers are balanced in their utilization according to 5-tuple redirection rules contained in the load balancing control engine. In response to the load balancing control engine determining, according to the 5-tuple redirection rules, that the servers are balanced, the Ethernet switch routes the IP packet flow to the servers. In response to the load balancing control engine determining that the servers are unbalanced, the load balancing control engine instructs the Ethernet switch to redirect the IP packet flow to a server that is relatively less busy than other servers. | 09-06-2012 |
20120224581 | STEERING FRAGMENTED IP PACKETS USING 5-TUPLE BASED RULES - A method, system, and/or computer program product steers Internet Protocol (IP) packet fragments. A switch receives a first IP packet fragment that contains a 3-tuple in its header. In response to determining that the first IP packet fragment is not a lead packet fragment in the series of IP packet fragments, the first IP packet fragment is pushed onto a data stack. The switch subsequently receives a second IP packet fragment that contains a 5-tuple, which includes the 3-tuple from the first IP packet fragment plus a source port and destination port used by the second IP packet fragment. The 3-tuple is mapped to the 5-tuple in a fragmentation table, thus enabling both the first IP packet fragment and the second IP packet fragment to be steered to the destination port to which the second IP packet fragment is being sent. | 09-06-2012 |
20120263187 | Two-Layer Switch Apparatus Avoiding First Layer Inter-Switch Traffic In Steering Packets Through The Apparatus - Link-level data communications implemented in switching apparatus comprising modular switches disposed within a modular computer cabinet that includes modular computer systems; the switching apparatus configured as two layers of switches, the first layer switches coupled to one another for communications by inter-switch links, each second layer switch coupled for communications to the modular computer systems; all the switches stacked by a stacking protocol that shares administrative configuration information among the switches through the inter-switch links and presents all the switches as a single logical switch; the switching apparatus including ports coupling the apparatus to networks and to service applications and terminating applications on the modular computer systems; and sending the packet from network to modular computer system to which the packet is directed, or from modular computer system to network to which the packet is directed, the packet traversing none of the inter-switch links among the first layer switches. | 10-18-2012 |
Patent application number | Description | Published |
20140091623 | POWER SHARE CONTROLLER - A battery input receives a power discharge from a first battery of a local device. A controllable charging circuit generates a charging signal based on the power discharge, a charge status of the first battery, a charge status of one or more second battery for at least one of one or more external devices, and a load balancing plan associated with the local device and at least one of the one or more external devices. A charging output to route the charging signal to at least one of the one or more external devices. | 04-03-2014 |
20140096177 | FACILITATING VARIED ACCESS BASED ON AUTHENTICATION SCORING - Systems and methods may provide for determining a composite false match rate for a plurality of authentication factors in a client device environment. Additionally, the composite false match rate can be mapped to a score, wherein an attestation message is generated based on the score. In one example, the score is associated with one or more of a standardized range and a standardized level. | 04-03-2014 |
20140096178 | ALLOWING VARIED DEVICE ACCESS BASED ON DIFFERENT LEVELS OF UNLOCKING MECHANISMS - Systems and methods may provide for receiving runtime input from one or more unlock interfaces of a device and selecting a level of access with regard to the device from a plurality of levels of access based on the runtime input. The selected level of access may have an associated security policy, wherein an authentication of the runtime input may be conducted based on the associated security policy. In one example, one or more cryptographic keys are used to place the device in an unlocked state with regard to the selected level of access if the authentication is successful. If the authentication is unsuccessful, on the other hand, the device may be maintained in a locked state with regard to the selected level of access. | 04-03-2014 |
Patent application number | Description | Published |
20110069835 | Method and apparatus for allowing software access to navigational data in a decrypted media stream while protecting stream payloads - A method, apparatus and system enabling software access to navigational data in a decrypted media stream while protecting stream payloads. In one embodiment, a filter may route an encrypted content stream and associated information to a secure partition having a trusted computing component for decryption. Upon decryption, the trusted computing component may store the decrypted payload of the content in a secure storage location accessible to the trusted computing component. Thereafter, the decrypted navigational header information of the content may be used to navigate to the decrypted content via a trusted component such as a trusted rendering unit in the secure partition. | 03-24-2011 |
20130182837 | METHOD AND APPARATUS FOR ALLOWING SOFTWARE ACCESS TO NAVIGATIONAL DATA IN A DECRYPTED MEDIA STREAM WHILE PROTECTING STREAM PAYLOADS - A method, apparatus and system enabling software access to navigational data in a decrypted media stream while protecting stream payloads. In one embodiment, a filter may route an encrypted content stream and associated information to a secure partition having a trusted computing component for decryption. Upon decryption, the trusted computing component may store the decrypted payload of the content in a secure storage location accessible to the trusted computing component. Thereafter, the decrypted navigational header information of the content may be used to navigate to the decrypted content via a trusted component such as a trusted rendering unit in the secure partition. | 07-18-2013 |
20140086423 | MULTIPLE DEVICE NOISE REDUCTION MICROPHONE ARRAY - Various embodiments are directed to cooperation among communications devices having microphones to employ their microphones in unison to provide voice detection with noise reduction for voice communications. A first communications device comprises a processor circuit; a first microphone; an interface operative to communicatively couple the processor circuit to a network; and a storage communicatively coupled to the processor circuit and arranged to store a sequence of instructions operative on the processor circuit to store a first detected data that represents sounds detected by the first microphone; receive a second detected data via the network that represents sounds detected by a second microphone of a second communications device; subtractively sum the first and second data to create a processed data; and transmit the processed data to a third communications device. Other embodiments are described and claimed herein. | 03-27-2014 |
20140095884 | MULTI-FACTOR AUTHENTICATION USING BIOMETRIC DATA - Technologies for enabling biometric multi-factor authentication includes a transform selector value, a transform function that uses the transform selector value and a biometric user identifier as input, a salt derived from the output of the transform function, and a cryptographic hash function that generates a hash value based on the salt and a non-biometric user identifier. | 04-03-2014 |
20140096270 | SECURE DATA CONTAINERS AND DATA ACCESS CONTROL - Various embodiments are generally directed to creating, sharing and various aspects of accessing information that is digitally stored in a data container on one or more computing devices. An apparatus comprises a processor circuit and a storage communicatively coupled to the processor circuit and storing a first sequence of instructions operative on the processor circuit to receive a signal indicating an access to a data container stored in the storage and comprising a protected data and a second sequence of instructions; and execute the second sequence of instructions, the second sequence of instructions operative on the processor circuit to examine security data associated with the apparatus and stored in the storage, and determine whether to grant access to the protected data based on the examination. Other embodiments are described and claimed herein. | 04-03-2014 |
20140157349 | Verified Sensor Data Processing - Sensor data may be filtered in a secure environment. The filtering may limit distribution of the sensor data. Filtering may modify the sensor data, for example, to prevent identification of a person depicted in a captured image or to prevent acquiring a user's precise location. Filtering may also add or require other data use controls to access the data. Attestation that a filter policy is being applied and working properly or not may be provided as well. | 06-05-2014 |
20140223180 | METHOD AND APPARATUS FOR ALLOWING SOFTWARE ACCESS TO NAVIGATIONAL DATA IN A DECRYPTED MEDIA STREAM WHILE PROTECTING STREAM PAYLOADS - A method, apparatus and system enabling software access to navigational data in a decrypted media stream while protecting stream payloads. In one embodiment, a filter may route an encrypted content stream and associated information to a secure partition having a trusted computing component for decryption. Upon decryption, the trusted computing component may store the decrypted payload of the content in a secure storage location accessible to the trusted computing component. Thereafter, the decrypted navigational header information of the content may be used to navigate to the decrypted content via a trusted component such as a trusted rendering unit in the secure partition. | 08-07-2014 |