Patent application number | Description | Published |
20120199184 | SELF-BYPASS DIODE FUNCTION FOR GALLIUM ARSENIDE PHOTOVOLTAIC DEVICES - Embodiments of the invention generally relate to photovoltaic devices. In one embodiment, a method for forming a gallium arsenide based photovoltaic device includes providing a semiconductor structure, the structure including an absorber layer comprising gallium arsenide. A bypass function is provided in a p-n junction of the semiconductor structure, where under reverse-bias conditions the p-n junction breaks down in a controlled manner by a Zener breakdown effect. | 08-09-2012 |
20120199188 | METAL CONTACT FORMATION AND WINDOW ETCH STOP FOR PHOTOVOLTAIC DEVICES - Embodiments of the invention generally relate to photovoltaic devices and more specifically, to metallic contacts disposed on photovoltaic devices and to the fabrication processes for forming such metallic contacts. In one aspect, a method for contact patterning on a photovoltaic device includes providing a semiconductor structure that includes a front contact layer and a window layer underneath the front contact layer, where the window layer also acts as an etch stop layer. At least one metal layer is deposited on the front contact layer, and a resist is applied on portions of the at least one metal layer. The at least one metal layer and the front contact layer are etched through to achieve the desired metallization. | 08-09-2012 |
20120204942 | OPTOELECTRONIC DEVICES INCLUDING HETEROJUNCTION AND INTERMEDIATE LAYER - Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer. | 08-16-2012 |
20120248577 | Controlled Doping in III-V Materials - A method according to embodiments of the invention includes epitaxially growing a III-nitride semiconductor layer from a gas containing gallium, a gas containing nitrogen, and a gas containing indium. The concentration of indium in the III-nitride semiconductor structure is greater than zero and less than 10 | 10-04-2012 |
20120252159 | METHODS FOR FORMING OPTOELECTRONIC DEVICES INCLUDING HETEROJUNCTION - Embodiments generally relate to optoelectronic semiconductor devices such as photovoltaic cells. In one aspect, a method for forming a device includes forming an absorber layer made of gallium arsenide (GaAs) and having one type of doping, and forming an emitter layer made of a different material and having a higher bandgap than the absorber layer. An intermediate layer can be formed between emitter and absorber layers. A heterojunction and p-n junction are formed between the emitter layer and the absorber layer, where the p-n junction is formed at least partially within the different material at a location offset from the heterojunction. A majority of the absorber layer can be outside of a depletion region formed by the p-n junction. The p-n junction causes a voltage to be generated in the cell in response to the cell being exposed to light at a front side. | 10-04-2012 |
20120305059 | PHOTON RECYCLING IN AN OPTOELECTRONIC DEVICE - An optoelectronic semiconductor device includes an absorber layer made of a direct bandgap semiconductor and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device, the emitter layer made of a different material than the absorber layer and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer at a location offset from the heterojunction. The p-n junction causes a voltage to be generated in the device in response to the device being exposed to light at a front side of the device. The device also includes an n-metal contact disposed on a front side of the device and a p-metal contact disposed on the back side of the device. | 12-06-2012 |
20120309172 | Epitaxial Lift-Off and Wafer Reuse - A method of reusing a III-nitride growth substrate according to embodiments of the invention includes epitaxially growing a III-nitride semiconductor structure on a III-nitride substrate. The III-nitride semiconductor structure includes a sacrificial layer and an additional layer grown over the sacrificial layer. The sacrificial layer is implanted with at least one implant species. The III-nitride substrate is separated from the additional layer at the implanted sacrificial layer. In some embodiments the III-nitride substrate is GaN and the sacrificial layer is GaN, an aluminum-containing III-nitride layer, or an indium-containing III-nitride layer. In some embodiments, the III-nitride substrate is separated from the additional layer by etching the implanted sacrificial layer. | 12-06-2012 |
20130015552 | Electrical Isolation Of High Defect Density Regions In A Semiconductor DeviceAANM Kizilyalli; Isik C.AACI San FranciscoAAST CAAACO USAAGP Kizilyalli; Isik C. San Francisco CA USAANM Bour; David P.AACI CupertinoAAST CAAACO USAAGP Bour; David P. Cupertino CA USAANM Brown; Richard J.AACI Los GatosAAST CAAACO USAAGP Brown; Richard J. Los Gatos CA USAANM Edwards; Andrew P.AACI San JoseAAST CAAACO USAAGP Edwards; Andrew P. San Jose CA USAANM Nie; HuiAACI CupertinoAAST CAAACO USAAGP Nie; Hui Cupertino CA USAANM Romano; Linda T.AACI SunnyvaleAAST CAAACO USAAGP Romano; Linda T. Sunnyvale CA US - Embodiments of the invention include a III-nitride semiconductor layer including a first portion having a first defect density and a second portion having a second defect density. The first defect density is greater than the second defect density. An insulating material is disposed over the first portion. The insulating material is not formed on or is removed from the second portion. | 01-17-2013 |
20130032811 | METHOD AND SYSTEM FOR A GAN VERTICAL JFET UTILIZING A REGROWN GATE - A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction. | 02-07-2013 |
20130032812 | METHOD AND SYSTEM FOR A GAN VERTICAL JFET UTILIZING A REGROWN CHANNEL - A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction, and the channel region extends along at least a portion of the second surface of the gate region. | 02-07-2013 |
20130032813 | METHOD AND SYSTEM FOR DOPING CONTROL IN GALLIUM NITRIDE BASED DEVICES - A method of growing a III-nitride-based epitaxial structure includes providing a substrate in an epitaxial growth reactor and heating the substrate to a predetermined temperature. The method also includes flowing a gallium-containing gas into the epitaxial growth reactor and flowing a nitrogen-containing gas into the epitaxial growth reactor. The method further includes flowing a gettering gas into the epitaxial growth reactor. The predetermined temperature is greater than 1000° C. | 02-07-2013 |
20130032814 | METHOD AND SYSTEM FOR FORMATION OF P-N JUNCTIONS IN GALLIUM NITRIDE BASED ELECTRONICS - A semiconductor device includes a III-nitride substrate having a first conductivity type and a first electrode electrically coupled to the III-nitride substrate. The semiconductor device also includes a III-nitride material having a second conductivity type coupled to the III-nitride substrate at a regrowth interface and a p-n junction disposed between the III-nitride substrate and the regrowth interface. | 02-07-2013 |
20130056743 | METHOD AND SYSTEM FOR LOCAL CONTROL OF DEFECT DENSITY IN GALLIUM NITRIDE BASED ELECTRONICS - A diode includes a substrate characterized by a first dislocation density and a first conductivity type, a first contact coupled to the substrate, and a masking layer having a predetermined thickness and coupled to the semiconductor substrate. The masking layer comprises a plurality of continuous sections and a plurality of openings exposing the substrate and disposed between the continuous sections. The diode also includes an epitaxial layer greater than 5 μm thick coupled to the substrate and the masking layer. The epitaxial layer comprises a first set of regions overlying the plurality of openings and characterized by a second dislocation density and a second set of regions overlying the set of continuous sections and characterized by a third dislocation density less than the first dislocation density and the second dislocation density. The diode further includes a second contact coupled to the epitaxial layer. | 03-07-2013 |
20130075748 | METHOD AND SYSTEM FOR DIFFUSION AND IMPLANTATION IN GALLIUM NITRIDE BASED DEVICES - A method of forming a doped region in a III-nitride substrate includes providing the III-nitride substrate and forming a masking layer having a predetermined pattern and coupled to a portion of the III-nitride substrate. The III-nitride substrate is characterized by a first conductivity type and the predetermined pattern defines exposed regions of the III-nitride substrate. The method also includes heating the III-nitride substrate to a predetermined temperature and placing a dual-precursor gas adjacent the exposed regions of the III-nitride substrate. The dual-precursor gas includes a nitrogen source and a dopant source. The method further includes maintaining the predetermined temperature for a predetermined time period, forming p-type III-nitride regions adjacent the exposed regions of the III-nitride substrate, and removing the masking layer. | 03-28-2013 |
20130087803 | MONOLITHICALLY INTEGRATED HEMT AND SCHOTTKY DIODE - An integrated device including a III-nitride HEMT and a Schottky diode includes a substrate comprising a first III-nitride material and a drift region comprising a second III-nitride material coupled to the substrate and disposed adjacent to the substrate along a vertical direction. The integrated device also includes a first barrier layer coupled to the drift region and a channel layer comprising a third III-nitride material having a first bandgap and coupled to the barrier layer. The integrated device further includes a second barrier layer characterized by a second bandgap and coupled to the channel layer and a Schottky contact coupled to the drift region. The second bandgap is greater than the first bandgap. | 04-11-2013 |
20130087835 | METHOD AND SYSTEM FOR FLOATING GUARD RINGS IN GAN MATERIALS - A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure further includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, a first metallic structure electrically coupled to the second surface of the III-nitride substrate, and a III-nitride epitaxial structure of a second conductivity type coupled to the III-nitride epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure. | 04-11-2013 |
20130087878 | METHOD OF FABRICATING A GAN MERGED P-I-N SCHOTTKY (MPS) DIODE - A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region. | 04-11-2013 |
20130087879 | SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS - A semiconductor structure includes a III-nitride substrate characterized by a first conductivity type and having a first side and a second side opposing the first side, a III-nitride epitaxial layer of the first conductivity type coupled to the first side of the III-nitride substrate, and a plurality of III-nitride epitaxial structures of a second conductivity type coupled to the III-nitride epitaxial layer. The semiconductor structure further includes a III-nitride epitaxial formation of the first conductivity type coupled to the plurality of III-nitride epitaxial structures, and a metallic structure forming a Schottky contact with the III-nitride epitaxial formation and coupled to at least one of the plurality of III-nitride epitaxial structures. | 04-11-2013 |
20130112985 | MONOLITHICALLY INTEGRATED VERTICAL JFET AND SCHOTTKY DIODE - An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction. | 05-09-2013 |
20130126884 | ALUMINUM GALLIUM NITRIDE ETCH STOP LAYER FOR GALLIUM NITRIDE BASES DEVICES - A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, and a first metallic structure electrically coupled to the second surface of the III-nitride substrate. The semiconductor structure further includes an AlGaN epitaxial layer coupled to the III-nitride epitaxial layer of the first conductivity type, and a III-nitride epitaxial structure of a second conductivity type coupled to the AlGaN epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure. | 05-23-2013 |
20130126885 | METHOD AND SYSTEM FOR FABRICATING FLOATING GUARD RINGS IN GAN MATERIALS - A method for fabricating an edge termination structure includes providing a substrate having a first surface and a second surface and a first conductivity type, forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate, and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The method also includes implanting ions into a first region of the second GaN epitaxial layer to electrically isolate a second region of the second GaN epitaxial layer from a third region of the second GaN epitaxial layer. The method further includes forming an active device coupled to the second region of the second GaN epitaxial layer and forming the edge termination structure coupled to the third region of the second GaN epitaxial layer. | 05-23-2013 |
20130126886 | GAN-BASED SCHOTTKY BARRIER DIODE WITH ALGAN SURFACE LAYER - A method of fabricating a Schottky diode using gallium nitride (GaN) materials includes providing an n-type GaN substrate having a first surface and a second surface. The second surface opposes the first surface. The method also includes forming an ohmic metal contact electrically coupled to the first surface of the n-type GaN substrate and forming an n-type GaN epitaxial layer coupled to the second surface of the n-type GaN substrate. The method further includes forming an n-type aluminum gallium nitride (AlGaN) surface layer coupled to the n-type GaN epitaxial layer and forming a Schottky contact electrically coupled to the n-type AlGaN surface layer. | 05-23-2013 |
20130126888 | Edge Termination by Ion Implantation in GaN - An edge terminated semiconductor device is described including a GaN substrate; a doped GaN epitaxial layer grown on the GaN substrate including an ion-implanted insulation region, wherein the ion-implanted region has a resistivity that is at least 90% of maximum resistivity and a conductive layer, such as a Schottky metal layer, disposed over the GaN epitaxial layer, wherein the conductive layer overlaps a portion of the ion-implanted region. A Schottky diode is prepared using the Schottky contact structure. | 05-23-2013 |
20130127006 | GAN-BASED SCHOTTKY BARRIER DIODE WITH FIELD PLATE - A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer. | 05-23-2013 |
20130137225 | METHOD AND SYSTEM FOR CARBON DOPING CONTROL IN GALLIUM NITRIDE BASED DEVICES - A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer. | 05-30-2013 |
20130143392 | IN-SITU SIN GROWTH TO ENABLE SCHOTTKY CONTACT FOR GAN DEVICES - A method of fabricating a diode in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface and forming a n-type GaN drift layer coupled to the first surface of the n-type GaN substrate. The method also includes forming an in-situ Si | 06-06-2013 |
20130146886 | Vertical GaN JFET with Gate Source Electrodes on Regrown Gate - A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure. | 06-13-2013 |
20130161633 | METHOD AND SYSTEM FOR JUNCTION TERMINATION IN GAN MATERIALS USING CONDUCTIVITY MODULATION - A semiconductor structure includes a GaN substrate having a first surface and a second surface opposing the first surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a first GaN epitaxial layer of the first conductivity type coupled to the second surface of the GaN substrate and a second GaN epitaxial layer of a second conductivity type coupled to the first GaN epitaxial layer. The second GaN epitaxial layer includes an active device region, a first junction termination region characterized by an implantation region having a first implantation profile, and a second junction termination region characterized by an implantation region having a second implantation profile. | 06-27-2013 |
20130161634 | METHOD AND SYSTEM FOR FABRICATING EDGE TERMINATION STRUCTURES IN GAN MATERIALS - A method for fabricating an edge termination, which can be used in conjunction with GaN-based materials, includes providing a substrate of a first conductivity type. The substrate has a first surface and a second surface. The method also includes forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The substrate, the first GaN epitaxial layer and the second GaN epitaxial layer can be referred to as an epitaxial structure. | 06-27-2013 |
20130161635 | METHOD AND SYSTEM FOR A GAN SELF-ALIGNED VERTICAL MESFET - A semiconductor structure includes a III-nitride substrate and a drift region coupled to the III-nitride substrate along a growth direction. The semiconductor substrate also includes a channel region coupled to the drift region. The channel region is defined by a channel sidewall disposed substantially along the growth direction. The semiconductor substrate further includes a gate region disposed laterally with respect to the channel region. | 06-27-2013 |
20130161780 | METHOD OF FABRICATING A GAN P-I-N DIODE USING IMPLANTATION - A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region | 06-27-2013 |
20130164893 | FABRICATION OF FLOATING GUARD RINGS USING SELECTIVE REGROWTH - A method for fabricating edge termination structures in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface, forming an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, and forming a growth mask coupled to the n-type GaN epitaxial layer. The method further includes patterning the growth mask to expose at least a portion of the n-type GaN epitaxial layer, and forming at least one p-type GaN epitaxial structure coupled to the at least a portion of the n-type GaN epitaxial layer. The at least one p-type GaN epitaxial structure comprises at least one portion of an edge termination structure. The method additionally includes forming a first metal structure electrically coupled to the second surface of the n-type GaN substrate. | 06-27-2013 |
20130299873 | METHOD AND SYSTEM FOR A GAN VERTICAL JFET WITH SELF-ALIGNED GATE METALLIZATION - A semiconductor device includes a III-nitride substrate and a first III-nitride epitaxial layer coupled to the III-nitride substrate and comprising a drift region, a channel region, and an extension region. The channel region is separated from the III-nitride substrate by the drift region. The channel region is characterized by a first width. The extension region is separated from the drift region by the channel region. The extension region is characterized by a second width less than the first width. The semiconductor device also includes a second III-nitride epitaxial layer coupled to a top surface of the extension region, a III-nitride gate structure coupled to a sidewall of the channel region and laterally self-aligned with respect to the extension region, and a gate metal structure in electrical contact with the III-nitride gate structure and laterally self-aligned with respect to the extension region. | 11-14-2013 |
20130299882 | METHOD AND SYSTEM FOR A GAN VERTICAL JFET WITH SELF-ALIGNED SOURCE METALLIZATION - A semiconductor device includes a III-nitride substrate and a channel structure coupled to the III-nitride substrate. The channel structure comprises a first III-nitride epitaxial material and is characterized by one or more channel sidewalls. The semiconductor device also includes a source region coupled to the channel structure. The source region comprises a second III-nitride epitaxial material. The semiconductor device further includes a III-nitride gate structure coupled to the one or more channel sidewalls, a gate metal structure in electrical contact with the III-nitride gate structure, and a dielectric layer overlying at least a portion of the gate metal structure. A top surface of the dielectric layer is substantially co-planar with a top surface of the source region. | 11-14-2013 |
20130341677 | GAN VERTICAL SUPERJUNCTION DEVICE STRUCTURES AND FABRICATION METHODS - A semiconductor device includes a III-nitride substrate of a first conductivity type, a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, and a first III-nitride epitaxial structure coupled to a first portion of a surface of the first III-nitride epitaxial layer. The first III-nitride epitaxial structure has a sidewall. The semiconductor device further includes a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure, a second III-nitride epitaxial layer of the first conductivity type coupled to the sidewall of the second III-nitride epitaxial layer and a second portion of the surface of the first III-nitride epitaxial layer, and a third III-nitride epitaxial layer of a second conductivity type coupled to the second III-nitride epitaxial layer. The semiconductor device also includes one or more dielectric structures coupled to a surface of the third III-nitride epitaxial layer. | 12-26-2013 |
20140042447 | METHOD AND SYSTEM FOR GALLIUM NITRIDE ELECTRONIC DEVICES USING ENGINEERED SUBSTRATES - A method for fabricating an electronic device includes providing an engineered substrate structure comprising a III-nitride seed layer, forming GaN-based functional layers coupled to the III-nitride seed layer, and forming a first electrode structure electrically coupled to at least a portion of the GaN-based functional layers. The method also includes joining a carrier substrate opposing the GaN-based functional layers and removing at least a portion of the engineered substrate structure. The method further includes forming a second electrode structure electrically coupled to at least another portion of the GaN-based functional layers and removing the carrier substrate. | 02-13-2014 |
20140045306 | METHOD AND SYSTEM FOR IN-SITU AND REGROWTH IN GALLIUM NITRIDE BASED DEVICES - A method of regrowing material includes providing a III-nitride structure including a masking layer and patterning the masking layer to form an etch mask. The method also includes removing, using an in-situ etch, a portion of the III-nitride structure to expose a regrowth region and regrowing a III-nitride material in the regrowth region. | 02-13-2014 |
20140048902 | METHOD OF FABRICATING A GALLIUM NITRIDE MERGED P-I-N SCHOTTKY (MPS) DIODE BY REGROWTH AND ETCH BACK - An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections. | 02-20-2014 |
20140048903 | METHOD AND SYSTEM FOR EDGE TERMINATION IN GAN MATERIALS BY SELECTIVE AREA IMPLANTATION DOPING - A method for fabricating edge termination structures in gallium nitride (GaN) materials includes providing an n-type GaN substrate having a first surface and a second surface, forming an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, and forming one or more p-type regions in the n-type GaN epitaxial layer by using a first ion implantation. At least one of the one or more p-type regions includes an edge termination structure. | 02-20-2014 |
20140051236 | GAN-BASED SCHOTTKY BARRIER DIODE WITH FIELD PLATE - A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer. | 02-20-2014 |
20140070226 | BONDABLE TOP METAL CONTACTS FOR GALLIUM NITRIDE POWER DEVICES - An embodiment of a semiconductor device includes a gallium nitride (GaN) substrate having a first surface and a second surface. The second surface is substantially opposite the first surface, at least one device layer is coupled to the first surface, and a backside metal is coupled to the second surface. A top metal stack is coupled to the at least one device layer. The top metal stack includes a contact metal coupled to a surface of the at least one device layer, a protection layer coupled to the contact metal, a diffusion barrier coupled to the protection layer, and a pad metal coupled to the diffusion barrier. The semiconductor device is configured to conduct electricity between the top metal stack and the backside metal. | 03-13-2014 |
20140116328 | METHOD AND SYSTEM FOR CARBON DOPING CONTROL IN GALLIUM NITRIDE BASED DEVICES - A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer. | 05-01-2014 |
20140131721 | LATERAL GAN JFET WITH VERTICAL DRIFT REGION - A gallium nitride (GaN)-based junction field-effect transistor (JFET) can include a GaN drain region having a top surface extending in a lateral dimension, a source region, and a GaN channel region of a first conductivity type coupled between the source region and the GaN drain region and operable to conduct electrical current between the source region and the GaN drain region. The JFET can also include a blocking layer disposed between the source region and the GaN drain region such that the GaN channel region is operable to conduct the electrical current substantially along the lateral dimension in a laterally-conductive region of the GaN channel region, and a GaN gate region of a second conductivity type coupled to the GaN channel region such that the laterally-conductive region of the GaN channel region is disposed between at least a portion of the blocking layer and the GaN gate region. | 05-15-2014 |
20140131837 | GAN VERTICAL BIPOLAR TRANSISTOR - An embodiment of a semiconductor device includes a III-nitride base structure of a first conductivity type, and a III-nitride emitter structure of a second conductivity type having a first surface and a second surface. The second surface is substantially opposite the first surface. The first surface of the III-nitride emitter structure is coupled to a surface of the III-nitride base structure. The semiconductor also includes a first dielectric layer coupled to the second surface of the III-nitride emitter structure, and a spacer coupled to a sidewall of the III-nitride emitter structure and the surface of the III-nitride base structure. The semiconductor also includes a base contact structure with a III-nitride material coupled to the spacer, the surface of the III-nitride base structure, and the first dielectric layer, such that the first dielectric layer and the spacer are disposed between the base contact structure and the III-nitride emitter structure. | 05-15-2014 |
20140145201 | METHOD AND SYSTEM FOR GALLIUM NITRIDE VERTICAL JFET WITH SEPARATED GATE AND SOURCE - A semiconductor structure includes a III-nitride substrate and a first III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The semiconductor structure also includes a first III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial layer and a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure. The semiconductor structure further includes a second III-nitride epitaxial layer coupled to the first III-nitride epitaxial structure. The second III-nitride epitaxial layer is of a second conductivity type and is not electrically connected to the second III-nitride epitaxial structure. | 05-29-2014 |
20140159051 | MONOLITHICALLY INTEGRATED VERTICAL JFET AND SCHOTTKY DIODE - An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction. | 06-12-2014 |
20140162416 | ALUMINUM GALLIUM NITRIDE ETCH STOP LAYER FOR GALLIUM NITRIDE BASED DEVICES - A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, and a first metallic structure electrically coupled to the second surface of the III-nitride substrate. The semiconductor structure further includes an AlGaN epitaxial layer coupled to the III-nitride epitaxial layer of the first conductivity type, and a III-nitride epitaxial structure of a second conductivity type coupled to the AlGaN epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure. | 06-12-2014 |
20140191241 | GALLIUM NITRIDE VERTICAL JFET WITH HEXAGONAL CELL STRUCTURE - An array of GaN-based vertical JFETs includes a GaN substrate comprising a drain of one or more of the JFETs and one or more epitaxial layers coupled to the GaN substrate. The array also includes a plurality of hexagonal cells coupled to the one or more epitaxial layers and extending in a direction normal to the GaN substrate. Sidewalls of the plurality of hexagonal cells are substantially aligned with respect to crystal planes of the GaN substrate. The array further includes a plurality of channel regions, each having a portion adjacent a sidewall of the plurality of hexagonal cells, a plurality of gate regions of one or more of the JFETs, each electrically coupled to one or more of the plurality of channel regions, and a plurality of source regions of one or more of the JFETs electrically coupled to one or more of the plurality of channel regions. | 07-10-2014 |
20140191242 | METHOD AND SYSTEM FOR A GALLIUM NITRIDE VERTICAL TRANSISTOR - A vertical JFET includes a GaN substrate comprising a drain of the JFET and a plurality of patterned epitaxial layers coupled to the GaN substrate. A distal epitaxial layer comprises a first part of a source channel and adjacent patterned epitaxial layers are separated by a gap having a predetermined distance. The vertical JFET also includes a plurality of regrown epitaxial layers coupled to the distal epitaxial layer and disposed in at least a portion of the gap. A proximal regrown epitaxial layer comprises a second part of the source channel. The vertical JFET further includes a source contact passing through portions of a distal regrown epitaxial layer and in electrical contact with the source channel, a gate contact in electrical contact with a distal regrown epitaxial layer, and a drain contact in electrical contact with the GaN substrate. | 07-10-2014 |
20140203328 | METHOD AND SYSTEM FOR A GALLIUM NITRIDE VERTICAL JFET WITH SELF-ALIGNED GATE METALLIZATION - A semiconductor device includes a III-nitride substrate and a first III-nitride epitaxial layer coupled to the III-nitride substrate and comprising a drift region, a channel region, and an extension region. The channel region is separated from the III-nitride substrate by the drift region. The channel region is characterized by a first width. The extension region is separated from the drift region by the channel region. The extension region is characterized by a second width less than the first width. The semiconductor device also includes a second III-nitride epitaxial layer coupled to a top surface of the extension region, a III-nitride gate structure coupled to a sidewall of the channel region and laterally self-aligned with respect to the extension region, and a gate metal structure in electrical contact with the III-nitride gate structure and laterally self-aligned with respect to the extension region. | 07-24-2014 |
20140206179 | METHOD AND SYSTEM FOR JUNCTION TERMINATION IN GAN MATERIALS USING CONDUCTIVITY MODULATION - A semiconductor structure includes a GaN substrate having a first surface and a second surface opposing the first surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a first GaN epitaxial layer of the first conductivity type coupled to the second surface of the GaN substrate and a second GaN epitaxial layer of a second conductivity type coupled to the first GaN epitaxial layer. The second GaN epitaxial layer includes an active device region, a first junction termination region characterized by an implantation region having a first implantation profile, and a second junction termination region characterized by an implantation region having a second implantation profile. | 07-24-2014 |
20140235030 | METHOD AND SYSTEM FOR FABRICATING FLOATING GUARD RINGS IN GAN MATERIALS - A method for fabricating an edge termination structure includes providing a substrate having a first surface and a second surface and a first conductivity type, forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate, and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The method also includes implanting ions into a first region of the second GaN epitaxial layer to electrically isolate a second region of the second GaN epitaxial layer from a third region of the second GaN epitaxial layer. The method further includes forming an active device coupled to the second region of the second GaN epitaxial layer and forming the edge termination structure coupled to the third region of the second GaN epitaxial layer. | 08-21-2014 |
20140291691 | VERTICAL GALLIUM NITRIDE JFET WITH GATE AND SOURCE ELECTRODES ON REGROWN GATE - A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure. | 10-02-2014 |
20140295652 | GAN VERTICAL SUPERJUNCTION DEVICE STRUCTURES AND FABRICATION METHODS - A semiconductor device includes a III-nitride substrate of a first conductivity type, a first III-nitride epitaxial layer of the first conductivity type coupled to the III-nitride substrate, and a first III-nitride epitaxial structure coupled to a first portion of a surface of the first III-nitride epitaxial layer. The first III-nitride epitaxial structure has a sidewall. The semiconductor device further includes a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure, a second III-nitride epitaxial layer of the first conductivity type coupled to the sidewall of the second III-nitride epitaxial layer and a second portion of the surface of the first III-nitride epitaxial layer, and a third III-nitride epitaxial layer of a second conductivity type coupled to the second III-nitride epitaxial layer. The semiconductor device also includes one or more dielectric structures coupled to a surface of the third III-nitride epitaxial layer. | 10-02-2014 |
20140312355 | METHOD OF FABRICATING A MERGED P-N JUNCTION AND SCHOTTKY DIODE WITH REGROWN GALLIUM NITRIDE LAYER - A method for fabricating a merged p-i-n Schottky (MPS) diode in gallium nitride (GaN) based materials includes providing an n-type GaN-based substrate having a first surface and a second surface. The method also includes forming an n-type GaN-based epitaxial layer coupled to the first surface of the n-type GaN-based substrate, and forming a p-type GaN-based epitaxial layer coupled to the n-type GaN-based epitaxial layer. The method further includes removing portions of the p-type GaN-based epitaxial layer to form a plurality of dopant sources, and regrowing a GaN-based epitaxial layer including n-type material in regions overlying portions of the n-type GaN-based epitaxial layer, and p-type material in regions overlying the plurality of dopant sources. The method also includes forming a first metallic structure electrically coupled to the regrown GaN-based epitaxial layer. | 10-23-2014 |
20140346527 | Method of fabricating a gallium nitride p-i-n diode using implantation - A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region | 11-27-2014 |
20140370669 | METHOD AND SYSTEM FOR A GALLIUM NITRIDE VERTICAL JFET WITH SELF-ALIGNED SOURCE AND GATE - A semiconductor device includes a III-nitride substrate, a first III-nitride epitaxial layer coupled to the III-nitride substrate and having a mesa, and a second III-nitride epitaxial layer coupled to a top surface of the mesa. The semiconductor device further includes a III-nitride gate structure coupled to a side surface of the mesa, and a spacer configured to provide electrical insulation between the second III-nitride epitaxial layer and the III-nitride gate structure. | 12-18-2014 |
20140374769 | GAN-BASED SCHOTTKY BARRIER DIODE WITH ALGAN SURFACE LAYER - A Schottky diode and method of fabricating the Schottky diode using gallium nitride (GaN) materials is disclosed. The method includes providing an n-type GaN substrate having first and second opposing surfaces. The method also includes forming an ohmic metal contact electrically coupled to the first surface, forming an n-type GaN epitaxial layer coupled to the second surface, and forming an n-type aluminum gallium nitride (AlGaN) surface layer coupled to the n-type GaN epitaxial layer. The AlGaN surface layer has a thickness which is less than a critical thickness, and the critical thickness is determined based on an aluminum mole fraction of the AlGaN surface layer. The method also includes forming a Schottky contact electrically coupled to the n-type AlGaN surface layer, where, during operation, an interface between the n-type GaN epitaxial layer and the n-type AlGaN surface layer is substantially free from a two-dimensional electron gas. | 12-25-2014 |
20150017792 | METHOD AND SYSTEM FOR DIFFUSION AND IMPLANTATION IN GALLIUM NITRIDE BASED DEVICES - A method of forming a doped region in a III-nitride substrate includes providing the III-nitride substrate and forming a masking layer having a predetermined pattern and coupled to a portion of the III-nitride substrate. The III-nitride substrate is characterized by a first conductivity type and the predetermined pattern defines exposed regions of the III-nitride substrate. The method also includes heating the III-nitride substrate to a predetermined temperature and placing a dual-precursor gas adjacent the exposed regions of the III-nitride substrate. The dual-precursor gas includes a nitrogen source and a dopant source. The method further includes maintaining the predetermined temperature for a predetermined time period, forming p-type III-nitride regions adjacent the exposed regions of the III-nitride substrate, and removing the masking layer. | 01-15-2015 |
20150102360 | BONDABLE TOP METAL CONTACTS FOR GALLIUM NITRIDE POWER DEVICES - An embodiment of a semiconductor device includes a gallium nitride (GaN) substrate having a first surface and a second surface. The second surface is substantially opposite the first surface, at least one device layer is coupled to the first surface, and a backside metal is coupled to the second surface. A top metal stack is coupled to the at least one device layer. The top metal stack includes a contact metal coupled to a surface of the at least one device layer, a protection layer coupled to the contact metal, a diffusion barrier coupled to the protection layer, and a pad metal coupled to the diffusion barrier. The semiconductor device is configured to conduct electricity between the top metal stack and the backside metal. | 04-16-2015 |
20150132899 | METHOD AND SYSTEM FOR A GAN VERTICAL JFET UTILIZING A REGROWN CHANNEL - A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction, and the channel region extends along at least a portion of the second surface of the gate region. | 05-14-2015 |
20150137140 | VERTICAL GALLIUM NITRIDE JFET WITH GATE AND SOURCE ELECTRODES ON REGROWN GATE - A semiconductor structure includes a GaN substrate with a first surface and a second surface. The GaN substrate is characterized by a first conductivity type and a first dopant concentration. A first electrode is electrically coupled to the second surface of the GaN substrate. The semiconductor structure further includes a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the GaN substrate and a second GaN layer of a second conductivity type coupled to the first GaN epitaxial layer. The first GaN epitaxial layer comprises a channel region. The second GaN epitaxial layer comprises a gate region and an edge termination structure. A second electrode coupled to the gate region and a third electrode coupled to the channel region are both disposed within the edge termination structure. | 05-21-2015 |
20150140746 | MONOLITHICALLY INTEGRATED VERTICAL JFET AND SCHOTTKY DIODE - An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction. | 05-21-2015 |
20150155372 | METHOD AND SYSTEM FOR DOPING CONTROL IN GALLIUM NITRIDE BASED DEVICES - A method of growing a III-nitride-based epitaxial structure is disclosed. The method includes forming a GaN-based drift layer coupled to the GaN-based substrate, where forming the GaN-based drift layer comprises doping the drift layer with indium to cause the indium concentration of the drift layer to be less than about 1×10 | 06-04-2015 |
20150179733 | SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS - A semiconductor structure includes a III-nitride substrate characterized by a first conductivity type and having a first side and a second side opposing the first side, a III-nitride epitaxial layer of the first conductivity type coupled to the first side of the III-nitride substrate, and a plurality of III-nitride epitaxial structures of a second conductivity type coupled to the III-nitride epitaxial layer. The semiconductor structure further includes a III-nitride epitaxial formation of the first conductivity type coupled to the plurality of III-nitride epitaxial structures, and a metallic structure forming a Schottky contact with the III-nitride epitaxial formation and coupled to at least one of the plurality of III-nitride epitaxial structures. | 06-25-2015 |
20150179772 | METHOD AND SYSTEM FOR A GALLIUM NITRIDE SELF-ALIGNED VERTICAL MESFET - A semiconductor structure includes a III-nitride substrate and a drift region coupled to the III-nitride substrate along a growth direction. The semiconductor substrate also includes a channel region coupled to the drift region. The channel region is defined by a channel sidewall disposed substantially along the growth direction. The semiconductor substrate further includes a gate region disposed laterally with respect to the channel region. | 06-25-2015 |
20150200097 | EDGE TERMINATION BY ION IMPLANTATION IN GALLIUM NITRIDE - A method of making an edge terminated semiconductor device includes providing a GaN substrate having a GaN epitaxial layer grown thereon and exposing a portion of the GaN epitaxial layer to ion implantation. The energy dose is selected to provide a resistivity that is at least 90% of maximum achievable resistivity. The method also includes depositing a conductive layer over a portion of the implanted region. | 07-16-2015 |
20150200268 | METHOD OF FABRICATING A GALLIUM NITRIDE MERGED P-I-N SCHOTTKY (MPS) DIODE BY REGROWTH AND ETCH BACK - An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections. | 07-16-2015 |
20150228835 | OPTOELECTRONIC DEVICES INCLUDING HETEROJUNCTION AND INTERMEDIATE LAYER - Embodiments generally relate to optoelectronic semiconductor devices such as solar cells. In one aspect, a device includes an absorber layer made of gallium arsenide (GaAs) and having only one type of doping. An emitter layer is located closer than the absorber layer to a back side of the device and is made of a different material and having a higher bandgap than the absorber layer. A heterojunction is formed between the emitter layer and the absorber layer, and a p-n junction is formed between the emitter layer and the absorber layer and at least partially within the different material at a location offset from the heterojunction. An intermediate layer is located between the absorber layer and the emitter layer and provides the offset of the p-n junction from the heterojunction, and includes a graded layer and an ungraded back window layer. | 08-13-2015 |
20150243758 | METHOD AND SYSTEM FOR A GALLIUM NITRIDE VERTICAL TRANSISTOR - A vertical JFET includes a GaN substrate comprising a drain of the JFET and a plurality of patterned epitaxial layers coupled to the GaN substrate. A distal epitaxial layer comprises a first part of a source channel and adjacent patterned epitaxial layers are separated by a gap having a predetermined distance. The vertical JFET also includes a plurality of regrown epitaxial layers coupled to the distal epitaxial layer and disposed in at least a portion of the gap. A proximal regrown epitaxial layer comprises a second part of the source channel. The vertical JFET further includes a source contact passing through portions of a distal regrown epitaxial layer and in electrical contact with the source channel, a gate contact in electrical contact with a distal regrown epitaxial layer, and a drain contact in electrical contact with the GaN substrate. | 08-27-2015 |
20150325677 | METHOD AND SYSTEM FOR LOCAL CONTROL OF DEFECT DENSITY IN GALLIUM NITRIDE BASED ELECTRONICS - A diode includes a substrate characterized by a first dislocation density and a first conductivity type, a first contact coupled to the substrate, and a masking layer having a predetermined thickness and coupled to the semiconductor substrate. The masking layer comprises a plurality of continuous sections and a plurality of openings exposing the substrate and disposed between the continuous sections. The diode also includes an epitaxial layer greater than 5 μm thick coupled to the substrate and the masking layer. The epitaxial layer comprises a first set of regions overlying the plurality of openings and characterized by a second dislocation density and a second set of regions overlying the set of continuous sections and characterized by a third dislocation density less than the first dislocation density and the second dislocation density. The diode further includes a second contact coupled to the epitaxial layer. | 11-12-2015 |
20150340514 | METHOD AND SYSTEM FOR A GALLIUM NITRIDE VERTICAL JFET WITH SELF-ALIGNED SOURCE AND GATE - A semiconductor device includes a III-nitride substrate, a first III-nitride epitaxial layer coupled to the III-nitride substrate and having a mesa, and a second III-nitride epitaxial layer coupled to a top surface of the mesa. The semiconductor device further includes a III-nitride gate structure coupled to a side surface of the mesa, and a spacer configured to provide electrical insulation between the second III-nitride epitaxial layer and the III-nitride gate structure. | 11-26-2015 |
20150364612 | METHOD OF FABRICATING A GAN P-I-N DIODE USING IMPLANTATION - A III-nitride semiconductor device includes an active region for supporting current flow during forward-biased operation of the III-nitride semiconductor device. The active region includes a first III-nitride epitaxial material having a first conductivity type, and a second III-nitride epitaxial material having a second conductivity type. The III-nitride semiconductor device further includes an edge-termination region physically adjacent to the active region and including an implanted region comprising a portion of the first III-nitride epitaxial material. The implanted region of the first III-nitride epitaxial material has a reduced electrical conductivity in relation to portions of the first III-nitride epitaxial material adjacent to the implanted region | 12-17-2015 |
20160005835 | METHOD OF FABRICATING A MERGED P-N JUNCTION AND SCHOTTKY DIODE WITH REGROWN GALLIUM NITRIDE LAYER - A method for fabricating a merged p-i-n Schottky (MPS) diode in gallium nitride (GaN) based materials includes providing an n-type GaN-based substrate having a first surface and a second surface. The method also includes forming an n-type GaN-based epitaxial layer coupled to the first surface of the n-type GaN-based substrate, and forming a p-type GaN-based epitaxial layer coupled to the n-type GaN-based epitaxial layer. The method further includes removing portions of the p-type GaN-based epitaxial layer to form a plurality of dopant sources, and regrowing a GaN-based epitaxial layer including n-type material in regions overlying portions of the n-type GaN-based epitaxial layer, and p-type material in regions overlying the plurality of dopant sources. The method also includes forming a first metallic structure electrically coupled to the regrown GaN-based epitaxial layer. | 01-07-2016 |
20160043182 | METHOD AND SYSTEM FOR FORMATION OF P-N JUNCTIONS IN GALLIUM NITRIDE BASED ELECTRONICS - A semiconductor device includes a III-nitride substrate having a first conductivity type and a first electrode electrically coupled to the III-nitride substrate. The semiconductor device also includes a III-nitride material having a second conductivity type coupled to the III-nitride substrate at a regrowth interface and a p-n junction disposed between the III-nitride substrate and the regrowth interface. | 02-11-2016 |
20160043198 | SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS - A semiconductor structure includes a III-nitride substrate characterized by a first conductivity type and having a first side and a second side opposing the first side, a III-nitride epitaxial layer of the first conductivity type coupled to the first side of the III-nitride substrate, and a plurality of III-nitride epitaxial structures of a second conductivity type coupled to the III-nitride epitaxial layer. The semiconductor structure further includes a III-nitride epitaxial formation of the first conductivity type coupled to the plurality of III-nitride epitaxial structures, and a metallic structure forming a Schottky contact with the III-nitride epitaxial formation and coupled to at least one of the plurality of III-nitride epitaxial structures. | 02-11-2016 |
Patent application number | Description | Published |
20090004118 | Multifunctional Nanoparticle Conjugates And Their Use - Disclosed herein are conjugates comprising a nanocarrier, a therapeutic agent or imaging agent and a targeting agent. Also disclosed herein are compositions comprising such conjugates and methods for using the conjugates to deliver therapeutic and/or imaging agents to cells. Also disclosed are methods for using the conjugates to treat particular disorders, such as proliferative disorders. | 01-01-2009 |
20090123365 | Multifunctional nanostructures, methods of synthesizing thereof, and methods of use thereof - A nanostructure and methods of synthesizing same. In one embodiment, the nanostructure includes a nanospecies, a hydrophobic protection structure including at least one compound selected from a capping ligand, an amphiphilic copolymer, and combinations thereof, wherein the hydrophobic protection structure encapsulates the nanospecies, and at least one histidine-tagged peptide or protein conjugated to the hydrophobic protection structure, wherein the at least one histidine-tagged peptide or protein has at least one binding site. | 05-14-2009 |
20090140206 | Surface enhanced Raman spectroscopy (SERS)-active composite nanoparticles, methods of fabrication thereof, and methods of use thereof - Nanoparticles, methods of preparation thereof, and methods of detecting a target molecule using embodiments of the nanoparticle, are disclosed. One embodiment of an exemplary nanoparticle, among others, includes a surface-enhanced Raman spectroscopic active composite nanostructure. The surface-enhanced Raman spectroscopic active composite nanostructure includes a core, at least one reporter molecule, and an encapsulating material. The reporter molecule is bonded to the core. The reporter molecule is selected from: an isothiocyanate dye, a multi-sulfur organic dye, a multi-heterosulfur organic dye, a benzotriazole dye, and combinations thereof The encapsulating material is disposed over the core and the reporter molecule. After encapsulation with the encapsulating material, the reporter molecule has a measurable surface-enhanced Raman spectroscopic signature. | 06-04-2009 |
20090169861 | POROUS MATERIALS EMBEDDED WITH NANOSPECIES, METHODS OF FABRICATION THEREOF, AND METHODS OF USE THEREOF - Briefly described, embodiments of this disclosure include structures, methods of forming the structures, and methods of using the structures. One exemplary structure, among others, includes a nanospecies and a porous material. The nanospecies has a first characteristic and a second detectable characteristic. In addition, a second detectable energy is produced corresponding to the second detectable characteristic upon exposure to a first energy. The porous material has the first characteristic and a plurality of pores. The first characteristic causes the nanospecies to interact with the porous material and become disposed in the pores of the porous material. | 07-02-2009 |
20090196831 | NANOSTRUCTURES, METHODS OF SYNTHESIZING THEREOF, AND METHODS OF USE THEREOF - A nanostructure and methods of synthesizing same. In one embodiment, the nanostructure includes a magnetic iron oxide nanoparticle, a hydrophobic protection structure including at least an amphiphilic copolymer, wherein the hydrophobic protection structure encapsulates the magnetic iron oxide nanoparticle, and at least one amino-terminal fragment (ATF) peptide or epidermal growth factor receptor (EGFR) antibody conjugated to the amphiphilic copolymer. | 08-06-2009 |
20100304358 | METHODS OF IDENTIFYING BIOLOGICAL TARGETS AND INSTRUMENTATION TO IDENTIFY BIOLOGICAL TARGETS - Methods of measuring and/or detecting biological targets, methods of distinguishing among the same type of biological target, single-molecule detection systems, fluorescent/biological target complexes, methods of using fluorescent/biological target complexes, and the like are disclosed. | 12-02-2010 |
20110060036 | Branched Multifunctional Nanoparticle Conjugates And Their Use - Disclosed herein are compounds and compositions including a polyglycerol nanocarrier, a therapeutic agent or imaging agent, and optionally a targeting agent. In certain aspects the disclosed compounds include biocompatible hyperbranched polymer nanocarriers. Such compounds and compositions are useful for the targeted delivery of antitumor agents and imaging agents to tumors in vivo. Methods are also disclosed for detecting and treating such tumors. | 03-10-2011 |
20110152692 | SYSTEM AND METHODS FOR PROVIDING REAL-TIME ANATOMICAL GUIDANCE IN A DIAGNOSTIC OR THERAPEUTIC PROCEDURE - According to one aspect, a system for intraoperatively providing anatomical guidance in a diagnostic or therapeutic procedure is disclosed. In one embodiment, the system includes: a first light source configured to emit a beam of visible light; second light source configured to emit a beam of near-infrared light; a handheld probe optically coupled to the second light source; a second imaging device configured to detect visible light; a third imaging device configured to detect near-infrared light having a first predetermined wavelength; a fourth imaging device configured to detect near-infrared light having a second predetermined wavelength; a display for displaying at least one visual representation of data; and, a controller programmed to generate at least one real-time integrated visual representation of an area of interest and to display the real-time visual representation on the display for guidance during the diagnostic or therapeutic procedure. | 06-23-2011 |
20110165077 | IN VIVO TUMOR TARGETING AND SPECTROSCOPIC DETECTION WITH SURFACE ENHANCED RAMAN NANOPARTICLE TAGS - Nanostructures, methods of preparing nanostructures, methods of detecting targets in subjects, and methods of treating diseases in subjects, are disclosed. An embodiment, among others, of the nanostructure includes a metallic gold surface-enhanced Raman scattering nanoparticle, a Raman reporter and a protection structure. The protection structure may include a thiol-polyethylene glycol to which may be attached a target-specific probe. | 07-07-2011 |
20110189102 | COATED QUANTUM DOTS AND METHODS OF MAKING AND USING THEREOF - The present disclosure provides embodiments of a new class of hydroxylated quantum dots. The quantum dots have a hydroxylated coat disposed thereon, and which serves to minimize non-specific cellular binding and to maintain the small size of quantum dot probes. Embodiments of the coated quantum dots of the disclosure are just slightly larger than the diameter of uncoated quantum dots, and are bright with high quantum yields. They are also very stable under both basic and acidic conditions. Embodiments of the hydroxylated quantum dots result in significant reductions in non-specific binding relative to that of carboxylated dots, and to protein and PEG-coated dots. Embodiments of the disclosure are advantageous in a range of biological applications where non-specific binding is a major problem, such as in multiplexed biomarker staining in cells and tissues, detection of biomarkers in body fluid samples (blood, urine, etc.), as well as live cell imaging. | 08-04-2011 |
20110311453 | Alloyed semiconductor quantum dots and concentration-gradient alloyed quantum dots, series comprising the same and methods related thereto - An alloyed semiconductor quantum dot comprising an alloy of at least two semiconductors, wherein the quantum dot has a homogeneous composition and is characterized by a band gap energy that is non-linearly related to the molar ratio of the at least two semiconductors; a series of alloyed semiconductor quantum dots related thereto; a concentration-gradient quantum dot comprising an alloy of a first semiconductor and a second semiconductor, wherein the concentration of the first semiconductor gradually increases from the core of the quantum dot to the surface of the quantum dot and the concentration of the second semiconductor gradually decreases from the core of the quantum dot to the surface of the quantum dot; a series of concentration-gradient quantum dots related thereto; in vitro and in vivo methods of use; and methods of producing the alloyed semiconductor and concentration-gradient quantum dots and the series of quantum dots related thereto. | 12-22-2011 |
20120123205 | ADDITIONAL SYSTEMS AND METHODS FOR PROVIDING REAL-TIME ANATOMICAL GUIDANCE IN A DISGNOSTIC OR THERAPEUTIC PROCEDURE - A system and method for intra-operatively providing anatomical guidance in a diagnostic or therapeutic procedure is disclosed. In embodiments, the system includes multiple light sources configured to emit different frequencies, multiple electronic imaging devices to detect various frequencies of reflected, emitted, or scattered light. The system and method incorporate an optical probe is integral to an endoscopic device or a therapeutic laser system, optically coupled to a light source; a display for displaying at least one visual representation of data; and a controller programmed to generate at least one real-time integrated visual representation of an area of interest and to display the real-time visual representation on the display for guidance during the diagnostic or therapeutic procedure. | 05-17-2012 |
20120270231 | LATTICE-MISMATCHED CORE-SHELL QUANTUM DOTS - The disclosure relates to lattice-mismatched core-shell quantum dots (QDs). In certain embodiments, the lattice-mismatched core-shell QDs are used in methods for photovoltaic or photoconduction applications. They are also useful for multicolor molecular, cellular, and in vivo imaging. | 10-25-2012 |
20130149247 | VIVO TUMOR TARGETING AND SPECTROSCOPIC DETECTION WITH SURFACE-ENHANCED RAMAN NANOPARTICLE TAGS - Nanostructures, methods of preparing nanostructures, methods of detecting targets in subjects, and methods of treating diseases in subjects, are disclosed. An embodiment, among others, of the nanostructure includes a metallic gold surface-enhanced Raman scattering nanoparticle, a Raman reporter and a protection structure. The protection structure may include a thiol-polyethylene glycol to which may be attached a target-specific probe. | 06-13-2013 |
20130259944 | METHODS AND COMPOSITIONS FOR TREATING CANCER WITH PLATINUM PARTICLES - This disclosure relates to methods and compositions for treating cancer with platinum particles. In certain embodiments, the disclosure relates to platinum particle coated with a polysaccharide, such as a heparin or modified heparin, conjugated to a polypeptide that has affinity for a cell surface cancer marker and uses related thereto. | 10-03-2013 |
20130337471 | CELL IDENTIFICATION WITH NANOPARTICLES, COMPOSITIONS AND METHODS RELATED THERETO - The present disclosure provides a method for identifying rare or low-abundant biological entities such as Hodgkin's and Reed-Sternberg cells, circulating tumor cells in peripheral blood, circulating fetal cells, stem cells, somatic cells, HIV-infected T cells, bacteria or viruses in water, adenoviruses, enteroviruses, hepatitis A and E, dengue, Swine Flu, bovine diarrhea, and protozpa/helminthes. The method uses a suite of nanoparticle-conjugated agents to mark biological targets of interest for subsequent fluorescence imaging. In certain embodiments, the nanoparticle-conjugated agents are fluorescent semiconductor nanocrystals conjugated with antibodies with affinity for CD15, CD30, CD45, and Pax5. In certain embodiments, a method is developed to differentiate Hodgkin's and Reed-Sternberg (HRS) cells from amongst surrounding immune cells such as T and B lymphocytes with greater specificity and precision than traditional immunohistochemistry (IHC) for the diagnosis of Hodgkin's lymphoma. | 12-19-2013 |
20140024047 | COATED QUANTUM DOTS AND METHODS OF MAKING AND USING THEREOF - The present disclosure provides embodiments of a new class of hydroxylated quantum dots. The quantum dots have a hydroxylated coat disposed thereon, and which serves to minimize non-specific cellular binding and to maintain the small size of quantum dot probes. Embodiments of the coated quantum dots of the disclosure are just slightly larger than the diameter of uncoated quantum dots, and are bright with high quantum yields. They are also very stable under both basic and acidic conditions. Embodiments of the hydroxylated quantum dots result in significant reductions in non-specific binding relative to that of carboxylated dots, and to protein and PEG-coated dots. Embodiments of the disclosure are advantageous in a range of biological applications where non-specific binding is a major problem, such as in multiplexed biomarker staining in cells and tissues, detection of biomarkers in body fluid samples (blood, urine, etc.), as well as live cell imaging. | 01-23-2014 |
20140081133 | SYSTEM AND METHODS FOR PROVIDING REAL-TIME ANATOMICAL GUIDANCE IN A DIAGNOSTIC OR THERAPEUTIC PROCEDURE - According to one aspect, a system for intraoperatively providing anatomical guidance in a diagnostic or therapeutic procedure is disclosed. In one embodiment, the system includes: a first light source configured to emit a beam of visible light; second light source configured to emit a beam of near-infrared light; a handheld probe optically coupled to the second light source; a second imaging device configured to detect visible light; a third imaging device configured to detect near-infrared light having a first predetermined wavelength; a fourth imaging device configured to detect near-infrared light having a second predetermined wavelength; a display for displaying at least one visual representation of data; and, a controller programmed to generate at least one real-time integrated visual representation of an area of interest and to display the real-time visual representation on the display for guidance during the diagnostic or therapeutic procedure. | 03-20-2014 |
20140329716 | DEVICES HAVING A CALIBRATION CONTROL REGION, SYSTEMS AND METHODS FOR IMMUNOHISTOCHEMICAL ANALYSES - The disclosure relates to devices, systems and methods that address the variability in immunohistochemistry (IHC) tests that can lead to inaccurate diagnosis or misdiagnosis while maintaining important structural information within the specimen. The devices may include a control region having a control unit including a plurality of substantially homogenous samples and a biological sample region. | 11-06-2014 |
Patent application number | Description | Published |
20090247501 | PROTEIN KINASE INHIBITORS - Pyrimidine- and triazine-based chemical compounds that are useful, for example, as protein kinase inhibitors for treating cancer, neurological disorders, autoimmune disorders, and other diseases, and methods of using such compounds | 10-01-2009 |
20090281092 | POLO-LIKE KINASE INHIBITORS - Compounds of the following formula are provided for use with kinases: | 11-12-2009 |
20090291938 | POLO-LIKE KINASE INHIBITORS - Compounds of the following formula are provided for use with kinases: | 11-26-2009 |
20110082111 | POLO-LIKE KINASE INHIBITORS - Compounds of the following formula are provided for use with kinases: | 04-07-2011 |
20110152273 | FUSED HETEROAROMATIC PYRROLIDINONES - Disclosed are compounds of Formula 1, | 06-23-2011 |
20110201818 | POLO-LIKE KINASE INHIBITORS - Compounds of the following formula are provided for use with kinases: | 08-18-2011 |
20130116260 | FUSED HETEROAROMATIC PYRROLIDINONES AS SYK INHIBITORS - Disclosed are compounds of Formula 1, | 05-09-2013 |
20140194469 | HISTONE DEMETHYLASE INHIBITORS - Provided herein are substituted pyrazolylpyridine, pyrazolylpyridazine, and pyrazolylpyrimidine derivative compounds and pharmaceutical compositions comprising said compounds. The subject compounds and compositions are useful for inhibition histone demethylase. Furthermore, the subject compounds and compositions are useful for the treatment of cancer, such as prostate cancer, breast cancer, bladder cancer, lung cancer and/or melanoma and the like. | 07-10-2014 |
20140206680 | SUBSTITUTED 6-AZA-ISOINDOLIN-1-ONE DERIVATIVES - Disclosed are compounds of Formula 1, and pharmaceutically acceptable salts thereof, wherein G, p, R | 07-24-2014 |
20140213591 | HISTONE DEMETHYLASE INHIBITORS - The present invention relates generally to compositions and methods for treating cancer and neoplastic disease. Provided herein are substituted amidopyridine or amidopyridazine derivative compounds and pharmaceutical compositions comprising said compounds. The subject compounds and compositions are useful for inhibition histone demethylase. Furthermore, the subject compounds and compositions are useful for the treatment of cancer, such as prostate cancer, breast cancer, bladder cancer, lung cancer and/or melanoma and the like. | 07-31-2014 |
20140275084 | HISTONE DEMETHYLASE INHIBITORS - The present invention relates generally to compositions and methods for treating cancer and neoplastic diseases. Provided herein are substituted imidazole-pyridine derivative compounds and pharmaceutical compositions comprising said compounds. The subject compounds and compositions are useful for inhibition of histone demethylase enzymes. Furthermore, the subject compounds and compositions are useful for the treatment of cancer, such as prostate cancer, breast cancer, bladder cancer, lung cancer and/or melanoma and the like. | 09-18-2014 |
20150119397 | HISTONE DEMETHYLASE INHIBITORS - The present invention relates generally to compositions and methods for treating cancer and neoplastic disease. Provided herein are substituted amidopyridine or amidopyridazine derivative compounds and pharmaceutical compositions comprising said compounds. The subject compounds and compositions are useful for inhibition histone demethylase. Furthermore, the subject compounds and compositions are useful for the treatment of cancer, such as prostate cancer, breast cancer, bladder cancer, lung cancer and/or melanoma and the like. | 04-30-2015 |
20150274723 | SUBSTITUTED 6-AZA-ISOINDOLIN-1-ONE DERIVATIVES - Disclosed are compounds of Formula 1, | 10-01-2015 |
20150291529 | HISTONE DEMETHYLASE INHIBITORS - The present invention relates generally to compositions and methods for treating cancer and neoplastic disease. Provided herein are substituted amidopyridine or amidopyridazine derivative compounds and pharmaceutical compositions comprising said compounds. The subject compounds and compositions are useful for inhibition histone demethylase. Furthermore, the subject compounds and compositions are useful for the treatment of cancer, such as prostate cancer, breast cancer, bladder cancer, lung cancer and/or melanoma and the like. | 10-15-2015 |
20150336964 | FUSED HETEROAROMATIC PYRROLIDINONES - Disclosed are compounds of Formula 1, | 11-26-2015 |
20160002201 | HISTONE DEMETHYLASE INHIBITORS - Provided herein are substituted pyrazolylpyridine, pyrazolylpyridazine, and pyrazolylpyrimidine derivative compounds and pharmaceutical compositions comprising said compounds. The subject compounds and compositions are useful for inhibition histone demethylase. Furthermore, the subject compounds and compositions are useful for the treatment of cancer, such as prostate cancer, breast cancer, bladder cancer, lung cancer and/or melanoma and the like. | 01-07-2016 |
20160068507 | HISTONE DEMETHYLASE INHIBITORS - Provided herein are substituted pyrazolylpyridine, pyrazolylpyridazine, and pyrazolylpyrimidine derivative compounds and pharmaceutical compositions comprising said compounds. The subject compounds and compositions are useful for inhibition histone demethylase. Furthermore, the subject compounds and compositions are useful for the treatment of cancer, such as prostate cancer, breast cancer, bladder cancer, lung cancer and/or melanoma and the like. | 03-10-2016 |