Patent application number | Description | Published |
20080279242 | PHOTONIC CRYSTAL STRUCTURES AND METHODS OF MAKING AND USING PHOTONIC CRYSTAL STRUCTURES - A light emitting device having a buried photonic bandgap (PBG) structure is created using a relatively simple fabrication method known as epitaxial layer overgrowth (ELOG). By burying the PBG structure, the difficulties and disadvantages associated with the known technique of etching holes into a LED emission surface to form the PBG structure are avoided. | 11-13-2008 |
20090068778 | Buried Heterostructure Device Having Integrated Waveguide Grating Fabricated By Single Step MOCVD - The device is an optoelectronic device or transparent waveguide device that comprises a growth surface, a growth mask, an optical waveguide core mesa and a cladding layer. The growth mask is located on the semiconductor surface and defines an elongate growth window having a periodic grating profile. The optical waveguide core mesa is located in the growth window and has a trapezoidal cross-sectional shape. The cladding layer covers the optical waveguide core mesa and extends over at least part of the growth mask. Such devices are fabricated by providing a wafer comprising a growth surface, growing an optical waveguide core mesa on the growth surface by micro-selective area growth at a first growth temperature and covering the optical waveguide core mesa with cladding material at a second growth temperature, lower than the first growth temperature. | 03-12-2009 |
20090090932 | NITRIDE SEMICONDUCTOR ULTRAVIOLET LEDS WITH TUNNEL JUNCTIONS AND REFLECTIVE CONTACT - A structure and method for improving UV LED efficiency is described. The structure utilizes a tunnel junction to separate a P-doped layer of the LED from a n-doped contact layer. The n-doped contact layer allows the use of a highly reflective, low work function metal, such as aluminum, for the p-side contact. The reflectivity at the contact can be further improved by including a phase matching layer in some areas between the contact metal (The metal above the phase matching layer does not necessarily need to have a low work function because it does need to form an ohmic contact with the n-contact layer) and the n-doped contact layer. | 04-09-2009 |
20090129426 | Semiconductor System Having a Ring Laser Fabricated by Epitaxial Layer Overgrowth - The present invention provides a ring laser system comprising forming an optical core by an epitaxial layer overgrowth over an intermediate layer, forming multi-quantum wells adjacent to the optical core and forming an outer structure further comprising a total internal reflector, wherein forming photons within the multi-quantum wells further comprises circulating the photons within the ring laser structure comprising the outer structure, the multi-quantum wells, and the optical core. | 05-21-2009 |
20100006023 | Method For Preparing Films And Devices Under High Nitrogen Chemical Potential - Nitride semiconductor films, such as for use in solid state light emitting devices and electronic devices, are fabricated in an environment of relatively high nitrogen potential such that nitrogen vacancies in the growing film are reduced. A reactor design, and method for its use, provide high nitrogen precursor partial pressure, precracking of the precursor using a catalytic metal surface, prepyrolyzing the precursor, using catalytically-cracked molecular nitrogen as a nitrogen precursor, and/or exposing the surface to an ambient which is extremely rich in active nitrogen species. Improved efficiency for light emitting devices, particularly in the blue and green wavelengths and improve transport properties in nitride electronic devices, i.e., improved performance from nitride-based devices such as InGaAlN laser diodes, transistors, and light emitting diodes is thereby provided. | 01-14-2010 |
20100063753 | INTEGRATED VAPOR DELIVERY SYSTEMS FOR CHEMICAL VAPOR DEPOSITION PRECURSORS - One disclosed feature of the embodiments is a control processor in a vapor delivery system for chemical vapor deposition precursors. A pressurization rate processor calculates first and second pressurization rate curves at first and second time instants. A volume calculator computes consumed volume based on first and second volumes at the respective first and second time instants. The first and second volumes are computed using slopes of lines fitting the first and second pressurization rate curves. | 03-11-2010 |
20100074292 | Semiconductor Light Emitting Devices With Non-Epitaxial Upper Cladding - The AlGaN upper cladding layer of a nitride laser diode is replaced by a non-epitaxial layer, such as metallic silver. If chosen to have a relatively low refractive index value, the mode loss from absorption in the non-epitaxial cladding layer is acceptably small. If also chosen to have a relatively high work-function, the non-epitaxial layer forms an electrical contact to the nitride semiconductors. An indium-tin-oxide layer may also be employed with the non-epitaxial cladding layer. | 03-25-2010 |
20100127236 | Laser Diode With High Indium Active Layer And Lattice Matched Cladding Layer - A semiconductor laser diode with a high indium content is provided with a lattice matched cladding layer or layers. One or both of the cladding layers may comprise bulk aluminum gallium indium nitride in the ratio of Al | 05-27-2010 |
20100148146 | MONOLITHIC WHITE AND FULL-COLOR LIGHT EMITTING DIODES USING OPTICALLY PUMPED MULTIPLE QUANTUM WELLS - An embodiment is a method and apparatus for a white or full-color light-emitting diode. First single or multiple quantum wells (QWs) at a first wavelength are formed at an active region between a p-type layer and an n-type layer of a light-emitting diode. Multiple passive quantum wells (QWs) are formed within the p-type layer or the n-type layer. The multiple passive QWs are optically pumped by the first or single multiple QWs to generate a desired color. | 06-17-2010 |
20100148147 | MONOLITHIC WHITE AND FULL-COLOR LIGHT EMITTING DIODES USING SELECTIVE AREA GROWTH - An embodiment is a method and apparatus for a white or full-color light-emitting diode. A first mask having a first pattern is applied over surface of an n-type layer. A first active region is grown selectively and including single or multiple quantum wells (QWs) of a first active color to cause a first wavelength shift in a first vicinity area around the first pattern. The first wavelength shift results in an emission of a first desired color according to the first pattern. | 06-17-2010 |
20100148197 | SELECTIVE DECOMPOSITION OF NITRIDE SEMICONDUCTORS TO ENHANCE LED LIGHT EXTRACTION - A method of texturing a surface within or immediately adjacent to a template layer of a LED is described. The method uses a texturing laser directed through a substrate to decompose and pit a semiconductor material at the surface to be textured. By texturing the surface, light trapping within the template layer is reduced. Furthermore, by patterning the arrangement of pits, metal coating each pit can be arranged to spread current through the template layer and thus through the n-doped region of a LED. | 06-17-2010 |
20100151602 | LASER ROUGHENING TO IMPROVE LED EMISSIONS - An improved method of forming a LED with a roughened surface is described. Traditional methods of roughening a LED surface utilizes strong etchants that require sealing or protecting exposed areas of the LED. The described method uses a focused laser to separate the LED from the substrate, and a second laser to roughen the LED surface thereby avoiding the use of strong etchants. A mild etchant may be used on the laser roughened LED surface to remove unwanted metals. | 06-17-2010 |
20110039360 | Selective Decomposition Of Nitride Semiconductors To Enhance LED Light Extraction - A method of texturing a surface within or immediately adjacent to a template layer of a LED is described. The method uses a texturing laser directed through a substrate to decompose and pit a semiconductor material at the surface to be textured. By texturing the surface, light trapping within the template layer is reduced. Furthermore, by patterning the arrangement of pits, metal coating each pit can be arranged to spread current through the template layer and thus through the n-doped region of a LED. | 02-17-2011 |
20110051768 | Semiconductor Light Emitting Devices With Non-Epitaxial Upper Cladding - The AlGaN upper cladding layer of a nitride laser diode is replaced by a non-epitaxial layer, such as metallic silver. If chosen to have a relatively low refractive index value, the mode loss from absorption in the non-epitaxial cladding layer is acceptably small. If also chosen to have a relatively high work-function, the non-epitaxial layer forms an electrical contact to the nitride semiconductors. An indium-tin-oxide layer may also be employed with the non-epitaxial cladding layer. | 03-03-2011 |
20110083601 | HIGH GROWTH RATE DEPOSITION FOR GROUP III/V MATERIALS - Embodiments of the invention generally relate processes for epitaxial growing Group III/V materials at high growth rates, such as about 30 μm/hr or greater, for example, about 40 μm/hr, about 50 μm/hr, about 55 μm/hr, about 60 μm/hr, or greater. The deposited Group III/V materials or films may be utilized in solar, semiconductor, or other electronic device applications. In some embodiments, the Group III/V materials may be formed or grown on a sacrificial layer disposed on or over the support substrate during a vapor deposition process. Subsequently, the Group III/V materials may be removed from the support substrate during an epitaxial lift off (ELO) process. The Group III/V materials are thin films of epitaxially grown layers which contain gallium arsenide, gallium aluminum arsenide, gallium indium arsenide, gallium indium arsenide nitride, gallium aluminum indium phosphide, phosphides thereof, nitrides thereof, derivatives thereof, alloys thereof, or combinations thereof. | 04-14-2011 |
20110268880 | REACTOR CLEAN - A method and apparatus for performing chemical vapor deposition (CVD) processes is provided. In one embodiment, the apparatus comprises a reactor body having a processing region, comprising a wafer carrier track having a wafer carrier disposed thereon, at least one sidewall having an exhaust assembly for exhausting gases from the processing region, a lid assembly disposed on the reactor body, comprising a lid support comprising a first showerhead assembly for supplying reactant gases to the processing region, a first isolator assembly for supplying isolation gases to the processing region, a second showerhead assembly for supplying reactant gases to the processing region, and a second isolator assembly for supplying isolation gases to the processing region, wherein the first showerhead assembly, the first isolator assembly, the second showerhead assembly, and the second isolator assembly are consecutively and linearly disposed next to each other. | 11-03-2011 |
20120118224 | TRANSFER CHAMBER METROLOGY FOR IMPROVED DEVICE YIELD - Apparatus and method for control of epitaxial growth parameters, for example during manufacture of light emitting diodes (LEDs). Embodiments include PL measurement of a group III-V film following growth while a substrate at an elevated temperature is in a transfer chamber of a multi-chamber cluster tool. In other embodiments, a film thickness measurement, a contactless resistivity measurement, and a particle and/or roughness measure is performed while the substrate is disposed in the transfer chamber. One or more of the measurements performed in the transfer chamber are temperature corrected to room temperature by estimating the elevated temperature based on emission from a GaN base layer disposed below the group III-V film. In other embodiments, temperature correction is based on an absorbance band edge of the GaN base layer determined from collected white light reflectance spectra. Temperature corrected metrology is then used to control growth processes. | 05-17-2012 |
20120248577 | Controlled Doping in III-V Materials - A method according to embodiments of the invention includes epitaxially growing a III-nitride semiconductor layer from a gas containing gallium, a gas containing nitrogen, and a gas containing indium. The concentration of indium in the III-nitride semiconductor structure is greater than zero and less than 10 | 10-04-2012 |
20120309172 | Epitaxial Lift-Off and Wafer Reuse - A method of reusing a III-nitride growth substrate according to embodiments of the invention includes epitaxially growing a III-nitride semiconductor structure on a III-nitride substrate. The III-nitride semiconductor structure includes a sacrificial layer and an additional layer grown over the sacrificial layer. The sacrificial layer is implanted with at least one implant species. The III-nitride substrate is separated from the additional layer at the implanted sacrificial layer. In some embodiments the III-nitride substrate is GaN and the sacrificial layer is GaN, an aluminum-containing III-nitride layer, or an indium-containing III-nitride layer. In some embodiments, the III-nitride substrate is separated from the additional layer by etching the implanted sacrificial layer. | 12-06-2012 |
20130015552 | Electrical Isolation Of High Defect Density Regions In A Semiconductor DeviceAANM Kizilyalli; Isik C.AACI San FranciscoAAST CAAACO USAAGP Kizilyalli; Isik C. San Francisco CA USAANM Bour; David P.AACI CupertinoAAST CAAACO USAAGP Bour; David P. Cupertino CA USAANM Brown; Richard J.AACI Los GatosAAST CAAACO USAAGP Brown; Richard J. Los Gatos CA USAANM Edwards; Andrew P.AACI San JoseAAST CAAACO USAAGP Edwards; Andrew P. San Jose CA USAANM Nie; HuiAACI CupertinoAAST CAAACO USAAGP Nie; Hui Cupertino CA USAANM Romano; Linda T.AACI SunnyvaleAAST CAAACO USAAGP Romano; Linda T. Sunnyvale CA US - Embodiments of the invention include a III-nitride semiconductor layer including a first portion having a first defect density and a second portion having a second defect density. The first defect density is greater than the second defect density. An insulating material is disposed over the first portion. The insulating material is not formed on or is removed from the second portion. | 01-17-2013 |
20130032811 | METHOD AND SYSTEM FOR A GAN VERTICAL JFET UTILIZING A REGROWN GATE - A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drift region, a gate region at least partially surrounding the channel region, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction. | 02-07-2013 |
20130032812 | METHOD AND SYSTEM FOR A GAN VERTICAL JFET UTILIZING A REGROWN CHANNEL - A vertical III-nitride field effect transistor includes a drain comprising a first III-nitride material, a drain contact electrically coupled to the drain, and a drift region comprising a second III-nitride material coupled to the drain. The field effect transistor also includes a channel region comprising a third III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, a gate region at least partially surrounding the channel region, having a first surface coupled to the drift region and a second surface on a side of the gate region opposing the first surface, and a gate contact electrically coupled to the gate region. The field effect transistor further includes a source coupled to the channel region and a source contact electrically coupled to the source. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride field effect transistor is along the vertical direction, and the channel region extends along at least a portion of the second surface of the gate region. | 02-07-2013 |
20130032813 | METHOD AND SYSTEM FOR DOPING CONTROL IN GALLIUM NITRIDE BASED DEVICES - A method of growing a III-nitride-based epitaxial structure includes providing a substrate in an epitaxial growth reactor and heating the substrate to a predetermined temperature. The method also includes flowing a gallium-containing gas into the epitaxial growth reactor and flowing a nitrogen-containing gas into the epitaxial growth reactor. The method further includes flowing a gettering gas into the epitaxial growth reactor. The predetermined temperature is greater than 1000° C. | 02-07-2013 |
20130032814 | METHOD AND SYSTEM FOR FORMATION OF P-N JUNCTIONS IN GALLIUM NITRIDE BASED ELECTRONICS - A semiconductor device includes a III-nitride substrate having a first conductivity type and a first electrode electrically coupled to the III-nitride substrate. The semiconductor device also includes a III-nitride material having a second conductivity type coupled to the III-nitride substrate at a regrowth interface and a p-n junction disposed between the III-nitride substrate and the regrowth interface. | 02-07-2013 |
20130056743 | METHOD AND SYSTEM FOR LOCAL CONTROL OF DEFECT DENSITY IN GALLIUM NITRIDE BASED ELECTRONICS - A diode includes a substrate characterized by a first dislocation density and a first conductivity type, a first contact coupled to the substrate, and a masking layer having a predetermined thickness and coupled to the semiconductor substrate. The masking layer comprises a plurality of continuous sections and a plurality of openings exposing the substrate and disposed between the continuous sections. The diode also includes an epitaxial layer greater than 5 μm thick coupled to the substrate and the masking layer. The epitaxial layer comprises a first set of regions overlying the plurality of openings and characterized by a second dislocation density and a second set of regions overlying the set of continuous sections and characterized by a third dislocation density less than the first dislocation density and the second dislocation density. The diode further includes a second contact coupled to the epitaxial layer. | 03-07-2013 |
20130075748 | METHOD AND SYSTEM FOR DIFFUSION AND IMPLANTATION IN GALLIUM NITRIDE BASED DEVICES - A method of forming a doped region in a III-nitride substrate includes providing the III-nitride substrate and forming a masking layer having a predetermined pattern and coupled to a portion of the III-nitride substrate. The III-nitride substrate is characterized by a first conductivity type and the predetermined pattern defines exposed regions of the III-nitride substrate. The method also includes heating the III-nitride substrate to a predetermined temperature and placing a dual-precursor gas adjacent the exposed regions of the III-nitride substrate. The dual-precursor gas includes a nitrogen source and a dopant source. The method further includes maintaining the predetermined temperature for a predetermined time period, forming p-type III-nitride regions adjacent the exposed regions of the III-nitride substrate, and removing the masking layer. | 03-28-2013 |
20130087803 | MONOLITHICALLY INTEGRATED HEMT AND SCHOTTKY DIODE - An integrated device including a III-nitride HEMT and a Schottky diode includes a substrate comprising a first III-nitride material and a drift region comprising a second III-nitride material coupled to the substrate and disposed adjacent to the substrate along a vertical direction. The integrated device also includes a first barrier layer coupled to the drift region and a channel layer comprising a third III-nitride material having a first bandgap and coupled to the barrier layer. The integrated device further includes a second barrier layer characterized by a second bandgap and coupled to the channel layer and a Schottky contact coupled to the drift region. The second bandgap is greater than the first bandgap. | 04-11-2013 |
20130087835 | METHOD AND SYSTEM FOR FLOATING GUARD RINGS IN GAN MATERIALS - A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure further includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, a first metallic structure electrically coupled to the second surface of the III-nitride substrate, and a III-nitride epitaxial structure of a second conductivity type coupled to the III-nitride epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure. | 04-11-2013 |
20130087878 | METHOD OF FABRICATING A GAN MERGED P-I-N SCHOTTKY (MPS) DIODE - A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region. | 04-11-2013 |
20130087879 | SCHOTTKY DIODE WITH BURIED LAYER IN GAN MATERIALS - A semiconductor structure includes a III-nitride substrate characterized by a first conductivity type and having a first side and a second side opposing the first side, a III-nitride epitaxial layer of the first conductivity type coupled to the first side of the III-nitride substrate, and a plurality of III-nitride epitaxial structures of a second conductivity type coupled to the III-nitride epitaxial layer. The semiconductor structure further includes a III-nitride epitaxial formation of the first conductivity type coupled to the plurality of III-nitride epitaxial structures, and a metallic structure forming a Schottky contact with the III-nitride epitaxial formation and coupled to at least one of the plurality of III-nitride epitaxial structures. | 04-11-2013 |
20130112985 | MONOLITHICALLY INTEGRATED VERTICAL JFET AND SCHOTTKY DIODE - An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction. | 05-09-2013 |
20130126884 | ALUMINUM GALLIUM NITRIDE ETCH STOP LAYER FOR GALLIUM NITRIDE BASES DEVICES - A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, and a first metallic structure electrically coupled to the second surface of the III-nitride substrate. The semiconductor structure further includes an AlGaN epitaxial layer coupled to the III-nitride epitaxial layer of the first conductivity type, and a III-nitride epitaxial structure of a second conductivity type coupled to the AlGaN epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure. | 05-23-2013 |
20130126885 | METHOD AND SYSTEM FOR FABRICATING FLOATING GUARD RINGS IN GAN MATERIALS - A method for fabricating an edge termination structure includes providing a substrate having a first surface and a second surface and a first conductivity type, forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate, and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The method also includes implanting ions into a first region of the second GaN epitaxial layer to electrically isolate a second region of the second GaN epitaxial layer from a third region of the second GaN epitaxial layer. The method further includes forming an active device coupled to the second region of the second GaN epitaxial layer and forming the edge termination structure coupled to the third region of the second GaN epitaxial layer. | 05-23-2013 |
20130126886 | GAN-BASED SCHOTTKY BARRIER DIODE WITH ALGAN SURFACE LAYER - A method of fabricating a Schottky diode using gallium nitride (GaN) materials includes providing an n-type GaN substrate having a first surface and a second surface. The second surface opposes the first surface. The method also includes forming an ohmic metal contact electrically coupled to the first surface of the n-type GaN substrate and forming an n-type GaN epitaxial layer coupled to the second surface of the n-type GaN substrate. The method further includes forming an n-type aluminum gallium nitride (AlGaN) surface layer coupled to the n-type GaN epitaxial layer and forming a Schottky contact electrically coupled to the n-type AlGaN surface layer. | 05-23-2013 |
20130127006 | GAN-BASED SCHOTTKY BARRIER DIODE WITH FIELD PLATE - A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer. | 05-23-2013 |
20130137225 | METHOD AND SYSTEM FOR CARBON DOPING CONTROL IN GALLIUM NITRIDE BASED DEVICES - A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer. | 05-30-2013 |
20130143392 | IN-SITU SIN GROWTH TO ENABLE SCHOTTKY CONTACT FOR GAN DEVICES - A method of fabricating a diode in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface and forming a n-type GaN drift layer coupled to the first surface of the n-type GaN substrate. The method also includes forming an in-situ Si | 06-06-2013 |
20130161635 | METHOD AND SYSTEM FOR A GAN SELF-ALIGNED VERTICAL MESFET - A semiconductor structure includes a III-nitride substrate and a drift region coupled to the III-nitride substrate along a growth direction. The semiconductor substrate also includes a channel region coupled to the drift region. The channel region is defined by a channel sidewall disposed substantially along the growth direction. The semiconductor substrate further includes a gate region disposed laterally with respect to the channel region. | 06-27-2013 |
20130164893 | FABRICATION OF FLOATING GUARD RINGS USING SELECTIVE REGROWTH - A method for fabricating edge termination structures in gallium nitride (GaN) materials includes providing a n-type GaN substrate having a first surface and a second surface, forming an n-type GaN epitaxial layer coupled to the first surface of the n-type GaN substrate, and forming a growth mask coupled to the n-type GaN epitaxial layer. The method further includes patterning the growth mask to expose at least a portion of the n-type GaN epitaxial layer, and forming at least one p-type GaN epitaxial structure coupled to the at least a portion of the n-type GaN epitaxial layer. The at least one p-type GaN epitaxial structure comprises at least one portion of an edge termination structure. The method additionally includes forming a first metal structure electrically coupled to the second surface of the n-type GaN substrate. | 06-27-2013 |
20130292686 | METHOD AND SYSTEM FOR PLANAR REGROWTH IN GAN ELECTRONIC DEVICES - A vertical JFET includes a III-nitride substrate and a III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The first III-nitride epitaxial layer has a first dopant concentration. The vertical JFET also includes a III-nitride epitaxial structure coupled to the first III-nitride epitaxial layer. The III-nitride epitaxial structure includes a set of channels of the first conductivity type and having a second dopant concentration, a set of sources of the first conductivity type, having a third dopant concentration greater than the first dopant concentration, and each characterized by a contact surface, and a set of regrown gates interspersed between the set of channels. An upper surface of the set of regrown gates is substantially coplanar with the contact surfaces of the set of sources. | 11-07-2013 |
20140045306 | METHOD AND SYSTEM FOR IN-SITU AND REGROWTH IN GALLIUM NITRIDE BASED DEVICES - A method of regrowing material includes providing a III-nitride structure including a masking layer and patterning the masking layer to form an etch mask. The method also includes removing, using an in-situ etch, a portion of the III-nitride structure to expose a regrowth region and regrowing a III-nitride material in the regrowth region. | 02-13-2014 |
20140048902 | METHOD OF FABRICATING A GALLIUM NITRIDE MERGED P-I-N SCHOTTKY (MPS) DIODE BY REGROWTH AND ETCH BACK - An MPS diode includes a III-nitride substrate characterized by a first conductivity type and a first dopant concentration and having a first side and a second side. The MPS diode also includes a III-nitride epitaxial structure comprising a first III-nitride epitaxial layer coupled to the first side of the substrate, wherein a region of the first III-nitride epitaxial layer comprises an array of protrusions. The III-nitride epitaxial structure also includes a plurality of III-nitride regions of a second conductivity type, each partially disposed between adjacent protrusions. Each of the plurality of III-nitride regions of the second conductivity type comprises a first section laterally positioned between adjacent protrusions and a second section extending in a direction normal to the first side of the substrate. The MPS diode further includes a first metallic structure electrically coupled to one or more of the protrusions and to one or more of the second sections. | 02-20-2014 |
20140051236 | GAN-BASED SCHOTTKY BARRIER DIODE WITH FIELD PLATE - A method for fabricating a III-nitride semiconductor device includes providing a III-nitride substrate having a first surface and a second surface opposing the first surface, forming a III-nitride epitaxial layer coupled to the first surface of the III-nitride substrate, and removing at least a portion of the III-nitride epitaxial layer to form a first exposed surface. The method further includes forming a dielectric layer coupled to the first exposed surface, removing at least a portion of the dielectric layer, and forming a metallic layer coupled to a remaining portion of the dielectric layer such that the remaining portion of the dielectric layer is disposed between the III-nitride epitaxial layer and the metallic layer. | 02-20-2014 |
20140116328 | METHOD AND SYSTEM FOR CARBON DOPING CONTROL IN GALLIUM NITRIDE BASED DEVICES - A method of growing an n-type III-nitride-based epitaxial layer includes providing a substrate in an epitaxial growth reactor, forming a masking material coupled to a portion of a surface of the substrate, and flowing a first gas into the epitaxial growth reactor. The first gas includes a group III element and carbon. The method further comprises flowing a second gas into the epitaxial growth reactor. The second gas includes a group V element, and a molar ratio of the group V element to the group III element is at least 5,000. The method also includes growing the n-type III-nitride-based epitaxial layer. | 05-01-2014 |
20140145201 | METHOD AND SYSTEM FOR GALLIUM NITRIDE VERTICAL JFET WITH SEPARATED GATE AND SOURCE - A semiconductor structure includes a III-nitride substrate and a first III-nitride epitaxial layer of a first conductivity type coupled to the III-nitride substrate. The semiconductor structure also includes a first III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial layer and a second III-nitride epitaxial structure of the first conductivity type coupled to the first III-nitride epitaxial structure. The semiconductor structure further includes a second III-nitride epitaxial layer coupled to the first III-nitride epitaxial structure. The second III-nitride epitaxial layer is of a second conductivity type and is not electrically connected to the second III-nitride epitaxial structure. | 05-29-2014 |
20140159051 | MONOLITHICALLY INTEGRATED VERTICAL JFET AND SCHOTTKY DIODE - An integrated device including a vertical III-nitride FET and a Schottky diode includes a drain comprising a first III-nitride material, a drift region comprising a second III-nitride material coupled to the drain and disposed adjacent to the drain along a vertical direction, and a channel region comprising a third III-nitride material coupled to the drift region. The integrated device also includes a gate region at least partially surrounding the channel region, a source coupled to the channel region, and a Schottky contact coupled to the drift region. The channel region is disposed between the drain and the source along the vertical direction such that current flow during operation of the vertical III-nitride FET and the Schottky diode is along the vertical direction. | 06-12-2014 |
20140162416 | ALUMINUM GALLIUM NITRIDE ETCH STOP LAYER FOR GALLIUM NITRIDE BASED DEVICES - A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial layer of the first conductivity type coupled to the first surface of the III-nitride substrate, and a first metallic structure electrically coupled to the second surface of the III-nitride substrate. The semiconductor structure further includes an AlGaN epitaxial layer coupled to the III-nitride epitaxial layer of the first conductivity type, and a III-nitride epitaxial structure of a second conductivity type coupled to the AlGaN epitaxial layer. The III-nitride epitaxial structure comprises at least one edge termination structure. | 06-12-2014 |
20140191242 | METHOD AND SYSTEM FOR A GALLIUM NITRIDE VERTICAL TRANSISTOR - A vertical JFET includes a GaN substrate comprising a drain of the JFET and a plurality of patterned epitaxial layers coupled to the GaN substrate. A distal epitaxial layer comprises a first part of a source channel and adjacent patterned epitaxial layers are separated by a gap having a predetermined distance. The vertical JFET also includes a plurality of regrown epitaxial layers coupled to the distal epitaxial layer and disposed in at least a portion of the gap. A proximal regrown epitaxial layer comprises a second part of the source channel. The vertical JFET further includes a source contact passing through portions of a distal regrown epitaxial layer and in electrical contact with the source channel, a gate contact in electrical contact with a distal regrown epitaxial layer, and a drain contact in electrical contact with the GaN substrate. | 07-10-2014 |
20140235030 | METHOD AND SYSTEM FOR FABRICATING FLOATING GUARD RINGS IN GAN MATERIALS - A method for fabricating an edge termination structure includes providing a substrate having a first surface and a second surface and a first conductivity type, forming a first GaN epitaxial layer of the first conductivity type coupled to the first surface of the substrate, and forming a second GaN epitaxial layer of a second conductivity type opposite to the first conductivity type. The second GaN epitaxial layer is coupled to the first GaN epitaxial layer. The method also includes implanting ions into a first region of the second GaN epitaxial layer to electrically isolate a second region of the second GaN epitaxial layer from a third region of the second GaN epitaxial layer. The method further includes forming an active device coupled to the second region of the second GaN epitaxial layer and forming the edge termination structure coupled to the third region of the second GaN epitaxial layer. | 08-21-2014 |
20140287570 | METHOD OF FABRICATING A GALLIUM NITRIDE MERGED P-I-N SCHOTTKY (MPS) DIODE - A semiconductor structure includes a III-nitride substrate with a first side and a second side opposing the first side. The III-nitride substrate is characterized by a first conductivity type and a first dopant concentration. The semiconductor structure also includes a III-nitride epitaxial structure including a first III-nitride epitaxial layer coupled to the first side of the III-nitride substrate and a plurality of III-nitride regions of a second conductivity type. The plurality of III-nitride regions have at least one III-nitride epitaxial region of the first conductivity type between each of the plurality of III-nitride regions. The semiconductor structure further includes a first metallic structure electrically coupled to one or more of the plurality of III-nitride regions and the at least one III-nitride epitaxial region. A Schottky contact is created between the first metallic structure and the at least one III-nitride epitaxial region. | 09-25-2014 |
20140374769 | GAN-BASED SCHOTTKY BARRIER DIODE WITH ALGAN SURFACE LAYER - A Schottky diode and method of fabricating the Schottky diode using gallium nitride (GaN) materials is disclosed. The method includes providing an n-type GaN substrate having first and second opposing surfaces. The method also includes forming an ohmic metal contact electrically coupled to the first surface, forming an n-type GaN epitaxial layer coupled to the second surface, and forming an n-type aluminum gallium nitride (AlGaN) surface layer coupled to the n-type GaN epitaxial layer. The AlGaN surface layer has a thickness which is less than a critical thickness, and the critical thickness is determined based on an aluminum mole fraction of the AlGaN surface layer. The method also includes forming a Schottky contact electrically coupled to the n-type AlGaN surface layer, where, during operation, an interface between the n-type GaN epitaxial layer and the n-type AlGaN surface layer is substantially free from a two-dimensional electron gas. | 12-25-2014 |
20150017792 | METHOD AND SYSTEM FOR DIFFUSION AND IMPLANTATION IN GALLIUM NITRIDE BASED DEVICES - A method of forming a doped region in a III-nitride substrate includes providing the III-nitride substrate and forming a masking layer having a predetermined pattern and coupled to a portion of the III-nitride substrate. The III-nitride substrate is characterized by a first conductivity type and the predetermined pattern defines exposed regions of the III-nitride substrate. The method also includes heating the III-nitride substrate to a predetermined temperature and placing a dual-precursor gas adjacent the exposed regions of the III-nitride substrate. The dual-precursor gas includes a nitrogen source and a dopant source. The method further includes maintaining the predetermined temperature for a predetermined time period, forming p-type III-nitride regions adjacent the exposed regions of the III-nitride substrate, and removing the masking layer. | 01-15-2015 |