Cheng-Hung
Cheng-Hung Chen, Kaohsiung City TW
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20150041544 | Bar Code Reading System - A bar code reading system comprises a handheld electronic device and a bar code reader. The handheld electronic device comprises an operation processing unit and a memory unit, and the bar code reader attached to the handheld electronic device comprises a housing, an output end and a bar code acquisition unit. The bar code acquisition unit is disposed in the housing, and the bar code acquisition unit is used to read a bar code, and convert the bar code to a digital signal; the bar code reader transmits the digital signal to a handheld electronic device through the output end. Wherein, the operation processing unit is used to process the digital signal, and store the digital signal in the memory unit. | 02-12-2015 |
Cheng-Hung Chen, New Taipei City TW
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20150268696 | DOCKING STATION - A docking station for installing a portable electronic device is provided. The portable electronic device includes a display surface and at least one slot located at one side of the display surface. The docking station includes a supporting structure, at least one hook, and at least one first magnetic element. The supporting structure includes a body and a shell. The shell covers the body. The hook is disposed on the body and extrudes out of the supporting surface of the shell. The first magnetic element is disposed on the body and located in the shell. The hook is adapted to inlay in the slot and the first magnetic element is adapted to attract the portable electronic device, such that the portable electronic device is fixed on the supporting structure. | 09-24-2015 |
Cheng-Hung Chen, Hsinchu City TW
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20140312379 | LIGHT-EMITTING DIODE WITH SIDE-WALL BUMP STRUCTURE AND MOUNTING STRUCTURE HAVING THE SAME - A light-emitting diode (LED) with a bump structure on a sidewall is provided. The LED comprises a substrate, an epitaxial structure, a first conductive bump, a second conductive bump, a first extended electrode and a second extended electrode. The substrate has a top surface, a first side surface and an inclined surface between the top surface and the first side surface. The epitaxial structure is disposed on the top surface of the substrate, and comprises a N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, a transparent conductive layer, a P-electrode and a N-electrode. The first extended electrode and the second extended electrode connect the P-electrode and the N-electrode, extend through the inclined surface, and are electrically connected to the first and the second conductive bumps, respectively. A mounting structure comprises said LED, a sub-mount and a connector mounting the LED onto the sub-mount. | 10-23-2014 |
20150028379 | LIGHT EMITTING DIODE AND MANUFACTURING METHOD THEREOF - A light emitting diode includes a semiconductor epitaxial stack structure, a first transparent conductive layer and at least one second transparent conductive layer. The semiconductor epitaxial stack structure includes a first semiconductor layer, an active layer and a second semiconductor layer. The active layer is disposed on a portion of the second semiconductor layer. The first semiconductor layer is disposed on the active layer. The first transparent conductive layer is disposed on the first semiconductor layer, and includes plural first crystalline particles, wherein the average size thereof is d1. The second transparent conductive layer is disposed on the first transparent conductive layer, and includes plural second crystalline particles, wherein the average size thereof is d2, and d1 is greater than d2. | 01-29-2015 |
Cheng-Hung Chen, Hsin-Chu TW
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20100085292 | LIQUID CRYSTAL DISPLAY HAVING DUAL DATA SIGNAL GENERATION MECHANISM - A liquid crystal display having dual data signal generation mechanism is disclosed for simplifying the display structure and retaining high display quality. The liquid crystal display includes a dual data signal generator, a preliminary data line, a first data line, a second data line, and a pixel unit. The dual data signal generator functions to convert a preliminary data signal, received from the preliminary data line, into a first data signal and a second data signal. The first and second data signals are furnished to the first and second data lines respectively. The pixel unit includes a first sub-pixel unit and a second sub-pixel unit. The first sub-pixel unit is coupled to the first data line for receiving the first data signal. The second sub-pixel unit is coupled to the second data line for receiving the second data signal. | 04-08-2010 |
20110157243 | DISPLAY APPARATUS AND METHOD FOR DRIVING DISPLAY PANEL THEREOF - A display apparatus and a method for driving a display panel thereof are provided. The display apparatus comprises a display panel and a gate driver. The display panel comprises two gate lines, two source lines, a pixel and two transistors. The pixel is electrically coupled to the two gate lines and the two source lines through the two transistors respectively. The gate driver is for providing a first pulse to one of the gate lines according to a predetermined frequency and providing a second pulse to another one according to the predetermined frequency. An enabling period of the second pulse is behind an enabling period of the first pulse, and a predetermined time interval is existed between a rising edge of the second pulse and a rising edge of the first pulse. The predetermined time interval is longer than a time length of the enabling period of the first pulse. | 06-30-2011 |
Cheng-Hung Chen, Hsinchu County TW
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20120313654 | Voltage Detection Method and Voltage Detector Circuit - A voltage detection method for detecting a voltage source includes generating a first voltage with a first negative temperature coefficient, wherein the first voltage is related to the voltage source, generating a second voltage with a second negative temperature coefficient, wherein the second voltage is related to the voltage source, and through a comparator to connect the first voltage and the second voltage, for generating a detection result voltage without temperature coefficient according to a voltage difference between the first voltage and the second voltage, and the relationship that the first negative temperature coefficient is equivalent to the second negative temperature coefficient, to perform the voltage detection. | 12-13-2012 |
20130241631 | OUTPUT STAGE CIRCUIT - An output stage circuit includes: a first transistor, including a first terminal coupled to a first node, a second terminal coupled to an output terminal, a third terminal coupled to an input terminal for receiving an input voltage, and a fourth terminal coupled to a first power terminal for receiving a first voltage; a second transistor, including a first terminal coupled to a second node, a second terminal coupled to the output terminal, a third terminal coupled to the input terminal for receiving the input voltage, and a fourth terminal coupled to ground; and a current source, coupled to the output terminal for providing a constant current. | 09-19-2013 |
20140004725 | CHIP PACKAGE | 01-02-2014 |
20140015587 | LEVEL SHIFTING CIRCUIT WITH DYNAMIC CONTROL - A level shifting circuit with dynamic control includes a dynamic controller and a level shifter. The dynamic controller outputs a dynamic voltage and an output data signal. The level shifter under control by the dynamic controller includes an input signal receiver, an output signal generator, and a bias current controller, which are coupled in series between a ground voltage and a high level voltage. The input signal receiver receives the output data signal of the dynamic controller and the output signal generator produces a level-shifted data signal according to the input data signal. The bias current controller controlled by the dynamic voltage is at a first current-output capability when the level-shifted data signal is at a stable stage and at a second current-output capability when the level-shifted data signal is at an unstable stage. The first current-output capability is greater than the second current-output capability. | 01-16-2014 |
20140375620 | DISPLAY APPARATUS AND SOURCE DRIVER THEREOF - A display apparatus and a source driver thereof are disclosed. The source driver includes a temperature sensor and a power switch. The temperature sensor is configured to measure a first working temperature of the source driver, and generate an over-temperature protection enable signal by comparing the first working temperature with a preset temperature. The power switch is coupled to a power transmission path for a core circuit of the source driver to receive an operating power, and configured to turn on or cut off the power transmission path according to the over-temperature protection enable signal. | 12-25-2014 |
20150262943 | CHIP PACKAGE - A chip package structure includes a package body. The package body includes a core circuit and an electrostatic discharge protection circuit. A first connection terminal electrically is connected to the core circuit. A second connection terminal electrically is connected to the electrostatic discharge protection circuit. A first interconnection structure electrically connected to the electrostatic discharge protection circuit, the second connection terminal and a third connection terminal. A first lead electrically connects the second connection terminal and an external circuit. A second lead electrically connects the first connection terminal and the third connection terminal. The second lead and the first lead are substantially separate. | 09-17-2015 |
20150294056 | Method of Fabricating an Integrated Circuit with Optimized Pattern Density Uniformity - The present disclosure provides an IC method that includes receiving an IC design layout having main features; generating a plurality of space block layers to the IC design layout, each of the space block layers being associated with an isolation distance and a plurality of space blocks; calculating main pattern density PD | 10-15-2015 |
20150294057 | Method of Fabricating an Integrated Circuit with Block Dummy for Optimized Pattern Density Uniformity - The present disclosure provides one embodiment of an IC method that includes receiving an IC design layout including a plurality of main features; choosing isolation distances to the IC design layout; oversizing the main features according to each of the isolation distances; generating a space block layer for the each of the isolation distances by a Boolean operation according to oversized main features; choosing an optimized space block layer and an optimized block dummy density ratio of the IC design layout according to pattern density variation; generating dummy features in the optimized space block layer according to the optimized block dummy density ratio; and forming a tape-out data of the IC design layout including the main features and the dummy features, for IC fabrication. | 10-15-2015 |
20150370942 | Method of Fabricating an Integrated Circuit with Non-Printable Dummy Features - The present disclosure provides one embodiment of an IC method that includes receiving an IC design layout, which has a plurality of main features and a plurality of space blocks. The IC method also includes calculating an optimized block dummy density ratio r | 12-24-2015 |
20150371821 | Method of Fabricating an Integrated Circuit with a Pattern Density-Outlier-Treatment for Optimized Pattern Density Uniformity - The present disclosure provides one embodiment of an IC method. First pattern densities (PDs) of a plurality of templates of an IC design layout are received. Then a high PD outlier template and a low PD outlier template from the plurality of templates are identified. The high PD outlier template is split into multiple subsets of template and each subset of template carries a portion of PD of the high PD outlier template. A PD uniformity (PDU) optimization is performed to the low PD outlier template and multiple individual exposure processes are applied by using respective subset of templates. | 12-24-2015 |
Cheng-Hung Chen, Shenzhen City CN
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20130162509 | Thin-Film Transistor Liquid Crystal Display Device, Substrate,and Manufacturing Method - The present invention discloses a thin-film transistor liquid crystal display device, a substrate, and a manufacturing method. The thin-film transistor liquid crystal display device includes: a substrate and a signal line, a scan line, a pixel electrode, and a thin-film transistor that are formed on the substrate. The signal line and the scan line are arranged to intersect each other. The pixel electrode is located in a pixel display zone enclosed by the intersected signal line and scan line. The thin-film transistor includes a gate terminal, a source terminal, and a drain terminal. The gate terminal is electrically connected to the scan line. The drain terminal is electrically connected to the signal line. The source terminal is arranged at a position corresponding to the intersection of the signal line and the scan line and is electrically connected to the pixel electrode. With the above arrangement, the present invention can significantly reduce the amount of area of the pixel electrode occupied, increases the opening ratio of the pixel, and greatly reduces the influence on the alignment of the liquid crystal molecules thereby reducing asymmetry of the pixel quadrant and improving image quality. | 06-27-2013 |
20130215348 | Thin Film Transistor Liquid Crystal Display Device, Substrate,and Manufacturing Method Thereof - The present invention discloses a thin-film transistor (TFT) liquid crystal display device, a substrate, and a manufacturing method thereof. The TFT substrate includes: a glass substrate and signal lines, scan lines, a first pixel electrode, a second pixel electrode, a common electrode, and the TFT. The first pixel electrode and the second pixel electrode at least partially overlap each other. The second pixel electrode forms a plurality of horizontally arranged slits and the first pixel electrode forms a hollow structure in a portion overlapping the second pixel electrode. Through the above method, the present invention increases transmittance, improve view angle color shift, and improve the quality of image. | 08-22-2013 |
20140078033 | Driver Circuit for Reducing IC Malfunction and Liquid Crystal Display Panel Comprising Same - A driver circuit and a liquid crystal display panel for reducing IC malfunction are provided. The driver circuit includes a source driver IC, a gate driver IC, and a wire on array, wherein the source driver IC and the gate driver IC connects through the wire on array. The source driver IC provides a signal to the gate driver IC through the wire on array. The driver circuit further includes a negative feedback module electrically connected with the wire on array to be configured to keep the wire on array voltage constant. This invention also provides a liquid crystal display panel using the driver circuit. Through the above method of this invention the driver circuit and a liquid crystal display panel for reducing IC malfunction can avoid the gate driver IC to generate the malfunction caused by the voltage fluctuation of the array and improve the display quality of the liquid crystal display panel. | 03-20-2014 |
20140078186 | Array Substrate and Liquid Crystal Display - An array substrate includes a plurality of data lines arranged along a row direction to input data signal, a plurality of scanning lines arranged along a column direction to input scanning signals, and a plurality of pixels. Each of the pixels includes a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel horizontally arranged along the data lines in turn. And each of the sub-pixels respectively connects to one data lines and one scanning lines. When entering a 3D display mode, the data lines cooperatively operates with the scanning lines so that one of the sub-pixels displays a black image to form an equivalent black matrix. A liquid crystal device including the array substrate is also disclosed. The above array substrate and the liquid crystal device may satisfy the view angle requirement and reduce the crosstalk between two eyes. | 03-20-2014 |
20140087290 | Manufacturing Method of Transparent Electrode and Mask Thereof - The present invention provides a manufacturing method of transparent electrode and mask thereof. The method includes: forming a film on a glass substrate, and coating photo-resist on film; irradiating photo-resist through mask, wherein the mask at corresponding active area of liquid crystal panel forming, from outer area to inner area, at least a first area and a second area, gap of pattern corresponding to transparent electrode in first area being first gap, gap of pattern in second area being second gap, first gap being greater than corresponding default gap, difference between first gap and corresponding default gap being greater than difference between second gap and corresponding default gap: and performing photolithography and etching processes on substrate after exposure to form transparent electrodes on substrate. As such, the present invention can reduce gap errors of formed transparent electrodes in entire active area to improve display effect. | 03-27-2014 |
20140098327 | STRUCTURE OF POLARIZER AND LIQUID CRYSTAL PANEL - The present invention provides a structure of polarizer and liquid crystal panel. The polarizer includes, from top down, polarizer main body, electrostatic adsorption film and release film. The LC panel includes a polarizer of the structure. Because the polarizer replaces the PSA of the known polarizer with the electrostatic adsorption film, the electrostatic adsorption film uses electrostatic adsorption to attach the polarizer main body to the substrate of the LC panel without using any adhesive. Therefore, when reprocessing is required, no residual adhesive on substrate is left to removal and the cleaning is convenient. Also, electrostatic adsorption film will not damage the polarizer when removed from the substrate so that the polarizer can be reused to effectively save the cost. | 04-10-2014 |
20140111556 | Array Substrate and Liquid Crystal Device with the Same - An array substrate is disclosed. Data lines directly pass through the area where a secondary pixel electrode is located to input, data signals to the secondary pixel electrode. First scanning lines, second scanning lines and switches are arranged between the adjacent pixels in an up-down direction. The area between the pixels is a dark area corresponding to an opaque area. Under a 3D display mode, a difference of the default voltages exists between a main pixel electrode and a secondary pixel electrode. In addition, a liquid crystal display is provided. By adopting the above design, the crosstalk and the color shift under the 3D display mode may be reduced. In addition, the reliability of the liquid crystal panel may be enhanced,. | 04-24-2014 |
20140247407 | Patterned Retarder 3D Liquid Crystal Display and the Manufacturing Method Thereof - A patterned retarder 3D liquid crystal display is disclosed. The liquid crystal display includes a display panel, a polarizer, and a patterned retarder film. The display panel includes a first substrate and a second substrate spaced apart from each other. The second substrate includes an up stutter and a down surface, and the up surface is farther to the first substrate than the down surface. A black matrix is arranged on the down surface of the second substrate. A mask is arranged on a first surface or the second surface of the polarizer. The first surface of the polarizer is adjacent to the patterned retarder film and the second surface of the polarizer is adjacent to the second substrate. The mask. corresponds to portions of the black matrix. In addition, a manufacturing method of the patterned retarder 3D liquid crystal display is also disclosed. | 09-04-2014 |
20150069398 | TFT Switch and Method for Manufacturing the Same - The present invention proposes a TFT switch and a method for manufacturing the same. The TFT switch includes a gate, a drain, a source, a semiconductor layer and a fourth electrode. The drain is connected to a first signal, the gate is connected to a control signal to control the switch on or off. The source outputs the first signal when the switch turns on. The fourth electrode and the gate are respectively located at two sides of the semiconductor layer. The fourth electrode is conductive and is selectively coupled to different voltage levels, thereby reducing leakage current in a channel to improve switch characteristic when the switch turns off. | 03-12-2015 |
20150069510 | THIN FILM TRANSISTOR, ARRAY SUBSTRATE, AND DISPLAY PANEL - A TFT, an array substrate, and a display panel are disclosed. The TFTs includes a gate, a first insulation layer arranged above the (late, a second insulation layer arranged above the first insulation layer, a semiconductor layer, a source, and a drain arranged between the first insulation layer and the second insulation layer, and a conductive layer arranged above the second insulation layer. The conductive layer and the gate are electrically coupled to each other such that when the TFT is in a turn-on state. A turn-on current generated in conductive channels of the semiconductor layer is increased. When the TFT is in a turn-off state, a turn-off current generated in the conductive channels is decreased. In this way, the ratio of the turn-on current to the turn-off current is increased. | 03-12-2015 |
20150085090 | THREE-DIMENSIONAL DISPLAY DEVICE AND THREE-DIMENSIONAL DISPLAY METHOD THEREOF - The present invention provides a 3D display device and 3D display method thereof. The method includes the steps of: providing a first signal to the display panel sequentially for providing left-eye image and right-eye image sequentially, and providing a second signal at the time of switching the left-eye image and the right-eye image for inserting a black image, wherein the different 3D display quality being obtained through adjusting the insertion time of the black image. The present invention can adjust the insertion time of the black image to meet demands of higher 3D display luminance or lower 3D cross-talk for various 3D display qualities to improve viewing experience. | 03-26-2015 |
20150109282 | Liquid Crystal Display, Pixel Structure and Driving Method - The present invention provides a liquid crystal display device, a pixel structure and a driving method. The first scanning line of the first scanning line transmits a scanning signal of the first switching unit, charging the pixel electrode, after the charge, when the pixel electrode is in the state of holding power, the second scanning line transmits the second scanning signal to turn on the second switching unit, the common electrode line provides the common voltage to the pixel electrode, in order to rise the pixel electrode voltage to the common voltage. Through the above ways, on one hand the present invention can ensure the charging time of the pixel electrode and the resolution of the liquid crystal display device, on the other hand inserting the black image, achieving the inserting black image technique, reducing the 3D cross talk. | 04-23-2015 |
20150145759 | ARRAY SUBSTRATE AND LIQUID CRYSTAL DISPLAY PANEL - The present invention discloses an array substrate and a liquid crystal display panel. In the array substrate, each pixel unit has a first pixel area, a second pixel area, and a third pixel area. The voltage applied at the first pixel area is Va. The voltage applied at the second pixel area is Vb, and the voltage applied at the third pixel area is Vc, and the relationship among the voltages is Va>Vb>Vc. Ranges of area ratios of the first pixel area, the second pixel area and the third pixel area to the pixel unit are respectively 5%-25%, 20%-45% and 35%-75%. Therefore, it can reduce the color difference at the large viewing angle to obtain a better low color shift effect and improve the display quality. | 05-28-2015 |
20150248864 | LIQUID CRYSTAL DISPLAY DEVICE AND DISPLAY CONTROL METHOD THEREOF - The present invention provides a liquid crystal display device and display control method thereof Each sub-pixel of the liquid crystal display device includes multiple display regions and multiple control switches for controlling the display regions to receive corresponding data voltages, wherein, the multiple control switches includes a first control switch set and a second control switch set, and the first control switch set and the second control switch set are connected in parallel with the same data line. Through the above way, the present invention can increase the pixel aperture ratio of the wide-viewing-angle liquid crystal display device and decrease the power consumption. | 09-03-2015 |
20150294632 | LIQUID CRYSTAL PANEL, DRIVING METHOD AND LIQUID CRYSTAL DEVICE - A liquid crystal panel includes a plurality of pixels arranged in a matrix form, a plurality of charge-filling gate lines, and a plurality of charge-sharing gate lines. Each pixel column electrically couples to one charge-filling gate line and one charge-sharing gate line. The charge-sharing gate line electrically coupled with the n-th pixel column is electrically coupled with the charge-filling gate line electrically coupled with the (n+m)-th pixel column The charge-filling gate line electrically coupled with each pixel column is inputted with first driving signal when the liquid crystal panel is driven in a 2D display mode and is inputted with second driving signals when the liquid crystal panel is driven in a 3D display mode. In addition, a driving method of the liquid crystal panel and the liquid crystal device incorporating the liquid crystal panel are disclosed. | 10-15-2015 |
Cheng-Hung Chen, Shenzhen CN
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20130093990 | LIQUID CRYSTAL DISPLAY MODULE AND A LIQUID CRYSTAL DISPLAY PANEL - A liquid crystal display module is provided, which includes a display panel. The display panel disposes a plurality of panel solder pads. Two ends of each panel solder pad both dispose a wire longitudinally extending. The length of each panel solder pad longitudinally extends along a wire direction. The module further includes a FPC board, which has a plurality of FPC board solder pads. The FPC board solder pads and the panel solder pads are soldered together in a one-to-one corresponding relational manner after being aligned with each other by a machine. Two adjacent panel solder pads are stagger arranged along the wire direction. A distance between one panel solder pad and the corresponding wire of the other panel solder pad along the direction perpendicular to the wire is greater than a minimum of an alignment precision of the machine. A liquid crystal display panel is also provided. | 04-18-2013 |
20130154679 | TESTING SYSTEM - Disclosed is a testing system, which includes a thin film transistor substrate. The thin film transistor substrate includes a plurality of thin film transistors and a plurality of connecting pads. Each of the thin film transistors includes a first electrode, a second electrode, and a third electrode. The thin film transistor substrate further includes a testing pad. One of the first electrode and the second electrode of each of the thin film transistors is electrically connected with one of the connecting pads. The third electrode and the other one of the first electrode and the second electrode of each of the thin film transistors are electrically connected with the testing pad. The testing system of the present invention is capable of decreasing the cost of the testing system and the complexity of disposed circuits. | 06-20-2013 |
20130215366 | Liquid Crystal Display Panel and Method for Making the Same - This invention discloses a liquid crystal display and a method making the same. The liquid crystal display panel includes an array substrate, a color filter substrate, a liquid crystal layer, a first and second transfer pads. The first transfer pad is disposed on the array substrate, and the second transfer pad is disposed onto the color filter substrate, and is electrically interconnected with the first transfer pad. Wherein the first and second transfer pads are surface treated to reduce the surface tension thereof before deployment of alignment layers. By this arrangement, the non-active border along the peripheral of the liquid crystal display can be reduced, and a liquid crystal display with narrowed border is achieved. | 08-22-2013 |
20130231025 | METHOD AND DEVICE FOR MANUFACTURING LIQUID CRYSTAL PANEL - The present invention discloses a method and a device for manufacturing liquid crystal panel. The method includes: after introducing liquid crystal between two substrates, subjecting the substrates to edge cutting in order to expose a signal pad; supplying an inspection signal to the signal pad to effect inspection, wherein if a defect is found, then repair of the defect is carried out; and after the inspection or after the repair, applying first alignment to have monomers of the liquid crystal polymerized to form pre-tilt angle. The present invention carries out inspection of substrates before an alignment operation is performed to have monomers of liquid crystal polymerized to show pre-tilt angle and if no defect is identified or if defects are identified but are subjected to repairing by a repair process to ensure that no defect exists in the substrates, the liquid crystal monomers are processed to show the pre-tilt angle. | 09-05-2013 |
20130271444 | Liquid Crystal Display Device and Display Panel Thereof - The present invention provides a liquid crystal display device and display panel thereof. The display panel includes data lines, scan lines disposed intersecting the data lines, pixel electrodes within area formed by two adjacent scan lines and two adjacent data lines, and thin film transistors disposed at intersecting points of scan lines and data lines; gate terminal of thin film transistor connected to scan line, source terminal of thin film transistor connected to data line and drain terminal of thin film transistor connected to pixel electrode. Overlapping area of drain terminal of thin film transistor and scan line forms parasitic capacitor C | 10-17-2013 |
20130278856 | Display Panel and Method for Reparing Signal Line of Display Panel - The present invention provides a method of repairing a display panel and signal lines of the display panel. The method comprises: arranging a repairing line in a different layer with the signal line; arranging a transparent conductive layer above an intersectionally-overlapped area of the repairing line and the signal line, a melting point of the transparent conductive layer is lower than that of the signal line and the repairing line, and using laser beams to melt the transparent conductive layer to connect the signal line and the repairing line when repairing the broken signal line. The present invention arranges an additional transparent conductive layer with a lower melting point on an overlapped area of a repairing line and a signal line and uses the laser beams to melt the transparent conductive layer to connect the repairing line and the signal line, thereby increasing repairing possibility as repairing the signal line. | 10-24-2013 |
20130319745 | Routing Structure and Display Panel - The present invention provides a routing structure and display panel. The routing structure includes a plurality of routing, disposed separately. Each routing corresponds to a symbol, and the symbol is disposed on the routing to act as a part of the routing to conduct electricity. In this manner, the routing structure and display panel of the present invention allow expansion of routing width, effectively reduce RC constant and energy-consumption, and improve yield rate. | 12-05-2013 |
20130321362 | Display Panel and Drive Method of Panel Display Device - The present invention discloses a display panel, including data IC and at least two scan ICs. Data IC includes input and output terminals of first scan signal. Scan IC includes input and output terminals of second scan signal. Input terminal of each scan IC is connected to output terminal of first scan signal on data IC through respective wire. Wires have equal resistance or have resistance difference smaller than a default value. The present invention also provides a panel display device and drive method thereof. As such, the present invention can improve luminance uniformity of display panel. | 12-05-2013 |
20130321478 | Dislplay Panel, Flat-Panel Display Device and Driving Method Thereof - The display panel includes data driven chip and at least two scanning driven chips. The second scanning signal input terminal of each of the scanning driven chip is connected to a first scanning signal output terminal of the data driven chip by corresponding transmission circuits. At least one transmission circuit includes a serially connected resistor so that sum of impedance of the transmission circuits are equal, or the difference of the impedance of the transmission circuit is less than a predetermined value. In addition, a flat-panel display device with uniform brightness and a driving method thereof are also provided. | 12-05-2013 |
20130321724 | LCD Device, Array Substrate, and Method of Manufacturing the Array Substrate - A liquid crystal display (LCD) device, an array substrate in the LCD device, and a method of manufacturing the array substrate are proposed. The LCD device includes an array substrate, a color filter (CF) substrate, and a liquid crystal (LC) layer sandwiched between the array substrate and the CF substrate. A voltage-applying circuit, an auxiliary wire, and a first test pad are disposed on the array substrate. The auxiliary wire is adjacent to the voltage-applying circuit. The auxiliary wire and the voltage-applying circuit are made of the same unit and undergo the same process. If the reference wire is examined to be defective, it could refer that the voltage-applying circuit might have a fault after references and comparisons. So the array substrate could be controlled or repaired. reducing the number of defective products. | 12-05-2013 |
20130321728 | Susbtrate for Array Process of Panel Display Device, Manufacturing Method and Corresponding Liquid Crystal Display Device - The present Invention provides a substrate for array process of panel display device, which includes a cell switch and a PVSA mode pad set. Cell switch includes a plurality of switches, with each connected to a pad in shorting bar pad set. PSVA mode pad set includes a scan pad and a data pad. Scan pad is connected through some switches of cell switch to scan lines, and data pad is connected through some switches of cell switch to data lines. In this manner, the present invention reduces the number of pads in PSVA mode pad set to simplify peripheral routes. | 12-05-2013 |
20130335655 | Substrate and Manufacturing Method of Panel Display Device and Corresponding Liquid Crystal Display Panel - The present invention provides a substrate for array process of panel display device, which includes a cell switch set and a PVSA mode pad set. Cell switch set includes a plurality of switch elements. PSVA mode pad set includes a data scan pad and a common electrode pad. Data scan pad is connected through some switch elements of cell switch set to a plurality of scan lines and data lines. Common electrode pad is connected through switch element to common electrode line in the area. The present invention further provides a panel display device and manufacturing method of liquid crystal display panel. In this manner, the present invention reduces the number of pads in PSVA mode pad set to simplify peripheral routes. | 12-19-2013 |
20130335686 | LCD panel and manufacturing method for the same - The present invention relates to a liquid crystal display (LCD) panel and its manufacturing method. The LCD panel comprises a first substrate, a second substrate, a sealant, and a barrier wall. The first substrate and the second substrate are disposed relatively. The sealant disposed surrounding between the first substrate and the second substrate. The barrier wall is disposed at the outer side of the area surrounded by the sealant, and the barrier wall is respectively abutted against the first substrate and the second substrate. In summary, the present invention could improve the overflow of the sealant, reducing the difficulty for narrow frame design and the requirement for cutting precision of the LCD panel. | 12-19-2013 |
20130337716 | Liquid Crystal Display Device, Manufacturing Method and Equipment for Liquid Crystal Display Panel - The present invention provides a manufacturing method for liquid crystal display panel, which includes: applying a voltage to form an electrical field between upper and lower substrates of liquid crystal display panel; forming layout and pretilt angle of liquid crystal molecules under the effect of electrical field; releasing the voltage between upper and lower substrates after forming pretilt angle of liquid crystal molecules. The present invention also provides a manufacturing method for liquid crystal display device and a manufacturing equipment for liquid crystal display panel. As such, reduces the dark pattern or fragmented bright spots in liquid crystal display panel and improve the displaying result of the liquid crystal display panel. | 12-19-2013 |
20130340934 | LCD device, manufacturing method and equipment for LCD panel - The present invention provides a manufacturing method for LCD panel by coating the first sealant having electrical conductibility on the PSVA testing pad of the lower substrate or on the position of the upper substrate corresponding to the PSVA testing pad of the lower substrate such that the PSVA testing pad electrically connects to the transparent electrode through the first sealant. | 12-26-2013 |
20140034952 | Liquid Crystal Display Device, Array Substrate and Manufacturing Method Thereof - The present invention provides a manufacturing method for array substrate, including: forming a first conductive layer, a first isolator layer, a second conductive layer and a second isolator layer on a substrate from bottom up, the first conductive layer for forming electrically connected scan line and control terminal of switch transistor, performing dry etch on the second isolator layer to form via hole, and forming a third conductive layer on the second isolator layer for forming data line. The present invention also provides an arrays substrate and a liquid crystal display device. As such, the present invention can reduce the possibility of electrostatic explosion during array substrate manufacturing process and improve the yield rate of array substrate. | 02-06-2014 |
20140036188 | Liquid Crystal Display Device, Array Substrate and Manufacturing Method Thereof - The present invention provides a liquid crystal display device, array substrate and manufacturing method thereof. The array substrate includes a substrate, first metal layer, first isolator layer, transparent conductive layer, second isolator layer and second metal layer, wherein the first metal layer forms scan line, gate of TFT and common electrode; first isolator layer is on top of first metal layer; transparent conductive layer forms source and drain of TFT, and pixel electrode; second isolator layer is on top of transparent conductive layer; second metal layer forms data line; in addition, array substrate further includes auxiliary electrode, and the auxiliary electrode is formed by at least one of first metal layer and second metal layer. As such, scan line and/or data line can co-transmit signal with auxiliary electrode to reduce impedance so as to improve display quality of liquid crystal display. | 02-06-2014 |
20140078426 | Patterned Retarder 3D Liquid Crystal Display and the Manufacturing Method Thereof - A patterned retarder 3D liquid crystal display is disclosed. The liquid crystal display includes a display panel, a polarizer, and a patterned retarder film. The display panel includes a first substrate and a second substrate spaced apart from each other. The second substrate includes an up surface and a down surface, and the up surface is farther to the first substrate than the down surface. A black matrix is arranged on the down surface of the second substrate. A mask is arranged on a first surface of the patterned retarder film adjacent to the second substrate so that the mask corresponds to portions of the black matrix. In addition, a manufacturing method of the patterned retarder 3D liquid crystal display is also disclosed. | 03-20-2014 |
20150022507 | ARRAY SUBSTRATE AND THE LIQUID CRYSTAL PANEL - An array substrate and a liquid crystal panel area disclosed. Each pixel cell of the array substrate includes a first pixel electrode, a second pixel electrode and a third pixel electrode. In addition, the pixel cell further includes a control circuit for operating on the second pixel electrode to change the voltage of the second pixel electrode. The third pixel electrode connects to the second pixel electrode via a third transistor. In the 2D display mode, the three pixel electrodes are all in the displaying state of corresponding 2D images. In the 3D display mode, the third pixel electrode is in the displaying state of corresponding black images, and the first and the second pixel electrodes are in the displaying state of corresponding 3D images. In this way, the color distortion in the 2D and 3D display modes are enhanced. | 01-22-2015 |
20150325186 | LIQUID CRYSTAL DISPLAY PANEL AND DRIVING METHOD THEREOF - The present invention provides a liquid crystal display panel and a driving method thereof, in which a gate driving unit makes scan signals input to respective rows of plural scan lines at an interval of a number of rows and a source driving unit makes grey-level voltages input to plural data lines extending along a column direction at an interval of a number of columns. The present invention can solve the problem of pixel chargeability inconsistence, which is caused by voltage drops on the signal lines. | 11-12-2015 |
Cheng-Hung Chen, Taoyuan County 330 TW
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20130032776 | LIGHT EMITTING DIODE STRUCTURE AND MANUFACTURING METHOD THEREOF - A light emitting diode structure and a manufacturing method thereof are disclosed. The structure includes a substrate, an N type semiconductor layer, and active layer, a P type semiconductor layer, a current diffusion layer, and a metal electrode. The metal ions of the P type semiconductor layer may bond with hydrogen after process thermal annealing, and metal hydride may be generated. The metal hydride may be directly formed on the surface of the P type semiconductor layer and may be used as the current blocking layer. Since the metal hydride may be directly formed on the surface of the P type semiconductor layer, its structure is flat, which resolve the problem having the electrodes peeled off from the solder wire. | 02-07-2013 |
Cheng-Hung Cheng, Chutung TW
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20160072318 | BATTERY CHARGING METHOD - The present disclosure provides a method for charging a battery. The method receives a plurality of battery parameters during the period of the battery charging, and the plurality of battery parameters are turned into fuzzification and corresponded to fuzzy rules to map out a fuzzy output. Then the fuzzy output is turned into defuzzification to obtain the value of the charging current. Therefore, the present disclosure can change the charging current adaptively to enhance the charging effect. | 03-10-2016 |
Cheng-Hung Chiang, Keelung City TW
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20120118624 | MANUFACTURING METHOD OF OBJECT HAVING CONDUCTIVE LINE AND STRUCTURE THEREOF - A manufacturing method of an object having a conductive line includes the following steps. A hardening layer and a conductive line layer are formed in an in-mold roller (IMR) material in sequence. The conductive line layer is formed on a non-conductive substrate by an IMR process. A carrier sheet is then separated to expose the hardening layer. A connecting piece is formed on the hardening layer. The connecting piece runs through the hardening layer by a connection process, and the connecting piece is electrically connected to the conductive line layer. Therefore, an object structure having the conductive line is formed. | 05-17-2012 |
Cheng-Hung Chiang, Taipei City TW
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20150293619 | ELECTRONIC DEVICE AND WATERPROOF TOUCH MODULE THEREOF - Disclosed are an electronic device and a waterproof touch module of the electronic device. The electronic device includes a casing and the waterproof touch module, and an installing portion is formed on a surface of the casing. The waterproof touch module includes a touch unit, an adhesive and a waterproof plate, and the touch unit is installed at the installing portion, and the waterproof plate is attached onto a surface of the casing through the adhesive and covered onto the touch unit, so that the touch unit is sealed in the installing portion to achieve a good waterproof effect. | 10-15-2015 |
Cheng-Hung Chiu, Tali TW
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20090050665 | NAIL GUN WITH A NAIL GUIDING UNIT - A nail gun includes a body, a handle connected fixedly to and extending laterally from the body, a nail ejecting member disposed on the body and formed with a nail discharging passage having opposite inlet and outlet ends, a magazine member connected to the nail ejection member, and an elongated nail guiding plate disposed within the nail discharging passage, and a driving member. The nail guiding plate has a pivot end disposed pivotally within the inlet end of the nail discharging passage, a free end disposed within the outlet end of the nail discharging passage, and a driven portion disposed between the pivot end and the free end. The driving member is connected to the driven portion of the nail guiding plate for driving the free end of the nail guiding plate to pivot between first and second positions. | 02-26-2009 |
20100301180 | FOLDABLE TOOL STAND - A foldable tool stand includes a main shaft, a pair of base plates affixed to the main shaft and two pairs of legs. The main shaft has a first end, a second end, and positioning members respectively provided at the first end and the second end for securing a machine tool. The legs are movable from an extended supporting position to support the stand on the floor to a collapsed position where the legs are closely aligned along the main shaft. By means of utilizing the foldable characteristic of the legs, the foldable tool stand and the machine tool carried on the foldable tool stand provide significant benefits because of its high mobility. | 12-02-2010 |
Cheng-Hung Chou, Taipei City TW
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20140066379 | RECOMBINANT VECTOR, TRANSGENIC FISH EGG USING THE SAME AND BIOMATERIAL USING THE SAME - A recombinant vector, transgenic fish egg using the same and biomaterial using the same are applied to provide a transgenic fish that secreting recombinant human procollagens or collagens, and further to provide the biomaterial having the recombinant human procollagens or collagens and extract the recombinant human procollagens or collagens from the part(s), having the recombinant human procollagens or collagens, of the transgenic fish. | 03-06-2014 |
Cheng-Hung Hsu, Taipei City TW
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20150297438 | AXILLARY CRUTCH - An axillary crutch contains a first support unit including two parallel first support columns, an armpit pad, two first connecting segments, and a grip bar; a second support unit including two parallel second support columns and an abutting pad, and the two parallel second support columns coupling with the two parallel first support columns; a positioning unit including two first fixing portions, an operating member, and two second fixing portions. The two first connecting segments of the first support unit are coupled on two top ends of the two parallel second support columns, and the two first fixing portions are locked with the two second fixing portions, such that when the operating member is pulled, the two first fixing portions remove from the two second fixing portions so that the first support unit and the second support unit are retracted. | 10-22-2015 |
Cheng-Hung Hsu, New Taipei City TW
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20150297438 | AXILLARY CRUTCH - An axillary crutch contains a first support unit including two parallel first support columns, an armpit pad, two first connecting segments, and a grip bar; a second support unit including two parallel second support columns and an abutting pad, and the two parallel second support columns coupling with the two parallel first support columns; a positioning unit including two first fixing portions, an operating member, and two second fixing portions. The two first connecting segments of the first support unit are coupled on two top ends of the two parallel second support columns, and the two first fixing portions are locked with the two second fixing portions, such that when the operating member is pulled, the two first fixing portions remove from the two second fixing portions so that the first support unit and the second support unit are retracted. | 10-22-2015 |
Cheng-Hung Ko, Shindian TW
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20130169507 | WIRELESS COMMUNICATION DEVICE WITH SENSOR-BASED ANTENNA SELECTION - An exemplary wireless communication device includes a housing, a first antenna, a second antenna, a switch, and a radio frequency (RF) circuit. The housing includes a first holding portion corresponding to the second holding portion and a second holding portion corresponding to the first holding portion. The RF circuit is selectively connectable to the first antenna or the second antenna via the switch. The sensor is electrically connected to the switch. The sensor senses a state of the housing, wherein the state of the housing is one of position of the housing and proximity of a user's hand to one of the first antenna and the second antenna, and the sensor controls the switch to select the first antenna or the second antenna to connect to the RF circuit to transmit and receive signals wirelessly according to the sensed state of the housing. | 07-04-2013 |
20130241786 | ANTENNA ASSEMBLY - An antenna assembly includes a carrier, a metal sheet, and an antenna. The metal sheet is attached to the carrier and defining at least one notch. The antenna is connected to the metal sheet and includes a radio body for receiving and transmitting wireless signals. The radio body is positioned above the metal sheet. The length of current path in a peripheral wall of the at least one notch is in a predetermined proportion to the wavelength of the wireless signals, enabling the metal sheet to resonate with the radio body to increase the bandwidth of the antenna. | 09-19-2013 |
20140327592 | ANTENNA STRUCTURE AND WIRELESS COMMUNICATION DEVICE EMPLOYING SAME - An antenna structure includes an antenna and a metal member located between the antenna and an electronic member. The antenna is configured for receiving and sending wireless signals. An electrical length of the metal member is greater than or equal to a quarter wavelength of a resonance frequency band of the antenna. The metal member transmits wireless signals generated by the electronic member to ground to prevent signals generated by the electronic member from interfering with the antenna. | 11-06-2014 |
20140375506 | WIRELESS COMMUNICATION DEVICE - A wireless communication device includes a base board, an antenna, a metal assembly, and a conductive assembly. The base board includes a feed portion and a ground portion, and defines a keep-out-zone. The antenna is located above the keep-out-zone, and is electronically connected to the feed portion and the ground portion. The metal assembly is located at the keep-out-zone, and is spaced from the antenna. The metal assembly is electronically connected to the feed portion and the ground portion through the conductive assembly. | 12-25-2014 |
20150022415 | ANTENNA STRUCTURE AND WIRELESS COMMUNICATION DEVICE EMPLOYING SAME - An antenna structure includes a main portion, a first radiating portion connected to the main portion, a second radiating portion connected to the main portion and opposite to the first radiating portion, and a coupling portion spaced from and coplanar with the main portion and opposite to the second radiating portion. The main portion and the first radiating portion excite a low frequency mode, the main portion, the first radiating portion, the second radiating portion, and the coupling portion excite a high frequency mode, and when the antenna structure is interfered by a user's human body when close to the user's human body, the coupling portion transmits the interference to ground. A wireless communication device employing the antenna structure is also disclosed. | 01-22-2015 |
20150109169 | WIRELESS COMMUNICATION DEVICE - A wireless communication device includes a printed circuit board (PCB), a main antenna, and a coupling member. The main antenna is positioned on the PCB, and includes a first radiation portion and a second radiation portion. A first end of the coupling member is grounded via the PCB, and a second end of the coupling member is located between the first radiation portion and the second radiation portion. The coupling member is resonant with the first radiation portion and the second radiation portion. | 04-23-2015 |
Cheng-Hung Lee, Hukou Village TW
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20130094307 | BIT LINE VOLTAGE BIAS FOR LOW POWER MEMORY DESIGN - In a digital memory with an array of bit cells coupled to word lines and bit lines, each bit cell having cross coupled inverters isolated from bit lines by passing gate transistors until addressed, some or all of the bit cells are switchable between a sleep mode and a standby mode in response to a control signal. A bit line bias circuit controls the voltage at which the bit lines are caused to float when in the sleep mode. A pull-up transistor for each bit line BL or BLB in a complementary pair has a conductive channel coupled to a positive supply voltage and a gate coupled to the other bit line in the pair, BLB or BL, respectively. A connecting transistor also can be coupled between the bit lines of the complementary pair, bringing the floating bit lines to the supply voltage less a difference voltage ΔV. | 04-18-2013 |
Cheng-Hung Lee, Hsinchu City TW
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20090109768 | SRAM Device with Enhanced Read/Write Operations - An SRAM device includes: a first group of memory cells connected to a first local bit line and a first local complementary bit line for accessing data nodes thereof; a second group of memory cells connected to a second local bit line and a second local complementary bit line for accessing data nodes thereof; and a global bit line and a global complementary bit line connected to the first and second local bit lines for accessing data nodes of the first and second groups of memory cells, wherein the first local bit line, the first local complementary bit line, the second local bit line, the second local complementary bit line, the global bit line and the global complementary bit line are constructed on a same metallization level in the SRAM device. | 04-30-2009 |
20140112048 | N-BIT ROM CELL - Among other things, an n-bit ROM cell, such as a twin-bit ROM cell, and techniques for addressing one or more ROM cell portions of the n-bit ROM cell are provided. A twin-bit ROM cell comprises a first ROM cell portion adjacent to or substantially contiguous with a second ROM cell portion. The first ROM cell portion is associated with a first data bit value. The second ROM cell portion is associated with a second data bit value distinct from the first data bit value. Because the first ROM cell portion is adjacent to the second ROM cell portion, OD-to-OD spacing between the twin-bit ROM cell and an adjacent twin-bit ROM cell is increased to provide, for example, improved isolation, cell current, ROM speed, and VCCmin performance in comparison with single-bit ROM cells, while maintaining a substantially similar to pitch as the single-bit ROM cells. | 04-24-2014 |
Cheng-Hung Li, Chutung TW
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20150187846 | LIGHT EMITTING ELEMENT - A light emitting element is provided, including a first electrode layer, a second electrode layer, and an organic light emitting layer sandwiched between the first electrode layer and the second electrode layer. The organic light emitting layer is patterned to include a plurality of light emitting blocks with different densities. In an embodiment, the light emitting blocks are divided into a plurality of light emitting block groups that are arranged in an alternate manner. In another embodiment, a light emitting element includes a first electrode layer, a first organic light emitting layer, a charge generating layer, a second organic light emitting layer, and a second electrode layer sequentially stacked on one another. The first and second organic light emitting layer are patterned to form a plurality of first and second light emitting blocks with different densities, respectively. Thus, the light emitting element generates full-color, gray-scale, three-dimensional, or dynamic images. | 07-02-2015 |
20150236290 | BLUE LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE - A blue light emitting device includes an electrode layer, a first metal layer, a second metal layer formed between the electrode layer and the first metal layer, and an organic material layer formed between the first metal layer and the second metal layer and including a blue shift light emitting sub-layer. A peak of a first light-emitting spectrum of the blue shift light emitting sub-layer, which ranges within 490-550 nm, is shifted to a peak of a second light-emitting spectrum, which is less than 510 nm, by the surface plasmon coupling between the first metal layer and the second metal layer. A light emitting device is further provided, which is sequentially stacked with a first metal layer, an organic material layer having a blue shift light emitting sub-layer, a second metal layer having a metal portion and an opening portion, an electrode layer, and a light emitting layer doped with a dopant material, to emit white light. | 08-20-2015 |
Cheng-Hung Li, Kaohsiung County TW
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20100200947 | DIE SEAL RING - A die seal ring disposed outside of a die region of a semiconductor substrate is disclosed. The die seal ring includes a first isolation structure, a second isolation structure, and at least one third isolation structure disposed between the first isolation structure and the second isolation structure; a plurality of first regions between the first isolation structure, the second isolation structure and the third isolation structure; a second region under the first region and the third isolation structure; and a third region under the first isolation structure. | 08-12-2010 |
Cheng-Hung Li, Taoyuan County TW
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20150162560 | LIGHT EMITTING DEVICE - A light emitting device includes a substrate, a coupling unit and an organic light emitting unit. The coupling unit includes a first conductive layer, a first light emitting layer and a second conductive layer. The first conductive layer is located on the substrate. The first light emitting layer is located between the first conductive layer and the second conductive layer. The organic light emitting unit is located adjacent to the second conductive layer. | 06-11-2015 |
20160035798 | LIGHT EMITTING DEVICE - A light emitting device includes a substrate, a coupling unit and an organic light emitting unit. The coupling unit includes a first conductive layer, a first light emitting layer and a second conductive layer. The first conductive layer is located on the substrate. The first light emitting layer is located between the first conductive layer and the second conductive layer. The organic light emitting unit is located adjacent to the second conductive layer. | 02-04-2016 |
Cheng-Hung Li, Hsinchu TW
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20150115228 | Light Emitting Device - A light emitting device is disclosed, including a first electrode layer, an organic light emitting layer disposed on the first electrode layer, and a second electrode layer disposed on the organic light emitting layer. The organic light emitting layer is sandwiched between the first electrode layer and the second electrode layer. The second electrode layer is patterned to form a plurality of electrode patterns arranged with different densities, thereby generating three-dimensional, greyscale or full-color images. | 04-30-2015 |
20150115249 | LIGHT EMITTING DEVICE - A light emitting device is disclosed, including a first electrode layer, a second electrode layer, and an organic light emitting layer sandwiched between the first and second electrode layers. The second electrode layer is patterned to form a plurality of electrode patterns arranged with different densities. The organic light emitting layer is subjected to a color separation process to form a plurality of monochromatic blocks that correspond to the electrode patterns, respectively. The electrode patterns are divided into a plurality of electrode pattern groups arranged in an alternate manner. The electrode pattern groups display a same image, and a same voltage is applied to the electrode pattern groups at a same time. Alternatively, the electrode pattern groups display different images, and a same or different voltages are applied to the electrode pattern groups at different times. As such, the light emitting device generates grayscale, full-color, three-dimensional or dynamic images. | 04-30-2015 |
Cheng-Hung Liu, Hsinchu City TW
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20140205012 | METHOD AND APPARATUS USING SOFTWARE ENGINE AND HARDWARE ENGINE COLLABORATED WITH EACH OTHER TO ACHIEVE HYBRID VIDEO ENCODING - One video encoding method includes: performing a first part of a video encoding operation by a software engine with instructions, wherein the first part of the video encoding operation comprises at least a motion estimation function; delivering a motion estimation result generated by the motion estimation function to a hardware engine; and performing a second part of the video encoding operation by the hardware engine. Another video encoding method includes: performing a first part of a video encoding operation by a software engine with instructions and a cache buffer; performing a second part of the video encoding operation by a hardware engine; performing data transfer between the software engine and the hardware engine through the cache buffer; and performing address synchronization to ensure that a same entry of the cache buffer is correctly addressed and accessed by both of the software engine and the hardware engine. | 07-24-2014 |
Cheng-Hung Pan, New Taipei TW
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20150049475 | LED TUBE HAVING INCREASED ILLUMINATION ANGLE - An LED tube has a tube body, an LED light board and two caps. The tube body has a translucent tube shell and a heat dissipating seat. The translucent tube shell has two openings and a gap. The heat dissipating seat is mounted in the gap. The LED board faces toward the translucent tube shell and has a convex luminous surface obliquely facing toward the translucent tube shell to increase an illumination range of the LED light board, thus, an illumination angle of the LED tube in accordance with the present invention is also increased. Therefore, the LED tube glows evenly and eliminates grain effects of the LED tube. | 02-19-2015 |
20150077983 | LIGHT-EMITTING DIODE TUBE AND LIGHT-EMITTING DIODE TUBE FASTENER THEREFOR - A light-emitting diode (LED) tube has a tube and at least one LED tube fastener. Each of the at least one LED tube fastener has a body and a magnetic core. The body has at least one insertion leg formed on a bottom thereof and connected to a top wall of the tube. The magnetic core is mounted in a top portion of the body to be magnetically attached to a lamp fixture when the LED tube is mounted on the lamp fixture such that the at least one LED tube fastener holds and supports the LED tube and the LED tube is not bent due to a weight thereof. | 03-19-2015 |
Cheng-Hung Peng, Hukou Shiang TW
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20090122528 | LED lighting device inlaid on a ceiling - The present invention provides an LED lighting device inlaid on a ceiling. The ceiling is divided into a plurality of lattice by a matrix of metal strip, plastic strip or wood strip, a matrix of LED are installed on the lattice; an AC power is inputted through a power line to an AC/DC converter for being converted into a DC power, and then the DC power passes through a current stabilizer, a resistor, a connector for being inputted to two ends of each row of the LEDs; LEDs of each row are serially connected. | 05-14-2009 |
Cheng-Hung Shih, Kaohsiung TW
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20140110664 | III-NITRIDE QUANTUM WELL STRUCTURE, A METHOD FOR PRODUCING THE SAME, AND A LIGHT-EMITTING UNIT USING THE SAME - An III-nitride quantum well structure includes a GaN base, an InGaN layer and an InGaN covering layer. The GaN base includes a GaN buffering layer, a GaN post extending from the GaN buffering layer, and a GaN pyramid gradually expanding from the GaN post to form a mounting surface. The InGaN layer includes first and second coupling faces. The first coupling face is coupled with the mounting surface. The GaN covering layer includes first and second coupling faces. The first coupling face of the GaN covering layer is coupled with the second coupling face of the InGaN layer. A method for manufacturing the III-nitride quantum well structure and a light-emitting unit having a plurality of III-nitride quantum well structures are also proposed. | 04-24-2014 |
20150102286 | III-Nitride Quantum Well Structure and a Light-Emitting Unit Using the Same - An III-nitride quantum well structure includes a GaN base, an InGaN layer and an InGaN covering layer. The GaN base includes a GaN buffering layer, a GaN post extending from the GaN buffering layer, and a GaN pyramid gradually expanding from the GaN post to form a mounting surface. The InGaN layer includes first and second coupling faces. The first coupling face is coupled with the mounting surface. The GaN covering layer includes first and second coupling faces. The first coupling face of the GaN covering layer is coupled with the second coupling face of the InGaN layer. | 04-16-2015 |
20150333222 | EPITAXY STRUCTURE OF A LIGHT EMITTING ELEMENT - An epitaxy structure of a light emitting element includes a gallium nitride substrate, an N-type gallium nitride layer, a quantum well unit, and a P-type gallium nitride layer. The gallium nitride substrate includes a gallium nitride buffer layer, a gallium nitride hexagonal prism, and a gallium nitride hexagonal pyramid. The gallium nitride hexagonal prism extends from the gallium nitride buffer layer along an axis. The gallium nitride hexagonal pyramid extends from the gallium nitride hexagonal prism along the axis and gradually expands to form a hexagonal frustum. The N-type gallium nitride layer is located on the gallium nitride hexagonal pyramid. The quantum well unit includes an indium gallium nitride layer located on the N-type gallium nitride layer and a gallium nitride layer located on the indium gallium nitride layer. The P-type gallium nitride layer is located on the gallium nitride layer. | 11-19-2015 |
20150333226 | STACKING STRUCTURE OF A LIGHT-EMITTING DEVICE - A stacking structure of a light-emitting device is disclosed. The stacking structure of the light-emitting device includes a substrate, a first semiconductor layer, a second semiconductor layer, a conducting layer, and two electrodes. The substrate is essentially made of a light-permeable, non-metallic material. The first semiconductor layer is arranged on the substrate and essentially made of a ternary compound with chalcopyrite phase. The second semiconductor layer is arranged on the first semiconductor layer. The conducting layer is arranged on the second semiconductor layer and essentially made of a light-permeable semiconducting material different from the material of the substrate. The two electrodes are respectively arranged on the substrate and the conducting layer. Thus, the problem of having difficulty in emitting the light outwards from the side of the light-emitting diode adjacent to the substrate, as commonly seen in the conventional light-emitting device, is overcome. | 11-19-2015 |
Cheng-Hung Shih, Lugang Township TW
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20120208129 | PROCESS FOR FORMING AN ANTI-OXIDANT METAL LAYER ON AN ELECTRONIC DEVICE - A process for forming an anti-oxidant metal layer on an electronic device comprises the steps of providing a substrate; forming a conductive metal layer on the substrate; forming a first photoresist layer on the conductive metal layer; patterning the first photoresist layer to form apertures and first grooves; forming a connecting member having a top surface and a lateral surface in the aperture and the first groove; removing the first photoresist layer to reveal the top surface and the lateral surface; forming a second photoresist layer on the conductive metal layer; patterning the second photoresist layer to form apertures and second grooves; forming an anti-oxidant metal layer in aperture and second groove, the anti-oxidant metal layer covers the top surface and the lateral surface of the connecting member; and removing the second photoresist layer to reveal the anti-oxidant metal layer and the conductive metal layer. | 08-16-2012 |
20120211257 | PYRAMID BUMP STRUCTURE - A pyramid bump structure for electrically coupling to a bond pad on a carrier comprises a conductive block disposed at the bond pad and an oblique pyramid insulation layer covered at one side of the conductive block. The oblique pyramid insulation layer comprises a bottom portion and a top portion, and outer diameter of the oblique pyramid insulation layer is tapered from the bottom portion to the top portion. When the carrier is connected with a substrate and an anisotropic conductive film disposed at the substrate, the pyramid bump structure may rapidly embed into the anisotropic conductive film to raise the flow rate of the anisotropic conductive film. Further, a short phenomenon between adjacent bumps can be avoided to raise the yield rate of package process. | 08-23-2012 |
Cheng-Hung Shih, Zhudong Township TW
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20120318570 | BUMP STRUCTURE AND PROCESS OF MANUFACTURING THE SAME - A bump structure comprises a first polymer block, a second polymer block, a first groove, an under bump metallurgy layer and a connection metal layer, wherein the first polymer block and the second polymer block are individual blocks. The first polymer block comprises a first connection slot, and the second polymer block comprises a second connection slot communicated with the first groove and the first connection slot. The under bump metallurgy layer covers the first polymer block and the second polymer block to form a second groove. The connection metal layer covers the under bump metallurgy layer to form a third groove, wherein the under bump metallurgy layer covers a first coverage area of the first polymer block and a second coverage area of the second polymer block and reveals a first exposure area of the first polymer block and a second exposure area of the second polymer block. | 12-20-2012 |
20120319271 | BUMP STRUCTURE AND PROCESS OF MANUFACTURING THE SAME - A bump structure comprises a first polymer block, a second polymer block, a first groove, an under bump metallurgy layer and a connection metal layer, wherein the first polymer block and the second polymer block are individual blocks. The first polymer block and the second polymer block are located at two sides of the first groove, the first polymer block comprises a first connection slot, and the second polymer block comprises a second connection slot communicated with the first connection slot and the first groove. The under bump metallurgy layer covers the first polymer block and the second polymer block to form a second groove, a third connection slot and a fourth connection slot communicated with each other. The connection metal layer covers the under bump metallurgy layer to form a third groove, a fifth connection slot and a sixth connection slot communicated with each other. | 12-20-2012 |
Cheng-Hung Shih, Longtan Township TW
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20150155194 | METHOD OF PREPARING HETEROGENEOUS STACKED CO-FIRED CERAMIC FOR USE IN AN ALUMINUM NITRIDE ELECTROSTATIC CHUCK - A method of preparing a heterogeneous stacked co-fired ceramic for use in an aluminum nitride-based electrostatic chuck includes providing a first aluminum nitride blank layer; applying a metal ink to the first aluminum nitride blank layer to form thereon an electrostatic electrode layer by screen printing, wherein the metal ink mainly contains a metal of high melting point; stacking a second aluminum nitride blank layer on the electrostatic electrode layer; laminating the first aluminum nitride blank layer, the electrostatic electrode layer, and the second aluminum nitride blank layer (collectively known as a heterogeneous ceramic) together; and co-firing the laminated heterogeneous ceramic in accordance with a sintering temperature rising curve to prepare the heterogeneous stacked co-fired ceramic characterized by reduced differences in sintering shrinkage ratio between the electrostatic electrode and aluminum nitride blank and enhanced strength and adhesion of the interface between the electrostatic electrode and aluminum nitride blank. | 06-04-2015 |
Cheng-Hung Shih, Kaohsiung City TW
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20150333209 | STACKING STRUCTURE OF A PHOTOELECTRIC DEVICE - A stacking structure of a photoelectric device includes a base, a first conducting layer, a first semiconductor layer, a second semiconductor layer, a second conducting layer and two electrodes. The base is essentially made of a light-permeable material. The first conducting layer is arranged on the base and essentially made of a light-permeable, non-metal material. The first semiconductor layer is arranged on the first conducting layer and essentially made of a ternary compound with chalcopyrite phase. The second semiconductor layer is arranged on the first semiconductor layer. The second conducting layer is arranged on the second semiconductor layer and essentially made of a light-permeable semiconductor material different from the light-permeable, non-metal material of the first conducting layer. The two electrodes are respectively arranged on the first and second conducting layers. | 11-19-2015 |
Cheng-Hung Tsai, New Tapiei City TW
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20150023109 | NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A nonvolatile semiconductor memory device comprises a memory cell array, a staircase voltage generator, and a decode and level shift circuit. The memory cell array comprises a plurality of memory cells and a plurality of bit lines coupled to the plurality of memory cells. The staircase voltage generator generates a staircase voltage having a staircase waveform that varies in at least two steps. The decode and level shift circuit selects one of said plurality of bit lines and applies the staircase voltage as a program voltage to the selected bit line. | 01-22-2015 |
Cheng-Hung Tsai, New Taipei City TW
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20130308404 | CIRCUIT FOR SENSING MULTI-LEVEL CELL - A circuit for sensing a multi-level cell (MLC) comprises a first switch associated with a first read bit, a second switch associated with a second read bit, a first switch control unit to control the first switch in response to a first data bit from a counter, and a second switch control unit to control the second switch in response to a second data bit from the counter. | 11-21-2013 |
20140219029 | PROGRAMMING METHOD FOR NONVOLATILE SEMICONDUCTOR MEMORY DEVICE - A method for programming a plurality of memory cells of a nonvolatile semiconductor memory device comprises the steps of: dividing the plurality of memory cells into M number of groups (M is an integer); successively selecting each of the M number of groups; generating M number of successive overlapping pulse signals; and programming the memory cells of the M number of groups in response to the respective M number of successive overlapping pulse signals. | 08-07-2014 |
20150270004 | Method for Performing Erase Operation in Non-Volatile Memory - A method for performing an erase operation in a non-volatile memory incorporates the steps of selecting a block on which to perform an erase operation; erasing the selected block using a plurality of erase pulses; receiving erase data of the selected block; determining an over-erase correction verify voltage level based on the erase data; and over-erase correcting the selected block until each cell within the selected block passes the over-erase correction verify voltage level. | 09-24-2015 |
Cheng-Hung Tsai, Taipei TW
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20090285404 | ACOUSTIC CALIBRATION SOUND SYSTEM - An acoustic calibration sound system includes a coordinate position detecting device and a host. The coordinate position detecting device is used for detecting a position of a listener in a space plane and issuing a corresponding position signal. The host outputs an audio signal. The host has an acoustic characteristic parameter matrix containing multiple acoustic characteristic parameters related to multiple positions in the space plane. The host selects a corresponding acoustic characteristic parameter in response to the position signal. According to the selected acoustic characteristic parameter, the host adjusts the audio signal. | 11-19-2009 |
20100050200 | PROGRAM INFORMATION PROMPTING METHOD AND APPARATUS AND TELEVISION SET USING THE SAME - A program information prompting method and apparatus and a television set using the same are provided. In the method, a user is identified at first. Then, a watching habit of the user is recorded. Next, program preference of the user is determined according to the watching habit. Afterwards, a prompt of related program information is given according to the user's program preference. | 02-25-2010 |
Cheng-Hung Tsai, Toufen Town TW
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20110080766 | Resistive Memory Device and Manufacturing Method Thereof and Operating Method Thereof - A method of manufacturing resistive memory includes the steps: forming a first implanted stacked structure having a first impurity diffusion layer, a second impurity diffusion layer, and a third impurity diffusion layer in a substrate; etching at least the first implanted stacked structure to form a plurality of second implanted stacked structures, wherein the first impurity diffusion layers are first signal lines; forming a plurality of first insulating layers between the second implanted stacked structures; etching the second implanted stacked structures to form a plurality of third implanted stacked structures, wherein the first signal lines are not etched; forming a plurality of second insulating layers between the third implanted stacked structures; forming a plurality of memory material layers electrically coupled to the third impurity diffusion layers; and forming a plurality of second signal lines perpendicular to the first signal lines and electrically coupled to the memory material layers. | 04-07-2011 |
Cheng-Hung Wang, Kaohsiung TW
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20150132867 | SEMICONDUCTOR PROCESS - The present disclosure relates to a semiconductor process, which includes: (a) providing a semiconductor element; (b) attaching the semiconductor element to a carrier by an adhesive layer, so that the adhesive layer is sandwiched between the semiconductor element and the carrier; and (c) cutting the semiconductor element to form a plurality of semiconductor units. Thereby, the gaps between the semiconductor units are fixed after the cutting process, so as to facilitate testing the semiconductor units. | 05-14-2015 |
Cheng-Hung Wei, Kaohsiung City TW
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20080231172 | Light emitting device using phosphor powder - The present invention is a light emitting device which uses a specific phosphor powder. The phosphor powder is a combination of cerium (Ce) and lithium aluminum oxide (LiAlO | 09-25-2008 |
Cheng-Hung Wu, New Taipei City TW
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20130175434 | INDICATOR TESTING SYSTEM - An indicator testing system for testing a plurality of indicators disposed on an electronic product and adapted to display a status includes a plurality of light sensors, a holder for holding the light sensors, and a signal processing module. The light sensors correspond in position to the indicators on the electronic product, respectively, and each generate a corresponding light testing signal whereby the signal processing module generates a brightness testing signal related to each indicator. The indicator testing system speeds up an indicator test, enhances the precision of the indicator test, and ensures the quality of the electronic product. | 07-11-2013 |
20140015499 | VOLTAGE RESOLUTION ADJUSTMENT SYSTEM AND METHOD - A voltage resolution adjustment system and method increase voltage resolution of an output voltage of a processor from a first voltage resolution to a second voltage resolution. The system includes a processing module, a voltage-dividing module, and an amplifying unit. The processing module generates a first voltage of a first voltage resolution. The voltage-dividing module increases the first voltage of the first voltage resolution to a second voltage of a second voltage resolution. The amplifying unit increases the second voltage to a third voltage (i.e., the output voltage). After comparing the third voltage and the first voltage and detecting a voltage difference therebetween, the processing module generates a control signal for changing a voltage partitioning ratio of the voltage-dividing module to render the third voltage and the first voltage equal, wherein the third voltage is of the second voltage resolution. | 01-16-2014 |
20140093165 | METHOD AND APPARATUS FOR RECOGNIZING COLOR - A method and an apparatus for recognizing color are provided. A color signal of a light source is obtained by a photo-sensing unit. After the color signal is received, a processing unit converts the color signal to a chromaticity coordinate, and compares the chromaticity coordinate with a gamut range to obtain a color corresponding to the light source. | 04-03-2014 |
Cheng-Hung Yang, Taitung City TW
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20140091344 | ILLUMINATION COMPONENT PACKAGE - An illumination component package includes a substrate, at least one illumination component, a dam and an encapsulating glue. The illumination component is mounted on the substrate. The dam surrounds the illumination component to form a accommodating space. The inner wall of the dam includes a plurality of glue adhering microstructures. The encapsulating glue is filled in the accommodating space. | 04-03-2014 |
Cheng-Hung Yang, Hsinchu County TW
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20150135592 | MODULAR DEVICE FOR RAISING SEEDLING - The present invention discloses a modular device for raising seedling that comprises at least two individual containers to receive a culture medium and a seedling, and at least a coupling member. Each of the individual containers is provided with at least a pair of the coupling bumps arranged on two opposing positions respectively on both lateral edges of the individual container, and is protruded at a predetermined height from a backside of the individual container. Each of the coupling members is provided with a mating groove which is arranged in extending around its longitudinal shape so as to form a serial connection of the individual containers by means of mating the coupling bump with the mating groove within the same coupling member between two adjacent individual containers. | 05-21-2015 |
Cheng-Hung Yang, Hsin-Chu Hsein TW
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20100072492 | Package Substrate and Light Emitting Device Using the Same - A package substrate of the present invention at least comprises a metal substrate and a plurality of light emitting dies. The metal substrate is provided thereon with at least one trench. The trench is recessed into the surface of the metal substrate through an insulating layer. The light emitting dies are secured in the trench and electrically connected to a predetermined wiring layer on the metal substrate by metal wires, thereby obtaining a light emitting die package substrate with good thermal conductivity, high heat dissipation, separate electrical and thermal paths and a simple and firm structure. | 03-25-2010 |
Cheng-Hung Yang, Miaoli City, Miaoli County TW
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20150214442 | LIGHT EMITTING DIODE PACKAGE STRUCTURE AND METHOD THEREOF - A light emitting diode (LED) package structure is provided. The LED package structure comprises a substrate, at least one LED chip, an encapsulating compound and a curing material. The substrate has a first surface and a second surface opposite to the first surface. The LED chip is disposed on the first surface. The encapsulating compound covers the LED chip. The encapsulating compound has a plurality of particulate phosphors therein. The phosphors are centralized near a side of the encapsulating compound away from the substrate. The curing material is adhered to the side of the encapsulating compound away from the substrate. | 07-30-2015 |
Cheng-Hung Yang, Taichung City TW
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20150240501 | COMBINATION FRAME MATERIAL - A combination frame material includes an outer frame and an inner frame. Therein, the outer frame has an outer side and an inner side, with the inner side provided with two parallel combining grooves with a middle pillar disposed therebetween for dividing the two combining grooves. The inner frame has two parallel combining parts for being received in the two combining grooves, with a pillar groove disposed between the two combining parts for receiving the middle pillar. Thus, the outer frame and the inner frame are allowed to be combined easily and efficiently. | 08-27-2015 |
Cheng-Hung Yang, Taipei TW
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20090043936 | DOCKING STATION AND EXPANDABLE COMPUTER SYSTEM - A docking station is used for cooperating with a computer host, and the computer host has a first power connecting portion and a first peripheral component connecting portion. The docking station includes a casing, a second power connecting portion and a second peripheral component connecting portion. The casing is used for disposing the computer host. The second power connecting portion and the second peripheral component connecting portion are disposed at the casing. When the computer host is disposed at the casing, the second power connecting portion is connected to the first power connecting portion to transmit a power signal to the computer host, and the second peripheral component connecting portion is connected to the first peripheral component connecting portion to transmit at least one peripheral component signal to the computer host. An expandable computer system is also disclosed. | 02-12-2009 |
Cheng-Hung Yeh, Jhunan TW
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20090077507 | Method of Generating Technology File for Integrated Circuit Design Tools - A method and system for extracting the parasitic capacitance in an IC and generating a technology file for at least one or more IC design tools are provided. Parasitic extraction using the preferred method can significantly reduce field solver computational intensity and save technology file preparation cycle time. The network-based technology file generation system enables circuit designers to obtain a desired technology file in a timely manner. The common feature of the various embodiments includes identifying common conductive feature patterns for a given technology generation. Capacitance models created from the identified patterns are used to assemble the required technology files for IC design projects using different technology node and different process flows. | 03-19-2009 |
Cheng-Hung Yeh, Jhunan Township TW
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20080244482 | INTEGRATED CIRCUIT DESIGN USAGE AND SANITY VERIFICATION - An automated system and method for sanity checking an integrated circuit cell layout. The method generally includes searching the cell layout for a sub-area containing a predefined identifier, determining a reference cell layout corresponding to the predefined identifier, verifying the cell layout by comparing the cell layout to the reference cell layout to determine if a cell is of concern, and reporting the cell of concern to a user. | 10-02-2008 |
20080244483 | INTEGRATED CIRCUIT DESIGN USAGE AND SANITY VERIFICATION - A method and system for verifying an integrated circuit design are provided. The method includes identifying cell tags embedded in a proposed integrated circuit design file, comparing cells identified as having a tag embedded therein to a cell library containing verified cell data to determine differences between the identified tagged cells and corresponding verified cell data from the cell library, and revising the proposed integrated circuit design to correct differences between the proposed integrated circuit design file and the verified cell data. | 10-02-2008 |
20150154343 | SYSTEMS AND METHODS FOR DETERMINING EFFECTIVE CAPACITANCE TO FACILITATE A TIMING ANALYSIS - A method for timing analysis includes using the processor to determine an impedance profile of a coupling between at least a first inter-level via (ILV) and a a second ILV or a device, as a function of at least different frequency values. The impedance profile includes a plurality of impedance values corresponding to respective frequency values. An effective capacitance value corresponding to each respective impedance value is determined. At least one table is provided with respective impedance values and respective effective capacitance values for each respective frequency value. An RC extraction of a design layout of an ILV circuit is conducted using the populated table and based on determined effective capacitance values. | 06-04-2015 |
20150269303 | METHOD AND SYSTEM FOR VERIFYING THE DESIGN OF AN INTEGRATED CIRCUIT HAVING MULTIPLE TIERS - A method for verifying the design of an IC having a plurality of tiers includes conducting a layout versus schematic (“LVS”) check to separate a plurality of devices of a plurality of design layouts, wherein each design layout corresponds to a respectively different tier having the respective devices. A plurality of adjacent tier connections are generated between one of the devices in respectively different tiers from each other, using a computing device. A first RC extraction for each of the tiers is performed to compute couplings between each of the plurality of devices of the corresponding design layout. A second RC extraction for each of the adjacent tier connections is performed. | 09-24-2015 |
Cheng-Hung Yeh, Miaoli County TW
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20150179648 | MULTI-LAYER SEMICONDUCTOR STRUCTURES FOR FABRICATING INVERTER CHAINS - Systems and methods are provided for fabricating a semiconductor structure including an inverter chain. An example semiconductor structure includes a first device layer, a second device layer, and one or more inter-layer connection structures. The first device layer is formed on a substrate and includes one or more first inverter structures. The second device layer is formed on the first device layer and includes one or more second inverter structures. The one or more inter-layer connection structures are configured to electrically connect to the first inverter structures and the second inverter structures. | 06-25-2015 |