Patent application number | Description | Published |
20100326966 | Multi-Gas Mixer and Device for Supplying Gas Mixture to Plasma Torch - A multi-gas mixer for supplying a gas mixture that can uniformly mix a plurality of gases according to the proportional percentages determined by the mass flow rate of each gas is disclosed. The multi-gas mixer comprises a mixer chamber, a plurality of gas inlets, a gas mixture outlet, and at least one gas rotating and mixing unit. The present invention also provides a method for controlling the percentage of each gas to be mixed by use of a plurality of mass flow rate controllers to control the gas flow to produce a gas mixture according to a predetermined proportionality. When the multi-gas mixer delivers a gas mixture to a high-speed plasma torch, the torch can be stably operated under a high voltage (>85V) and a medium current (<650 A) so that a long-arc, high-temperature and high-speed plasma flame can be generated. | 12-30-2010 |
20110003235 | SOLID OXIDE FUEL CELL AND MANUFACTURING METHOD THEREOF - A solid oxide fuel cell comprising a metal frame, a porous metal substrate, a first anode isolation layer, an anode interlayer, a second anode isolation layer, an electrolyte layer, a cathode isolation layer, a cathode interlayer and a cathode current collecting layer. The first anode isolation layer, the anode interlayer, the second anode isolation layer, the electrolyte layer, the cathode isolation layer, the cathode interlayer and the cathode current collecting layer are sequentially disposed on the porous metal substrate. The first anode isolation layer is porous sub-micron structured or porous micron structured; the anode interlayer is porous nano structured; the second anode isolation layer is dense structured or porous nano structured; the electrolyte is dense and gas-tight; the cathode isolation layer is dense structured or porous nano structured; the cathode interlayer is porous nano structured or porous sub-micron structured; and the cathode current collecting layer is porous micron structured. | 01-06-2011 |
Patent application number | Description | Published |
20140367801 | MECHANISM FOR FORMING METAL GATE STRUCTURE - Embodiments of mechanisms for forming a semiconductor device are provided. The semiconductor device includes a semiconductor substrate with a metal gate stack formed on the semiconductor substrate, and the metal gate stack includes a metal gate electrode. The semiconductor device also includes a metal oxide layer formed over the metal gate stack and in direct contact with the metal gate electrode, and a thickness of the metal oxide layer is in a range from about 15 Å to about 40 Å. The metal oxide layer has a first portion made of an oxidized material of the metal gate electrode and has a second portion made of a material different from that of the first portion. | 12-18-2014 |
20150024661 | MECHANISMS FOR REMOVING DEBRIS FROM POLISHING PAD - Embodiments of mechanisms for performing a chemical mechanical polishing (CMP) process are provided. A method for performing a CMP process includes polishing a wafer by using a polishing pad. The method also includes applying a cleaning liquid jet on the polishing pad to condition the polishing pad. A CMP system is also provided. | 01-22-2015 |
20150087144 | APPARATUS AND METHOD OF MANUFACTURING METAL GATE SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device includes providing a semiconductor substrate and forming a structure over the semiconductor substrate. The structure includes a sacrificial dielectric on the semiconductor substrate and a dummy gate over the sacrificial dielectric. The method further includes removing the dummy gate and the sacrificial dielectric from the structure thereby forming a trench. The method further includes filling a metal layer into the trench and covering over a top surface of an inter layer dielectric (ILD). The method also includes performing a chemical mechanical polishing (CMP) to expose the top surface of the ILD and heating the top surface of the ILD. Moreover, the method includes forming an etch stop layer on the top surface of the ILD. | 03-26-2015 |
20150111477 | Polishing Head, Chemical-Mechanical Polishing System, and Method for Polishing Substrate - A polishing head for a chemical-mechanical polishing system includes a carrier head, at least one electromagnetism actuated pressure sector and a membrane. The electromagnetism actuated pressure sector is disposed on the carrier head. The membrane covers the electromagnetism actuated pressure sector. | 04-23-2015 |
20150133033 | Platen Assembly, Chemical-Mechanical Polisher, and Method for Polishing Substrate - A platen assembly includes a platen body, a polishing pad, and a fountain slurry supplier. The platen body has an upper surface. The polishing pad is disposed on the upper surface of the platen body. The fountain slurry supplier is at least partially disposed on the upper surface of the platen body for supplying slurry up onto the polishing pad. | 05-14-2015 |
20150179432 | METHODS AND SYSTEMS FOR CHEMICAL MECHANICAL POLISH AND CLEAN - The present disclosure provides a method of fabricating a semiconductor device. The method includes providing a semiconductor structure including a metal gate (MG) layer formed to fill in a trench between two adjacent interlayer dielectric (ILD) regions; performing a chemical mechanical polishing (CMP) process using a CMP system to planarize the MG layer and the ILD regions; and cleaning the planarized MG layer using a O | 06-25-2015 |
20150200089 | Method For Metal Gate Surface Clean - The present disclosure provides a method for forming an integrated circuit (IC) structure. The method includes providing a metal gate (MG), an etch stop layer (ESL) formed on the MG, and a dielectric layer formed on the ESL. The method further includes etching the ESL and the dielectric layer to form a trench. A surface of the MG exposed in the trench is oxidized to form a first oxide layer on the MG. The method further includes removing the first oxide layer using a H | 07-16-2015 |
20150295063 | MECHANISM FOR FORMING METAL GATE STRUCTURE - A method for forming a semiconductor device is provided. The method includes providing a semiconductor substrate and forming a metal gate stack including a metal gate electrode over the semiconductor substrate. The method also includes applying an oxidizing solution containing an oxidizing agent over the metal gate electrode to oxidize the metal gate electrode to form a metal oxide layer on the metal gate electrode. | 10-15-2015 |
Patent application number | Description | Published |
20090027231 | PARKING INFORMATION SENSING DEVICE AND PROVIDING METHOD THEREOF - A parking information sensing device is disclosed. Each parking space in a parking lot is disposed with a parking information sensing device for detecting whether there is a car on the parking space. By means of a driving control circuit, the parking information sensing device drives a light emitting unit to emit a light and a reflecting element of the parking space is on a pathway of the light. The light is reflected by the reflecting element and then the reflected light passes an light sensing unit that detects the reflected light and generates a first sensing signal sent to the driving control circuit. Thus the driving control circuit judges there is no vehicle on the parking space. On the other hand, the judges there is a car on the parking space according to other sensing signal. Moreover, the parking information sensing device further includes a first transmitting/receiving unit that forms a wireless mesh network among parking information sensing devices. | 01-29-2009 |
20090072973 | PHYSICAL AUDIT SYSTEM WITH RADIO FREQUENCY IDENTIFICATION AND METHOD THEREOF - The present invention relates to a physical audit system with radio frequency identification (RFID) and a method thereof, which perform physical audit by means of RFID. First, a plurality of electronic tags is set in a physical system and all the physical units included in the physical system, respectively. The plurality of electronic tags records physical configuration data related to the physical system and the physical units, respectively. A radio-frequency writer unit writes the physical configuration data of a newer version according to the physical system and the physical units. Then, a radio-frequency reader unit reads the physical configuration data of the plurality of electronic tags, and transmits the physical configuration data to an integrated data processing device for analyzing and comparing the physical configuration data. It is judged if the physical configuration is identical to comparison data in the integrated data processing device. | 03-19-2009 |
20090140040 | ANTI-FAKE IDENTIFICATION SYSTEM AND METHOD CAPABLE OF AUTOMATICALLY CONNECTING TO WEB ADDRESS - This invention relates to an anti-fake identification system and method capable of automatically connecting to web address, in which an electronic tag of commodity is scanned by a reader device so as to read the identification code into the computer device; the identification code includes a web address of a remote maker to which the computer can automatically connect so as to transmit the identification code to the web address; a verifying device receives and verifies the identification code at the web address, and produce an authentication code according to the identification code after the identification code passes through verification so as to confirm the accuracy of the identification code. The method comprises the following steps of: reading an identification code of commodity; transmitting the identification code to the web address; verifying the identification code and generating an authentication code when the identification code is accurate. When the identification code is verified to be accurate according to the authentication code, the computer can keep consumer informed that the commodity passing through anti-fake verification is genuine, and that the user's manual and service information of the commodity can be understood. | 06-04-2009 |
20130051283 | Full-Duplex Wireless Voice Broadcasting Apparatus with Channel-Changing and Interference-Resistance - The present disclosure is a full-duplex wireless voice broadcasting apparatus. The apparatus is capable of channel-changing. Full-duplex (two-way) voice communication is achieved by using at least one receiving device and an emitting device. The receiving device has good mobility to be used as an emergent caller to the emitting device. The present disclosure has advantages in interference resistance, energy saving, short-distance emergent calling, and calling for help. | 02-28-2013 |
Patent application number | Description | Published |
20150131490 | Bidirectional Voice Transmission System and Method Thereof - The present invention relates to a bidirectional voice transmission system and a method thereof, wherein the system timing of the system is divided into three time slots for carrying a control signal, a broadcast voice signal and a mobile device voice signal. The bidirectional voice transmission system is able to carry out the signal transmission by way of frequency frogging, so as to effectively avoid the signal interference from occurring between any two different signal transmitting and receiving devices. Besides, all of the mobile devices can be added into the bidirectional voice transmission system by way of dynamic building, without using any specific communication interface. The most important is that, the number of node routers can be expanded to about 65,000 in order to apply the bidirectional voice transmission system in a huge range network communication or a wild rescue field. | 05-14-2015 |
20150133074 | Wireless Communication Locating Method - The present invention relates to a wireless communication locating method, the method uses a first wireless receiver, a second wireless receiver and a third wireless receiver (i.e., a first rescuer, a second and a third rescuer) to receive mayday and RSSI signals outputted by a person to be rescued, therefore the position of the person to be rescued can be precisely located after a backend signal-processing platform processes and calculates the mayday and RSSI signals. Through the method, each of rescuers are able to output a prompting signal to the person to be rescued by way of frequency synchronization, so as to give the person to be rescued hopes and a message that rescuers are coming. The method also includes the advantages of high damage resistance ability, high expansibility and can be easily operated, such that the purpose of immediate rescue can be achieved by using the method. | 05-14-2015 |
Patent application number | Description | Published |
20130307125 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package which includes: a semiconductor substrate having an upper surface and a lower surface; a device region or sensing region defined in the semiconductor substrate; a conducting pad located on the upper surface of the semiconductor substrate; at least two recesses extending from the upper surface towards the lower surface of the semiconductor substrate, wherein sidewalls and bottoms of the recesses together form a sidewall of the semiconductor substrate; a conducting layer electrically connected to the conducting pad and extending from the upper surface of the semiconductor substrate to the sidewall of the semiconductor substrate; and an insulating layer located between the conducting layer and the semiconductor substrate. | 11-21-2013 |
20140015111 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package which includes: a semiconductor substrate having a first surface and an opposite second surface; a device region disposed in the substrate; a dielectric layer located on the first surface of the semiconductor substrate; a plurality of conducting pads located in the dielectric layer and electrically connected to the device region; at least one alignment mark disposed in the semiconductor substrate and extending from the second surface towards the first surface. | 01-16-2014 |
20140054786 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - An embodiment of the invention provides a chip package including a semiconductor substrate having a first surface and a second surface opposite thereto. A conducting pad is located on the first surface. A side recess is on at least a first side of the semiconductor substrate, wherein the side recess extends from the first surface toward the second surface and across the entire length of the first side. A conducting layer is located on the first surface and electrically connected to the conducting pad, wherein the conducting layer extends to the side recess. | 02-27-2014 |
20140203387 | SEMICONDUCTOR CHIP PACKAGE AND METHOD FOR MANUFACTURING THEREOF - Disclosed herein is a semiconductor chip package, which includes a semiconductor chip, a plurality of vias, an isolation layer, a redistribution layer, and a packaging layer. The vias extend from the lower surface to the upper surface of the semiconductor chip. The vias include at least one first via and at least one second via. The isolation layer also extends from the lower surface to the upper surface of the semiconductor chip, and part of the isolation layer is disposed in the vias. The sidewall of the first via is totally covered by the isolation layer while the sidewall of the second via is partially covered by the isolation layer. The redistribution layer is disposed below the isolation layer and fills the plurality of vias, and the packaging layer is disposed below the isolation layer. | 07-24-2014 |
20140332908 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - A chip package including a chip is provided. The chip includes a sensing region or device region adjacent to an upper surface of the chip. A sensing array is located in the sensing region or device region and includes a plurality of sensing units. A plurality of first openings is located in the chip and correspondingly exposes the sensing units. A plurality of conductive extending portions is disposed in the first openings and is electrically connected to the sensing units, wherein the conductive extending portions extend from the first openings onto the upper surface of the chip. A method for forming the chip package is also provided. | 11-13-2014 |
20140332968 | CHIP PACKAGE - A chip package is provided. The chip package includes a chip having an upper surface, a lower surface and a sidewall. The chip includes a sensing region or device region and a signal pad region adjacent to the upper surface. A shallow recess structure is located outside of the signal pad region and extends from the upper surface toward the lower surface along the sidewall. The shallow recess structure has at least a first recess and a second recess under the first recess. A redistribution layer is electrically connected to the signal pad region and extends into the shallow recess structure. A first end of a wire is located in the shallow recess structure and is electrically connected to the redistribution layer. A second end of the wire is used for external electrical connection. A method for forming the chip package is also provided. | 11-13-2014 |
20140332969 | CHIP PACKAGE AND METHOD FOR FORMING THE SAME - A chip package including a chip having an upper surface, a lower surface and a sidewall is provided. The chip includes a signal pad region adjacent to the upper surface. A first recess extends from the upper surface toward the lower surface along the sidewall. At least one second recess extends from a first bottom of the first recess toward the lower surface. The first and second recesses further laterally extend along a side of the upper surface, and a length of the first recess extending along the side is greater than that of the second recess extending along the side. A redistribution layer is electrically connected to the signal pad region and extends into the second recess. A method for forming the chip package is also provided. | 11-13-2014 |
20140332983 | STACKED CHIP PACKAGE AND METHOD FOR FORMING THE SAME - A stacked chip package including a device substrate having an upper surface, a lower surface and a sidewall is provided. The device substrate includes a sensing region or device region, a signal pad region and a shallow recess structure extending from the upper surface toward the lower surface along the sidewall. A redistribution layer is electrically connected to the signal pad region and extends into the shallow recess structure. A wire has a first end disposed in the shallow recess structure and electrically connected to the redistribution layer, and a second end electrically connected to a first substrate and/or a second substrate disposed under the lower surface. A method for forming the stacked chip package is also provided. | 11-13-2014 |
20150097286 | CHIP PACKAGE AND METHOD FOR FABRICATING THE SAME - A chip package includes a packaging substrate, a semiconductor chip, and a plurality of conductive structures. The semiconductor chip has a central region and an edge region that surrounds the central region. The conductive structures are between the packaging substrate and the semiconductor chip. The conductive structures have different heights, and the heights of the conductive structures are gradually increased from the central region of the semiconductor chip to the edge region of the semiconductor chip, such that a distance between the edge region of the semiconductor chip and the packaging substrate is greater than a distance between the central region of the semiconductor chip and the packaging substrate. | 04-09-2015 |
20150179831 | SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF - A semiconductor structure includes a silicon substrate, a protection layer, an electrical pad, an isolation layer, a redistribution layer, a conductive layer, a passivation layer, and a conductive structure. The silicon substrate has a concave region, a step structure, a tooth structure, a first surface, and a second surface opposite to the first surface. The step structure and the tooth structure surround the concave region. The step structure has a first oblique surface, a third surface, and a second oblique surface facing the concave region and connected in sequence. The protection layer is located on the first surface of the silicon substrate. The electrical pad is located in the protection layer and exposed through the concave region. The isolation layer is located on the first and second oblique surfaces, the second and third surfaces of the step structure, and the tooth structure. | 06-25-2015 |
Patent application number | Description | Published |
20110078282 | Network device that downloads files using its ID code and method thereof - A network device that downloads files using its ID code and the corresponding method are disclosed. After the network device obtains its IP address, it generates a download command for downloading a target file corresponding to the device ID code. After transmitting the download command to a server, the network device receives the target file returned from the server. Therefore, the invention achieves the goal of automatically downloading a target file for the network device without manual operations. | 03-31-2011 |
20130054823 | APPLIANCE FOR PROCESSING A SESSION IN NETWORK COMMUNICATIONS - A session of network communications is processed between a client terminal and a server by intercepting a request generated from a network transport unit of the client terminal, generating an intermediate session ID for the client terminal, asking the server to establish a session, receiving a response sent from the server using a server session ID after the session is established, associating the server session ID with the intermediate session ID and sending the response to the network transport unit using the intermediate session ID. | 02-28-2013 |
20130055366 | DYNAMICALLY PROVIDING ALGORITHM-BASED PASSWORD/CHALLENGE AUTHENTICATION - Provided are a computer program product, method and system for dynamically providing algorithm-based password/challenge authentication. A page is generated including selectable conversion operators to enable generation of an algorithm that applies at least one selected conversion operator of the selectable conversion operators on a string to generate a password. A created algorithm created using the at least one selected conversion operator in the page is received. The created algorithm is associated with a username for use in authenticating access by a presenter of the username to a computer service. | 02-28-2013 |
20130055372 | DYNAMICALLY PROVIDING ALGORITHM-BASED PASSWORD/CHALLENGE AUTHENTICATION - Provided are a computer program product, method and system for dynamically providing algorithm-based password/challenge authentication. A page is provided to authenticate a presenter of a username including a string and a field for entry of a password. An entered password entered into the page is received. An algorithm associated with the username is applied to the string included in the page to generate a generated password. A determination is made as to whether the entered password matches the generated password. The username is successfully authenticated in response to determining that the entered password matches the generated password. | 02-28-2013 |
20140068771 | Transforming User-Input Data in Scripting Language - A mechanism for preventing injection attacks of scripting languages is provided. There is a mechanism of transforming user-input data in a scripting language included. The mechanism comprises a step of tracing a script instruction to separate instruction related variables and user-input related, variables; and a step of encoding the user-input related variables into data belonging to safe-character-set area which do not include reserved character, and passing the encoded user-input related variables to a statement of the script instruction. | 03-06-2014 |