Patent application number | Description | Published |
20090250365 | Toolbox - A toolbox is configured to store at least one hand-held tool in a forward leaning position. A front end portion of a tool main body and a rear end potion of a handle are supported by a seat portion of the toolbox. | 10-08-2009 |
20100129701 | Battery packs - One aspect according to the present invention includes a battery pack having a battery pack body. The battery pack body includes a finger engaging portion engageable with a finger or fingers of an operator in a removing direction of the battery pack body from a power tool. | 05-27-2010 |
20110079409 | POWER TOOL - It is an object of the invention to provide an effective technique for reducing the load of user's fingers in a power tool. A representative power tool includes a body, a tool bit, a driving means and a handgrip that extends from a grip proximal end on the side of the body to a grip distal end in a direction that crosses the axial direction of the tool bit. The power tool includes a holding optimization region that is arranged on the handgrip and shaped to match with the holding form of the fingers of the user when the user holds the handgrip. Specifically, the holding optimization region at least includes the rear end surface of the grip distal end region such that a normal on the rear end surface crosses an axis of the tool bit forward of the handgrip. As a result, according to the invention, the force of the user's fingers and palm on the handgrip can be optimized. | 04-07-2011 |
20140183075 | Tool Housing Case and Subcase - A tool housing case includes a main body case, for holding a power tool, for example, and an accessory case, for holding a power tool accessory, for example, which accessory case is connectable to the main body case on a handle side of the main body case near a main body case handle. The accessory case has an opening that can be selectively closed by a cover element. A space is provided between the handle and the accessory case for receiving a user's hand when the handle is gripped, and when a user's hand is not gripping the handle, this space allows access to the accessory case. | 07-03-2014 |
Patent application number | Description | Published |
20130069076 | NITRIDE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD FOR THE SAME - Provided is a nitride semiconductor device comprising a base substrate; a buffer layer formed above the base substrate; an active layer formed on the buffer layer; and at least two electrodes formed above the active layer. The buffer layer includes one or more composite layers that each have a plurality of nitride semiconductor layers with different lattice constants, and at least one of the one or more composite layers is doped with carbon atoms and oxygen atoms in at least a portion of a carrier region of the nitride semiconductor having the largest lattice constant among the plurality of nitride semiconductor layers, the carrier region being a region in which carriers are generated due to the difference in lattice constants between this nitride semiconductor layer and the nitride semiconductor layer formed directly thereon. | 03-21-2013 |
20130306979 | SEMICONDUCTOR SUBSTRATE AND SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF SEMICONDUCTOR SUBSTRATE - A GaN-based semiconductor is epitaxially grown on a silicon substrate with a surface orientation of (111). The difference between the lattice constant of the GaN and the silicon (111) surface is approximately 17%, which is quite large. Therefore, the dislocation density of the grown GaN exceeds 10 | 11-21-2013 |
20130307023 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Provided is a semiconductor device that has a buffer layer with which a dislocation density is decreased. The semiconductor device includes a substrate, a buffer region formed over the substrate, an active layer formed on the buffer region, and at least two electrodes formed on the active layer. The buffer region includes at least one composite layer in which a first semiconductor layer having a first lattice constant, a second semiconductor layer having a second lattice constant that is different from the first lattice constant and formed in contact with the first semiconductor layer, and a third semiconductor layer having a third lattice constant that is between the first lattice constant and the second lattice constant are sequentially laminated. | 11-21-2013 |
20130307024 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE - Provided is a semiconductor device that includes a substrate, a first buffer region formed over the substrate, a second buffer region formed on the first buffer region, an active layer formed on the second buffer region, and at least two electrodes formed on the active layer. The first buffer region includes at least one composite layer in which a first semiconductor layer and a second semiconductor layer are sequentially stacked. The second buffer region in includes at least one composite layer in which a third semiconductor layer, a fourth semiconductor layer, and a fifth semiconductor layer are sequentially stacked. The fourth lattice constant has a value between the third lattice constant and the fifth lattice constant. | 11-21-2013 |
Patent application number | Description | Published |
20090200645 | SEMICONDUCTOR ELECTRONIC DEVICE - A semiconductor electronic device comprises a substrate; a buffer layer formed on the substrate, the buffer layer including not less than two layers of composite layer in which a first semiconductor layer formed of a nitride-based compound semiconductor layer having a lattice constant smaller than a lattice constant of the substrate and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate and a second semiconductor layer formed of a nitride-based compound semiconductor having a lattice constant smaller than a lattice constant of the first semiconductor layer and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate are alternately laminated; an intermediate layer provided between the substrate and the buffer layer, the intermediate layer being formed of a nitride-based compound semiconductor having a lattice constant smaller than a lattice constant of the first semiconductor layer and a thermal expansion coefficient larger than a thermal expansion coefficient of the substrate; and a semiconductor active layer formed on the buffer layer, the semiconductor active layer being formed of a nitride-based compound semiconductor, wherein: thicknesses of the first semiconductor layers in the buffer layer are non-uniform thereamong, and at least one of the first semiconductor layer has a thickness greater than a critical thickness, the critical thickness being a thickness above which a direction of warp caused by the first semiconductor layer to the substrate is inverted. | 08-13-2009 |
20100078678 | SEMICONDUCTOR ELECTRONIC DEVICE AND METHOD OF MANUFACTURING THE SAME - A semiconductor electronic device comprises a substrate; a buffer layer formed on said substrate, having two or more layers of composite layers in which a first semiconductor layer comprising nitride based compound semiconductor having smaller lattice constant and greater coefficient of thermal expansion than the substrate and a second semiconductor layer comprising nitride based compound semiconductor having smaller lattice constant and greater coefficient of thermal expansion than the first semiconductor layer are alternately laminated; a semiconductor operating layer comprising nitride based compound semiconductor formed on said buffer layer; a dislocation reducing layer comprising nitride based compound semiconductor, formed in a location between a location directly under said buffer layer and inner area of said semiconductor operating layer, and comprising a lower layer area and an upper layer area each having an uneven boundary surface, wherein threading dislocation extending from the lower layer area to the upper layer area is bent at said boundary surface. | 04-01-2010 |
20100213577 | SEMICONDUCTOR ELECTRONIC DEVICE AND PROCESS OF MANUFACTURING THE SAME - A semiconductor electronic device comprises a substrate; a buffer layer that comprises composite laminations of which a first semiconductor layer, that is formed of a compound semiconductor of a nitride system, that has a lattice constant to be as smaller than that of such the substrate, and that has a coefficient of thermal expansion to be as larger than that of such the substrate, and a second semiconductor layer that is formed of a compound semiconductor of a nitride system are formed as alternately on to such the substrate; a semiconductor operation layer that is formed of a compound semiconductor of a nitride system and that is formed on to such the buffer layer; and a dislocation reduction layer, which comprises a lower layer region and an upper layer region that are formed at any location at an inner side of such the buffer layer and that comprise an interface of a concave and convex shape therebetween, at which a threading dislocation that draws from such the lower layer region toward such the upper layer region is bending at such the interface, wherein such the second semiconductor layer is comprised of a laminated layers as alternately of a third semiconductor layer that has a lattice constant to be as smaller than that of such the substrate and that has a coefficient of thermal expansion to be as larger than that of such the substrate, and of a fourth semiconductor layer that has a lattice constant to be as smaller than that of such the third semiconductor layer and that has a coefficient of thermal expansion to be as larger than that of such the substrate, and an average of such the lattice constants in the second semiconductor layer is to be smaller than that of such the first semiconductor layer, and an average of such the coefficients of thermal expansion in the second semiconductor layer is to be as larger than that of such the substrate. | 08-26-2010 |
20100244101 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - There is provided a method for fabricating a semiconductor device capable of setting carbon concentration within crystal to a desirable value while improving electron mobility. The carbon concentration within a buffer layer is controlled by introducing material gas of hydrocarbon or organic compounds containing carbon such as propane as a dopant in forming the buffer layer by introducing trimethylgallium (TMGa) and ammonium (NH | 09-30-2010 |
20110241017 | FIELD EFFECT TRANSISTOR - A field effect transistor includes: a buffer layer that is formed on a substrate; a high resistance layer or a foundation layer that is formed on the buffer layer; a carbon-containing carrier concentration controlling layer that is formed on the high resistance layer or the foundation layer; a carrier traveling layer that is formed on the carrier concentration controlling layer; a carrier supplying layer that is formed on the carrier traveling layer; a recess that is formed from the carrier supplying layer up to a predetermined depth; source/drain electrodes that are formed on the carrier supplying layer with the recess intervening therebetween; a gate insulating film that is formed on the carrier supplying layer so as to cover the recess; and a gate electrode that is formed on the gate insulating film in the recess | 10-06-2011 |
20110241088 | FIELD EFFECT TRANSISTOR, METHOD OF MANUFACTURING FIELD EFFECT TRANSISTOR, AND METHOD OF FORMING GROOVE - A field effect transistor includes a high resistance layer on a substrate, a semiconductor operation layer that is formed on the high resistance layer and includes a channel layer that has the carbon concentration of not more than 1×10 | 10-06-2011 |