Patent application number | Description | Published |
20110058973 | MOTOR-DRIVEN COMPRESSOR - A motor-driven compressor includes a compression mechanism, an electric motor, a compressor housing, a conductive member, a terminal base, an insulating member, a connection terminal, a wire assembly, a terminal housing, first and second holes formed through the terminal housing and first and second seal members. The conductive member extends from the inside to the outside of the compressor housing and connected electrically to the connection terminal at a terminal connection. The wire assembly has a core wire connecting electrically between the connecting terminal and the electric motor, and an insulator covering the core wire. The terminal housing disposed in the compressor housing covers the terminal connection. The wire assembly has an insulating tube covering the insulator, wherein both ends of the insulating tube are opened for communicating with the inside and the outside of the terminal housing through a clearance formed between the insulating tube and the insulator. | 03-10-2011 |
20120087811 | MOTOR-DRIVEN COMPRESSOR - A motor-driven compressor includes a shell, an electric motor, a first conductor electrically connected to an external power source, a second conductor electrically connected to the electric motor, a connector connecting the first conductor and the second conductor and a connector case. The connector case has a first case member, a second case member, a first and a second seal members interposed between the first and the second case members, a hole through which the first conductor is inserted and a third seal member sealing between the first conductor and the connector case. A first main seal of the first seal member and a second main seal of the second seal member cooperate to form a cylindrical seal portion for sealing the second conductor that is inserted through the cylindrical seal portion when the first and the second seal members are joined. | 04-12-2012 |
20130189091 | MOTOR-DRIVEN COMPRESSOR AND METHOD FOR MANUFACTURING THE SAME - A motor-driven compressor includes an electric motor having a stator core, a compression mechanism driven by the electric motor, a motor housing accommodating the electric motor, and a cluster block engaged with the stator core in the motor housing. The stator core of the electric motor and the motor housing are assembled by shrink fit. The cluster block accommodates a connecting terminal for electrical connection between a conductor connected to a motor drive circuit and a lead wire drawn from the electric motor. The cluster block has a terminal hole for receiving the connecting terminal and has an opening that is provided separately from the terminal hole. | 07-25-2013 |
Patent application number | Description | Published |
20090089786 | SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE FOR REAL-TIME PROCESSING - A technology capable of efficiently performing the processes by using limited resources in an LSI where a plurality of real-time applications are parallelly processed is provided. To provide such a technology, a mechanism is provided in which a plurality of processes to be executed on a plurality of processing units in an LSI are managed throughout the LSI in a unified manner. For each process to be managed, a priority is calculated based on the state of progress of the process, and the execution of the process is controlled according to the priority. A resource management unit IRM or program that collects information such as a process state from each of the processing units executing the processes and calculates a priority for each process is provided. Also, a programmable interconnect unit and storage means for controlling a process execution sequence according to the priority are provided. | 04-02-2009 |
20090113186 | MICROCONTROLLER AND CONTROLLING SYSTEM - A microcontroller and a controlling system having the same are provided, in which the increase in the program code for performing floating-point arithmetic, in particular, the increase in the amount of code due to a variable are suppressed, and the processing overhead for converting fixed-point data into floating-point data is reduced. The microcontroller includes a floating-point converter which inputs integer data and corresponding decimal point position data as fixed-point data and which converts the input data into floating-point data by acquiring a fraction part, an exponent part, and a sign of the floating type from the input data, and a floating-point arithmetic logic unit which receives the output of the floating-point converter and calculates the floating-point data. The floating-point converter acquires the exponent part by performing addition and subtraction of the decimal point position data and the shift amount of the fraction part to the integer data. | 04-30-2009 |
20090271576 | DATA PROCESSOR - There is a need for providing a data processor capable of easily prefetching data from a wide range. A central processing unit is capable of performing a specified instruction that adds an offset to a value of a register to generate an effective address for data. This register can be assigned an intended value in accordance with execution of an instruction. A buffer maintains part of instruction streams and data streams stored in memory. The buffer includes cache memories for storing the instruction stream and the data stream. From the memory, the buffer prefetches a data stream containing data corresponding to an effective address designated by the specified instruction stored in the cache memory. A data prefetch operation is easy because a data stream is prefetched by finding the specified instruction from the fetched instruction stream. Data can be prefetched from a wider range than the use of a PC-relative load instruction. | 10-29-2009 |
20100064106 | DATA PROCESSOR AND DATA PROCESSING SYSTEM - The present invention provides a data processor capable of automatically discriminating a loop program and performing a reduction in power by size-variable lock control on an instruction buffer. The instruction buffer of the data processor includes a buffer controller for controlling a memory unit that stores each fetched instruction therein. When an execution history of a fetched condition branch instruction suggests condition establishment, and in the case that the branch direction of the fetched condition branch instruction is a direction opposite to the order of an instruction execution and the difference of instruction addresses from the branch source to the branch target based on the condition branch instruction is a range held in the storage capacity of the instruction buffer, the buffer controller retains an instruction sequence from a branch source to a branch target based on the condition branch instruction in the instruction buffer. While the instruction execution of the instruction sequence retained therein is repeated, the buffer controller supplies the corresponding instruction of the instruction sequence from the instruction buffer to the instruction decoder and releases retention of the instruction sequence when the instruction execution is exited from the instruction sequence. | 03-11-2010 |
20100251017 | Soft error processing for multiprocessor - The data processor having CPUs each capable of accessing memories enables the processing of a memory error according to the processing mode of the data processor. The CPUs have a memory, and each include a first storing unit capable of storing CPU-identifying information which enables identification of CPU having accessed the memory. At the time of occurrence of a soft error owing to access to the memory, the CPU, having the memory, stores the CPU-identifying information for identifying the CPU having accessed the corresponding memory in the first storing unit, and notifies the interrupt controller of occurrence of a soft error of the memory. After having received an interruption of the memory soft error from the interrupt controller, the CPU uses information stored in the first storing unit to identify the CPU having made the access, and performs the error processing. | 09-30-2010 |
20110006792 | METHOD OF ON-CHIP CURRENT MEASUREMENT AND SEMICONDUCTOR IC - A semiconductor integrated circuit is constituted to include a circuit block having a predetermined function, a power switch capable of supplying an operating power to the circuit block, and a current measuring circuit for obtaining a current flowing to the circuit block based on a voltage between terminals of the power switch in a state in which the power switch is turned on and an on-resistance of the power switch. The current flowing to the circuit block is obtained based on the voltage between terminals of the power switch in the state in which the power switch is turned on and the on-resistance of the power switch. Thus, it is possible to measure a current of the circuit block in a state in which a chip is normally operated. | 01-13-2011 |
20110055435 | DATA PROCESSOR - The data processor provides an access protection with higher reliability during data transfer control according to a transfer condition set by CPU. The data processor has: CPU; a memory management section operable to control data transfer by CPU; and a transfer controller operable to control data transfer. The transfer controller holds identification information which the memory management section uses for access protection. When producing an address for transfer according to the setting of CPU, the transfer controller starts data transfer on condition that the identification information corresponding to the address for transfer matches the identification information of CPU at the setting of a transfer condition, etc. | 03-03-2011 |
20110238883 | INFORMATION PROCESSING DEVICE - An information processing device is provided, in which a bit operation is performed without degradation in performance of a bus. An information processing device includes a CPU which fetches and executes an instruction, and a peripheral module which includes internally a register rewritable by the CPU, and is coupled to the CPU via a bus. The CPU has a function of issuing a bus command for commanding a bitwise write operation to the register comprised in the peripheral module, in order to execute a bit operation command fetched. When the bus command is issued, the peripheral module executes a bitwise write operation for the register. Since the CPU does not need to lock the bus after the bus command is issued, a bit operation can be performed without degradation in performance of the bus. | 09-29-2011 |
20120254881 | PARALLEL COMPUTER SYSTEM AND PROGRAM - There is provided a parallel computer system for performing barrier synchronization using a master node and a plurality of worker nodes based on the time to allow for an adaptive setting of the synchronization time. When a task process in a certain worker node has not been completed by a worker determination time, the particular worker node performs a communication to indicate that the process has not been completed, to a master node. When the communication has been received by a master determination time, the master node performs a communication to indicate that the process time is extended by a correction process time, in order to adjust and extend the synchronization time. In this way, it is possible to reduce the synchronization overhead associated with the execution of an application with a relatively large variation in the process time from a synchronization point to the next synchronization point. | 10-04-2012 |
Patent application number | Description | Published |
20090135481 | POLARIZER, PROJECTION LENS SYSTEM, EXPOSURE APPARATUS AND EXPOSING METHOD - The directions of amplitude of polarized light passing through a polarizer are concentric around a position. The polarizer is disposed on the surface of a pupil such that the position lies exactly on the center of the surface of the pupil. Rays of luminous flux of illumination light converted into polarized light by the polarizer are converged onto a wafer with concentric planes of polarization with respect to an optical axis. The illumination light is therefore incident on a photoresist as s-polarized light. Thus, the amount of light entering the photoresist is less likely to depend upon the angle of incidence. Consequently, the contrast of an optical image formed in the photoresist is improved, and hence, resolution characteristics are improved. | 05-28-2009 |
20100108201 | HIGH-STRENGTH HOT ROLLED STEEL SHEET BEING FREE FROM PEELING AND EXCELLENT IN SURFACE PROPERTIES AND BURRING PROPERTIES, AND METHOD FOR MANUFACTURING THE SAME - This hot rolled steel contains, in terms of mass %, C: 0.01 to 0.1%, Si: 0.01 to 0.1%, Mn: 0.1 to 3%, P: not more than 0.1%, S: not more than 0.03%, Al: 0.001 to 1%, N: not more than 0.01%, Nb: 0.005 to 0.08%, and Ti: 0.001 to 0.2%, with a remainder being iron and unavoidable impurities, wherein a formula: [Nb]×[C]≦4.34×10 | 05-06-2010 |
20100229401 | Rotary cutter for mower | 09-16-2010 |
20110005185 | ROTARY CUTTER FOR MOWER - A rotary cutter for a mower has a cord for cutting grass and the like by rotating itself; a reel for housing the cord and feeding the cord while intermittently rotating; a case for housing the reel; a cover for covering the case; and a pressing body protruding from the case. The pressing body is axially movable by being pressed, and intermittently rotating the reel. The reel and the pressing body are integrally constructed. Concave grooves for inserting the cord are provided in the reel in a radial direction and the cord is wound by fitting it to the concave grooves. | 01-13-2011 |
20120131805 | ROTARY CUTTER FOR MOWER - A rotary cutter for a mower has a cord for cutting grass and the like by rotating itself; a reel for housing the cord and feeding the cord while intermittently rotating; a case for housing the reel; a cover for covering the case; and a pressing body protruding from the case. The pressing body is axially movable by being pressed, and intermittently rotating the reel. The reel and the pressing body are integrally constructed. Concave grooves for inserting the cord are provided in the reel in a radial direction and the cord is wound by fitting it to the concave grooves. | 05-31-2012 |
20130247860 | RECOIL STARTER - To provide a recoil starter which is provided with a ratchet member smoothly sliding on an inner peripheral surface of a drive pulley and capable of being manufactured at a low cost. A recoil starter is provided with a circular cross section ratchet member rotatably mounted on a shaft hole. The ratchet member is configured by: a rotary shaft portion inserted into the shaft hole; an arm portion bent at a substantially right angle and extending from the rotary shaft portion; and a distal end portion bent parallel to the rotary shaft portion and extending from the arm portion. The ratchet member rotates upon rotation of a rope reel in an engine start direction, engages with a drive pulley by the rotation, and transmits torque of the rope reel to the drive pulley. | 09-26-2013 |
Patent application number | Description | Published |
20100299425 | LICENSE TRANSFER SYSTEM, LICENSE TRANSFER METHOD, AND LICENSE TRANSFER PROGRAM - The first image forming apparatus is the image forming apparatus for the license transfer source. The second image forming apparatus is the transfer destination image forming apparatus to which a license is transferred. The license management apparatus centrally manages the issue status and the like of a license for an application to be installed on each image forming apparatus. The registration of the license to the license management apparatus is performed by the application seller through the sales company system and the like. The device management apparatus has the function of collecting, accumulating, processing the information of the image forming apparatus to be managed and the information indicating the operating state thereof, and externally providing a warning and the like. The distribution/transfer management apparatus manages the license/application to be distributed/transferred, and the state of distribution/transfer processing for the license/application. | 11-25-2010 |
20110157638 | INFORMATION PROCESSING APPARATUS CAPABLE OF DISPLAYING OPERATION SCREEN PROVIDED BY SERVER, METHOD OF CONTROLLING THE INFORMATION PROCESSING APPARATUS, AND STORAGE MEDIUM - An information processing apparatus which makes it possible to display respective pieces of information both on operation screens of an image processing apparatus and the information processing apparatus in a mutually-related manner. A print control apparatus as the information processing apparatus is connected to an MFP via a local network and to a web server via a LAN. The print control apparatus analyzes a first operation screen request from the MFP to thereby determine whether or not it is required to update an operation screen displayed on the print control apparatus. If it is required to update the operation screen, the print control apparatus generates a second operation screen request for requesting an operation screen to be displayed thereon, and transmits the second operation screen request. Further, the print control apparatus transfers the first operation screen request to the web server. | 06-30-2011 |
20110238823 | COMMUNICATION APPARATUS, CONTROL METHOD THEREOF, AND STORAGE MEDIUM - An apparatus receives and analyzes a packet transmitted via a network, and performs network setting according to data included in the packet. Further, if it is determined that the received packet is a packet addressed to the apparatus and is not a setting packet for the network setting, the apparatus is controlled not to analyze the packet. | 09-29-2011 |
20120005579 | INFORMATION PROCESSING APPARATUS, CONTROL METHOD THEREOF, AND PROGRAM - An information processing apparatus is provided. The apparatus includes a Web browser which can hold a plurality of items of screen data provided by a Web server, and can selectively display one of a plurality of screens each of which corresponds to one of the plurality of items of screen data on a foreground of the Web browser. In the apparatus, a control unit controls, based on a definition included in the screen data, a state of a device provided with the apparatus. A recognition unit recognizes a screen which is being displayed on the foreground of the Web browser. The control unit controls the state of the device based on the definition included in the screen data which corresponds to the screen recognized by the recognition unit. | 01-05-2012 |
20120260350 | INFORMATION PROCESSING APPARATUS AND METHOD OF CONTROLLING THE SAME - An information processing apparatus of this invention displays an operation window which allows selection of any of multiple applications. Each of the applications includes multiple functions with use authorization being set for each of the functions. The information processing apparatus displays, upon accepting selection of a specific application having some of the multiple functions for which use authorization which requires authentication of a user is set, an authentication window for authentication of the user. The authentication window allows use of the specific application to be selected without authentication of the user, by permitting use of a function, of the multiple function of the specific application, for which use authorization requiring no authentication of the user is set. | 10-11-2012 |
20120327465 | INFORMATION PROCESSING APPARATUS, CONTROL METHOD THEREFOR, AND STORAGE MEDIUM STORING PROGRAM - The invention acquires a destination corresponding to a group to which an authenticated user belongs by searching a user management unit configured to manage a plurality of destinations respectively corresponding to a plurality of users and information of a group to which each of the plurality of users belongs, and sets to transmit data to the acquired destination. | 12-27-2012 |
20130301068 | IMAGE PROCESSING DEVICE, CONTROL METHOD FOR THE SAME, AND PROGRAM - An object of the present invention is to control a Reprint function/Resend function so as not to confuse a user of an image processing device in a case where a job complete delete function is enabled. An image processing device having a reperform function to reperform an already-performed job and a delete function to delete data used in an already-performed job by overwriting the data used in the already-performed job by real data, the image processing device including a job security setting unit configured to set whether to enable the delete function, and in the case where the delete function is set to be enabled by the job security setting unit, the already-performed job is not reperformed by the reperform function. | 11-14-2013 |
20140337970 | IMAGE PROCESSING APPARATUS THAT PERFORMS USER AUTHENTICATION, AUTHENTICATION METHOD THEREFOR, AND STORAGE MEDIUM - An image processing apparatus capable of an authentication technique which enables appropriate user authentication on an application-by-application basic without requiring users to perform time-consuming operations. A storage unit stores authentication method setting information in which authentication methods for respective ones of a plurality of applications are set. An authentication method determination unit determines an authentication method for use in authentication to be performed before a selected application is executed, based on the authentication method setting information. An authentication unit performs the authentication using the authentication method determined by the authentication method determination unit. The authentication methods include at least a first authentication method that does not require input of authentication information and a second authentication method that requires input of the authentication information. | 11-13-2014 |
Patent application number | Description | Published |
20080203465 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME - The present invention provides a method for manufacturing a semiconductor device including the steps of forming a flash memory cell provided with a floating gate, an intermediate insulating film, and a control gate, forming first and second impurity diffusion regions, thermally oxidizing surfaces of a silicon substrate and the floating gate, etching a tunnel insulating film in a partial region through a window of a resist pattern; forming a metal silicide layer on the first impurity diffusion region in the partial region, forming an interlayer insulating film covering the flash memory cell, and forming, in a first hole of the interlayer insulating film, a conductive plug connected to the metal silicide layer. | 08-28-2008 |
20090180741 | OPTICAL TRANSMITTING/RECEIVING APPARATUS - An optical transmitting/receiving apparatus capable of suppressing electrical crosstalk and magnetic crosstalk, includes: a laser diode/photo diode (LD/PD) integrated module that terminates a single-core bidirectional optical fiber; a circuit board electrically connected to a lead pin led out of the LD/PD integrated module; and a plastic case that accommodates the circuit board. At least a part of the plastic case abuts against the LD/PD integrated module, and impedance of the plastic case is controlled by mixing a conductive filler into the plastic case. | 07-16-2009 |
20090196617 | SINGLE CORE BIDIRECTIONAL OPTICAL DEVICE - A single core bidirectional optical device having a light emitting element that is provided on the terminal of one optical fiber and makes light incident to the optical fiber, and a light receiving element for receiving light of the optical fiber, comprises a wavelength multiplexing/demultiplexing coupler that is provided on an optical axis of light incident to and emitted from the optical fiber and includes therein wavelength separating film for separating the light to light of one side and light of another side for every wavelength; a light emitting element provided on the direction of the light of the one side which is separated by the wavelength multiplexing/demultiplexing coupler; and a light receiving element provided on the direction of the light of the other side which is separated by the wavelength multiplexing/demultiplexing coupler. | 08-06-2009 |
20090271591 | VECTOR SIMD PROCESSOR - A data processor whose level of operation parallelism is enhanced by composing floating-point inner product execution units to be compatible with single instruction multiple data (SIMD) and thereby enhancing the operation processing capability is made possible. An operating system that can significantly enhance the level of operation parallelism per instruction while maintaining the efficiency of the floating-point length-4 vector inner product execution units is to be implemented. The floating-point length-4 vector inner product execution units are defined in the minimum width (32 bits for single precision) even where an extensive operating system becomes available, and compose the inner product execution units to be compatible with SIMD. The mutually augmenting effects of the inner product execution units and SIMD-compatible composition enhances the level of operation parallelism dramatically. Composition of the floating-point length-4 vector inner product execution units to calculate the sum of the inner product of length-4 vectors and scalar to be compatible with SIMD of four in parallel results in a processing capability of 32 FLOPS per cycle. | 10-29-2009 |
20130005098 | SEMICONDUCTOR DEVICE HAVING A CONTACT PLUG CONNECTING TO A SILICIDE FILM FORMED ON A DIFFUSION REGION OF A FLASH MEMORY CELL - A method for manufacturing a semiconductor device includes the steps of forming a flash memory cell provided with a floating gate, an intermediate insulating film, and a control gate, forming first and second impurity diffusion regions, thermally oxidizing surfaces of a silicon substrate and the floating gate, etching a tunnel insulating film in a partial region through a window of a resist pattern; forming a metal silicide layer on the first impurity diffusion region in the partial region, forming an interlayer insulating film covering the flash memory cell, and forming, in a first hole of the interlayer insulating film, a conductive plug connected to the metal silicide layer. | 01-03-2013 |
20130166878 | VECTOR SIMD PROCESSOR - Operation parallelism of a data processor is enhanced by floating-point inner product execution units compatible with single instruction multiple data (SIMD). An operating system that can significantly enhance the level of operation parallelism per instruction while maintaining efficiency of floating-point length-4 vector inner product execution units is implemented. The floating-point length-4 vector inner product execution units are defined in the minimum width (32 bits for single precision) even where an extensive operating system becomes available, and compose the inner product execution units to be compatible with SIMD. The mutually augmenting effects of the inner product execution units and SIMD-compatible composition enhances the level of operation parallelism dramatically. Composition of the floating-point length-4 vector inner product execution units to calculate the sum of the inner product of length-4 vectors and scalar to be compatible with SIMD of four in parallel results in a processing capability of 32 FLOPS per cycle. | 06-27-2013 |