Patent application number | Description | Published |
20090003026 | SEMICONDUCTOR MEMORY DEVICE - A semiconductor memory device includes a plurality of banks, each of which is constituted of a plurality of memory cell arrays that are aligned in series in the longitudinal direction, wherein each memory cell array includes a plurality of memory cells, and wherein memory cell arrays of banks are collectively aggregated into a plurality of blocks, each of which includes memory cell arrays aligned in the perpendicular direction, in connection with a plurality of DQ pads. DQ pads are arranged in proximity to blocks. Substantially the same distance is set between memory cells and DQ pads so as to reduce dispersions in access times with respect to all DQ pads, thus achieving high-speed access in the semiconductor memory device. The wiring region of IO lines is reduced in the center area of the chip. | 01-01-2009 |
20090003107 | SEMICONDUCTOR DEVICE - A semiconductor device includes a column decoder that generates a column selecting signal that selects any of a plurality of bit line pairs to which memory cells are connected according to a column address that is input; a bit line selecting switch that connects by the column selecting signal any of a plurality of bit line pairs and a data I/O line pair that outputs data that has been read from a memory cell to the outside; a data amplifier that amplifies a voltage differential of a data I/O line pair and outputs data that has been read to an output buffer; a data I/O line switch that is provided in the data I/O lines; an I/O line precharge circuit that precharges a data I/O line pair that is not on the side of the data amplifier; and an amplifier precharge circuit that precharges a data I/O line pair that is on the side of the data amplifier. | 01-01-2009 |
20130033916 | SEMICONDUCTOR DEVICE HAVING PLURAL CIRCUIT BLOCKS THAT OPERATE THE SAME TIMING - Disclosed herein is a device that includes first and second ports arranged in a first direction and first and second circuits arranged between the first and second ports. The first and second ports are coupled to the first and second circuits, respectively. The first and second circuits include first and second sub circuits that control an operation timing thereof based on a timing signal, respectively. The control signal is transmitted through a control line extending in a second direction. Distances between the control line and the first and second sub circuits in the first direction are the same as each other. A coordinate of the control line in the first direction is different from an intermediate coordinate between coordinates of the first and second ports in the first direction. | 02-07-2013 |
Patent application number | Description | Published |
20090168572 | SEMICONDUCTOR MEMORY - In a semiconductor memory having a plurality of memory banks that can be independently accessed, remedying bit registers that are substituted for defective memory cells are respectively provided for memory banks in a one-to-one relationship. Also, means for sharing the plurality of remedying bit registers in each memory bank is arranged. | 07-02-2009 |
20100244960 | DIFFERENTIAL AMPLIFIER CIRCUIT - A differential amplifier circuit includes a plurality of differential-pair transistors, a plurality of current addition transistors, a latch, and a control transistor. The differential-pair transistors have gate electrodes that receive differential input signals respectively. Different potentials of the differential input signals represent a piece of information. The current addition transistors are connected in parallel to the differential-pair transistors, respectively. The latch has differential outputs corresponding to the differential input signals respectively and related to the amplified data. The control transistor receives an activation initiation signal. The current addition transistors are transitioned into electrically conductive state either in a period of time from initiation of amplification operation of the differential amplifier circuit by transitioning the control transistor into an electrically conductive state to increasing a differential voltage to cause inversion of one of the differential outputs of the latch, or at the same time when the amplification operation is initiated. | 09-30-2010 |
20100327954 | SEMICONDUCTOR DEVICE - A semiconductor device includes internal voltage generating circuits, a switching circuit, load circuits, a control circuit. Each of the plurality of load circuits is supplied with voltage through the switching circuit from any one of the plurality of internal voltage generating circuits. The control circuit defines connecting combinations by the switch circuit. The control circuit supplies a control signal to the switch circuit, based on the control signal corresponding to the definitions of the connecting combinations. The control circuit allows switching the connecting combinations when the semiconductor device tests in a test mode. The control circuit prohibits switching the connecting combinations in a non-test mode. The switch circuit connects between each of m of the internal voltage generating circuits and each of n of the load circuits through a connecting combination which is selected, based on the control signal, from m | 12-30-2010 |
20110044120 | SEMICONDUCTOR DEVICE - A semiconductor device includes a data transmission line and a data transmission line precharge circuit. The data transmission line precharge circuit sets a precharge potential of the data transmission line to a first potential at the time of a first write mode in which data masking is not performed. The data transmission line precharge circuit sets the precharge potential to a potential different from the first potential at the time of a second write mode in which data masking is performed. When data masking is not carried out, precharging to a potential at which data can be written in excellent fashion can be performed. When data masking is carried out, precharging to a potential that inhibits a fluctuation in bit-line potential can be performed. | 02-24-2011 |
20110298493 | VOLTAGE LEVEL SHIFT CIRCUIT AND SEMICONDUCTOR DEVICE - A voltage level shift circuit in which a difference in response characteristic depending on the signal level of an input signal is suppressed. The voltage level shift circuit generates an output signal VOUT having a voltage amplitude different from that of the input signal. An inverter INV | 12-08-2011 |
20150069519 | SEMICONDUCTOR DEVICE - A semiconductor device includes a first transistor having a gate, a source/drain and a drain/source coupled to a first node, a first power and the first node, respectively; a second transistor having a gate, a source/drain and a drain/source coupled to the first node, the first power and a third node, respectively; a third transistor having a gate, a source/drain and a drain/source coupled to a reference, a second node and the first node, respectively; a fourth transistor having a gate, a source/drain and a drain/source coupled to an input, the second node and the third node, respectively; a fifth transistor having a gate, a source/drain and a drain/source coupled to the first node, a second power and the second node, respectively; and a sixth transistor having a gate, a source/drain and a drain/source coupled to the reference, the second power and the second node, respectively. | 03-12-2015 |
Patent application number | Description | Published |
20110056596 | HIGH STRENGTH AND HIGH THERMAL CONDUCTIVITY COPPER ALLOY TUBE AND METHOD FOR PRODUCING THE SAME - A high strength and high thermal conductivity copper alloy tube contains: Co of 0.12 to 0.32 mass %; P of 0.042 to 0.095 mass %; and Sn of 0.005 to 0.30 mass %, wherein a relationship of 3.0≦([Co]−0.007)/([P]−0.008)≦6.2 is satisfied between a content [Co] mass % of Co and a content [P] mass % of P, and the remainder includes Cu and inevitable impurities. Even when a temperature is increased by heat generated by a drawing process, a recrystallization temperature is increased by uniform precipitation of a compound of Co and P and by solid-solution of Sn. Thus, the generation of recrystallization nucleuses is delayed, thereby improving heat resistance and pressure resistance of the high strength and high thermal conductivity copper alloy tube. | 03-10-2011 |
20110100676 | HIGH STRENGTH AND HIGH CONDUCTIVITY COPPER ALLOY ROD OR WIRE - A high strength and high conductivity copper rod or wire includes Co of 0.12 to 0.32 mass %, P of 0.042 to 0.095 mass %, Sn of 0.005 to 0.70 mass %, and O of 0.00005 to 0.0050 mass %. A relationship of 3.0≦([Co]−0.007)/([P]−0.008)≦6.2 is satisfied between a content [Co] mass % of Co and a content [P] mass % of P. The remainder includes Cu and inevitable impurities, and the rod or wire is produced by a process including a continuous casting and rolling process. Strength and conductivity of the high strength and high conductivity copper rod or wire are improved by uniform precipitation of a compound of Co and P and by solid solution of Sn. The high strength and high conductivity copper rod or wire is produced by the continuous casting and rolling process, and thus production costs are reduced. | 05-05-2011 |
20110174417 | HIGH STRENGTH AND HIGH CONDUCTIVITY COPPER ALLOY PIPE, ROD, OR WIRE - A high strength and high conductivity copper alloy pipe, rod, or wire is composed of an alloy composition containing 0.13 to 0.33 mass % of Co, 0.044 to 0.097 mass % of P, 0.005 to 0.80 mass % of Sn, and 0.00005 to 0.0050 mass % of O, wherein a content [Co] mass % of Co and a content [P] mass % of P satisfy a relationship of 2.9≦([Co]−0.007)/([P]−0.008)≦6.1, and the remainder includes Cu and inevitable impurities. The high strength and high conductivity copper alloy pipe, rod, or wire is produced by a process including a hot extruding process. Strength and conductivity of the high strength and high conductivity copper pipe, rod, or wire are improved by uniform precipitation of a compound of Co and P and by solid solution of Sn. | 07-21-2011 |
20110265916 | HIGH-STRENGTH AND HIGH-ELECTRICAL CONDUCTIVITY COPPER ALLOY ROLLED SHEET AND METHOD OF MANUFACTURING THE SAME - A high-strength and high-electrical conductivity copper alloy rolled sheet has an alloy composition containing 0.14 to 0.34 mass % of Co, 0.046 to 0.098 mass % of P, 0.005 to 1.4 mass % of Sn and the balance including Cu and inevitable impurities, wherein [Co] mass % representing a Co content and [P] mass % representing a P content satisfy the relationship of 3.0≦([Co]−0.007)/([P]−0.009)≦5.9. In a metal structure, precipitates are formed, the shape of the precipitates is substantially circular or elliptical, the precipitates have an average grain diameter of 1.5 to 9.0 nm, or 90% or more of all the precipitates have a diameter of 15 nm or less to be fine precipitates, and the precipitates are uniformly dispersed. With the precipitation of the fine precipitates of Co and P and the solid-solution of Sn, the strength, conductivity and heat resistance are improved and a reduction in costs is realized. | 11-03-2011 |
20110265917 | HIGH-STRENGTH AND HIGH-ELECTRICAL CONDUCTIVITY COPPER ALLOY ROLLED SHEET AND METHOD OF MANUFACTURING THE SAME - In a high-strength and high-electrical conductivity copper alloy rolled sheet, 0.14 to 0.34 mass % of Co, 0.046 to 0.098 mass % of P, 0.005 to 1.4 mass % of Sn are contained, [Co] mass % representing a Co content and [P] mass % representing a P content satisfy the relationship of 3.0≦([Co]−0.007)/([P]−0.009)≦5.9, a total cold rolling ratio is equal to or greater than 70%, a recrystallization ratio is equal to or less than 45% a an average grain size of recrystallized grains is in the range of 0.7 to 7 μm, an average grain diameter of precipitates is in the range of 2.0 to 11 nm, and an average grain size of fine crystals is in the range of 0.3 to 4 μm. By the precipitates of Co and P, the solid solution of Sn, and fine crystals, the strength, conductivity and ductility of the copper alloy rolled sheet are improved. | 11-03-2011 |
20150198391 | HIGH STRENGTH AND HIGH THERMAL CONDUCTIVITY COPPER ALLOY TUBE AND METHOD FOR PRODUCING THE SAME - A high strength and high thermal conductivity copper alloy tube contains: Co of 0.12 to 0.32 mass %; P of 0.042 to 0.095 mass %; and Sn of 0.005 to 0.30 mass %, wherein a relationship of 3.0≦([Co]−0.007)/([P]−0.008)≦6.2 is satisfied between a content [Co] mass % of Co and a content [P] mass % of P, and the remainder includes Cu and inevitable impurities. Even when a temperature is increased by heat generated by a drawing process, a recrystallization temperature is increased by uniform precipitation of a compound of Co and P and by solid-solution of Sn. Thus, the generation of recrystallization nucleuses is delayed, thereby improving heat resistance and pressure resistance of the high strength and high thermal conductivity copper alloy tube. | 07-16-2015 |
Patent application number | Description | Published |
20120271950 | COMMUNICATION RESOURCE ASSIGNMENT SYSTEM - A communication resource assignment system may include a communication resource assignment tool that includes a communication resource assignment algorithm that receives previously acquired user information, and outputs resource assignment information calculated by the communication resource assignment algorithm, a resource assignment state managing unit that receives and stores the resource assignment information output from the communication resource assignment tool, and a communication resource distributing unit that accesses the resource assignment state managing unit, reads the resource assignment information, and transmits the read resource assignment information to a management target device that has output a communication resource request among a plurality of management target devices that perform communication with each other via a network. | 10-25-2012 |
20130308016 | INFORMATION DISPLAY DEVICE AND INFORMATION DEVICE SYSTEM - An information display device may include: an image capturing unit configured to capture an image; a display unit configured to display the image captured by the image capturing unit; a detection unit configured to detect a position and an attitude of the information display device; an identification unit configured to identify a field device positioned in a direction of image capturing by the image capturing unit, by using a detection result of the detection unit; and a display control unit configured to cause an overlaid display on the display unit of the image captured by the image capturing unit, overlaid with at least one of static information and dynamic information regarding the field device identified by the identification unit. | 11-21-2013 |
20140368541 | INFORMATION DISPLAY APPARATUS AND INFORMATION DISPLAY METHOD - An information display apparatus includes an image pick-up unit configured to picking up an image, a display unit configured to display the image picked up by the image pick-up unit, a first correcting unit configured to correct the image picked up by the image pick-up unit to generate a first image, a second correcting unit configured to correct the image picked up by the image pick-up unit to generate a second image, a recognizing unit configured to recognize the second image generated by the second correcting unit, and a display control unit configured to display an additional information according to a result of the recognition performed by the recognizing unit with superimposing the additional information on the first image generated by the first correcting unit on the display unit. | 12-18-2014 |
Patent application number | Description | Published |
20100159156 | THIN FILM FORMING APPARATUS AND THIN FILM FORMING METHOD - Disclosed is a thin film forming apparatus which is a plasma discharge processing apparatus for performing a plasma discharge processing on the surface of a continuously transported base at or near atmospheric pressure, wherein a reverse flow of the processing gas is prevented and thus a thin film having good quality is formed by a uniform gas flow. The thin film forming apparatus is characterized by having an auxiliary gas discharge means for discharging an auxiliary gas for preventing a reverse flow of the processing gas. Also disclosed are a thin film forming method, and a thin film. | 06-24-2010 |
20110052924 | THIN FILM FORMING METHOD AND THIN FILM STACK - A thin film forming method by a plasma discharging treatment under atmospheric pressure with a thin film forming apparatus which has a first discharging space for forming a functional thin film on a substrate, and a second discharge space for post-treating the substrate which formed the thin film. The first discharge space has a roller electrodes pair. The thin film forming method includes, a film forming process at the first discharge space which includes the steps of transporting the substrate by the roller electrodes; supplying discharging gas and thin film forming gas into the first discharging space; and generating a high frequency electric field between the roller electrodes. The post-treatment process includes the steps of introducing the substrate on which the functional film is formed; and supplying a discharging gas and post-treatment gas between the facing electrodes; and, generating a high frequency electric field between the facing electrode and the roller electrode. | 03-03-2011 |
20130115423 | GAS BARRIER FILM, PROCESS FOR PRODUCTION OF GAS BARRIER FILM, AND ELECTRONIC DEVICE - The present invention provides a gas barrier film having high barrier properties, folding/bending resistance and smoothness and excellent cutting suitability, and also provides an organic photoelectric conversion element equipped with the gas barrier film. The gas barrier film is characterized by having a gas barrier layer unit ( | 05-09-2013 |
Patent application number | Description | Published |
20090111358 | Polishing apparatus and polishing method - The present invention provides a apparatus for polishing an object material such as a film on a substrate. This apparatus includes a polishing table for holding a polishing pad having a polishing surface, a motor configured to drive the polishing table, a holding mechanism configured to hold a substrate having an object material to be polished and to press the substrate against the polishing surface, a dresser configured to dress the polishing surface, and a monitoring unit configured to monitor a removal amount of the object material. The monitoring unit is operable to calculate the removal amount of the object material using a model equation containing a variable representing an integrated value of a torque current of the motor when polishing the object material and a variable representing a cumulative operating time of the dresser. | 04-30-2009 |
20110172800 | SCHEDULER, SUBSTRATE PROCESSING APPARATUS, AND METHOD OF TRANSFERRING SUBSTRATES IN SUBSTRATE PROCESSING APPARATUS - A scheduler generates not only normal substrate transferring schedules for substrates newly supplied to a substrate processing apparatus, but also substrate transferring schedules for keeping a high production quantity in the event of a failure. The scheduler is used in a substrate processing apparatus including a plurality of substrate processing sections for processing substrates, a transfer device for transferring the substrates, and a controller for controlling the substrate processing units to process the substrates and controlling the transfer device to transfer the substrates. The scheduler is incorporated in the controller for calculating a substrate transferring schedule and has a function to successively calculate substrate transferring schedules for substrates which are newly supplied to the substrate processing apparatus, and, in the event of a fault occurring in the substrate processing apparatus, to recalculate the substrate transferring schedules with an initial state represented by a state including the fault. | 07-14-2011 |
Patent application number | Description | Published |
20110234348 | RARE-EARTH MAGNET, METHOD OF MANUFACTURING RARE-EARTH MAGNET, AND ROTATOR - A rare-earth magnet is an R-T-B-based rare-earth magnet containing a rare-earth element R, a transition metal element T, and boron B. The rare-earth magnet further contains Cu and Co, while having a Cu concentration distribution with a gradient along a direction from a surface of the rare-earth magnet to the inside thereof, Cu having a higher concentration on the surface side of the rare-earth magnet than on the inside thereof, and a Co concentration distribution with a gradient along a direction from the surface of the rare-earth magnet to the inside thereof, Co having a higher concentration on the surface side of the rare-earth magnet than on the inside thereof. The rare-earth magnet is excellent in corrosion resistance. | 09-29-2011 |
20120307309 | IMAGE FORMING SYSTEM, INFORMATION FORMING APPARATUS, AND COMPUTER READABLE MEDIUM - An image forming system includes a first storage unit that stores identification information and storage information with the identification information mapped to the storage information, the identification information identifying a user, the storage information indicating a storage location where image data corresponding to the identification information is stored, an identifying unit that, in response to the identification information input by the user, identifies the storage location indicated by the storage information stored on the first storage unit with the identification information mapped thereto, a retrieval unit that retrieves, from the storage location identified by the identifying unit, the image data corresponding to the identification information, and an image forming unit that forms an image responsive to the image data retrieved by the retrieval unit. | 12-06-2012 |
20130094051 | IMAGE FORMING SYSTEM, IMAGE FORMING APPARATUS, AND NON-TRANSITORY COMPUTER READABLE MEDIUM - An image forming system includes an image forming apparatus, a transmission apparatus, a reception section that is provided in the image forming apparatus and receives a designation of the transmission apparatus, a first transmission section that is provided in the image forming apparatus and transmits apparatus information indicating the own apparatus to a transmission apparatus designated in the reception section, a first storage unit that is provided in the transmission apparatus and stores the apparatus information transmitted from the first transmission section, a second transmission section that is provided in the transmission apparatus and transmits image data to an image forming apparatus indicated by the apparatus information stored in the first storage section, and an image forming unit that is provided in the image forming apparatus and forms an image corresponding to the image data transmitted from the second transmission section. | 04-18-2013 |
20130107307 | IMAGE FORMING SYSTEM, IMAGE FORMING DEVICE, AND NON-TRANSITORY COMPUTER READABLE MEDIUM | 05-02-2013 |
20130107315 | IMAGE FORMING SYSTEM, IMAGE FORMING DEVICE, AND NON-TRANSITORY COMPUTER READABLE MEDIUM | 05-02-2013 |
20130114103 | IMAGE FORMING SYSTEM - An image forming system includes plural image forming devices, a determining unit determining an image forming device in which image data corresponding to user information is stored among the plural image forming devices, a first storage unit storing the user information and device information in a correlated manner, a transmitting device in which the user information is preset, a transmitting unit transmitting image data corresponding to the preset user information to the determined image forming device with respect to the user information, a second storage unit storing the transmitted image data, a receiving unit receiving an input of the user information, a first acquiring unit acquiring image data from an image forming device correlated with the input user information, and an image forming unit forming an image acquired by the first acquiring unit. | 05-09-2013 |
20130260228 | LITHIUM-ION SECONDARY BATTERY - The lithium-ion secondary battery includes a positive electrode containing an active material made of a compound including lithium and a transition metal; an electrolyte containing 5 to 30 ppm of hydrofluoric acid; and a negative electrode containing 1 to 100 ppm of vanadium. | 10-03-2013 |
20150205409 | TRANSPARENT CONDUCTOR AND TOUCH PANEL - The transparent conductor includes a transparent substrate, a first metal oxide layer, a metal layer, and a second metal oxide layer laminated. At least one of the first and the second metal oxide layers contains four components of Al | 07-23-2015 |
Patent application number | Description | Published |
20090292039 | OXIME ESTER COMPOUND AND PHOTOPOLYMERIZATION INITIATOR CONTAINING THE SAME - Disclosed is an oxime ester compound represented by the following general formula (I). (In the formula, R | 11-26-2009 |
20110129778 | OXIME ESTER COMPOUND AND PHOTOPOLYMERIZATION INITIATOR CONTAINING THE SAME - The invention provides a novel compound useful as a highly-sensitive photopolymerization initiator that has excellent stability, low sublimability, excellent developability, and high transmittance in the visible region and that efficiently absorbs, and is activated by, near-ultraviolet rays such as at 365 nm. Also provided are a photopolymerization initiator and a photosensitive composition using the above-described compound. Specifically, the invention provides an oxime ester compound represented by the following general formula (I), a photopolymerization initiator containing the same, and a photosensitive composition containing the photopolymerization initiator and a polymerizable compound having an ethylenically unsaturated bond: | 06-02-2011 |
20150064623 | NOVEL COMPOUND AND PHOTOSENSITIVE RESIN COMPOSITION - A novel compound having satisfactory sensitivity (base generating performance), a photosensitive resin composition containing the compound as a photo-initiator, and a cured product of the composition are provided. Specifically, a compound represented by general formula (1) (compound (1)), a photosensitive resin composition containing (A) a photo-initiator including at least one compound (1) and (B) a photosensitive resin are provided. Preferred are the compound (1) in which R | 03-05-2015 |
Patent application number | Description | Published |
20080237639 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - The objective of the present invention is to provide a semiconductor device of a hetero-junction field effect transistor that is capable of obtaining a high output and a high breakdown voltage and a manufacturing method of the same. | 10-02-2008 |
20090127661 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - Semiconductor devices, in particular nitride semiconductor devices for use in the manufacture of laser diodes, prevent peeling-off of the electrode, and at the same time reduces the complexity of processes and a reduction in yield. A nitride semiconductor device according to the invention includes a P-type nitride semiconductor layer with a ridge on its surface, an SiO | 05-21-2009 |
20090140389 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A nitride semiconductor device with a p electrode having no resistance between itself and other electrodes, and a method of manufacturing the same are provided. A p electrode is formed of a first Pd film, a Ta film, and a second Pd film, which is an antioxidant film for preventing oxidation of the Ta film, and on a p-type contact layer of a nitride semiconductor. On the second Pd film, a pad electrode is formed. The second Pd film as an antioxidant film is formed on the entire upper surface of the Ta film which forms the p electrode, to prevent oxidation of the Ta film. This inhibits the resistance between the p electrode and the pad electrode, thereby preventing a failure in contact between the p electrode and the pad electrode and providing the low-resistance p electrode. | 06-04-2009 |
20090142871 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device provides a semiconductor device with a gallium-nitride-based semiconductor structure that allows long-term stable operation without degradation in device performance. After formation of an insulation film on a surface other than on a ridge surface, an oxygen-containing gas such as O | 06-04-2009 |
20090160054 | NITRIDE SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME - A nitride semiconductor device is provided which reduces the contact resistance at the interface between a P-type electrode and a nitride semiconductor layer. A nitride semiconductor device includes a P-type nitride semiconductor layer and a P-type electrode formed on the P-type nitride semiconductor layer. The P-type electrode is formed by successive laminations of a metal layer of a metal having a work function of 5.1 eV or more, a Pd layer of palladium, and a Ta layer of tantalum on the P-type nitride semiconductor layer. | 06-25-2009 |
20090170304 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - A method of manufacturing a semiconductor device is provided, which can reduce the contact resistance of an ohmic electrode to a p-type nitride semiconductor layer and can achieve long-term stable operation. In forming, in an electrode forming step, a p-type ohmic electrode of a metal film by successive lamination of a Pd film which is a first p-type ohmic electrode and a Ta film which is a second p-type ohmic electrode on a p-type GaN contact layer, the metal film is formed to include an oxygen atom. In the presence of an oxygen atom in the metal film, then in a heat-treatment step, the p-type ohmic electrode of the metal film is heat-treated in an atmosphere that contains no oxygen atom-containing gas. | 07-02-2009 |
20100244041 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF - An isolation layer for suppressing a leakage current is provided at least between a channel layer and a buffer layer formed under the channel layer in the buffer layer. | 09-30-2010 |
20110316047 | SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF THE SAME - The objective of the present invention is to provide a semiconductor device of a hetero-junction field effect transistor that is capable of obtaining a high output and a high breakdown voltage and a manufacturing method of the same. The present invention is a semiconductor device of a hetero junction field effect transistor provided with an Al | 12-29-2011 |
20130020584 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME - In the present invention, provided is a semiconductor device, including: a GaN channel layer which is provided on a substrate and through which electrons run; a barrier layer which is provided on the GaN channel layer and which contains at least one of In, Al, and Ga and contains N; a gate electrode which is provided on the barrier layer; and a source electrode and a drain electrode which are provided on the substrate across the gate electrode, in which, in a portion of the barrier layer between the gate electrode and the drain electrode, a magnitude of polarization of the barrier layer is smaller on the gate electrode side than on the drain electrode side. Thus, PAE can be improved by reducing Rd and Cgd simultaneously. | 01-24-2013 |
20130141156 | High Electron Mobility Transistors with Multiple Channels - A device includes a source for transmitting an electronic charge through a conduction path; a drain for receiving the electronic charge; a stack for providing at least part of the conduction path; and a gate operatively connected to the stack for controlling a conduction of the electronic charge. The stack includes an insulator layer, an N-polar layer and a barrier layer selected such that, during an operation of the device, the conduction path formed in the N-polar layer includes a two-dimensional electron gas (2DEG) channel and an inversion carrier channel. | 06-06-2013 |
20130175544 | SEMICONDUCTOR DEVICE, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE - It is an object to attain both high gain and a broad band (that is, to attain both reduction in a gate-drain capacitance and reduction in a source-drain capacitance). Provided is a semiconductor device, including: a GaN channel layer ( | 07-11-2013 |
20140019096 | TRANSISTOR CHARACTERISTIC CALCULATION APPARATUS USING LARGE SIGNAL EQUIVALENT CIRCUIT MODEL - A transistor characteristic calculation apparatus using a large signal equivalent circuit model has a buffer trap circuit provided between a drain terminal and a source terminal such that a parallel circuit including a resistor and a capacitor, a diode, and another parallel circuit including a resistor and a capacitor are in turn connected in series. | 01-16-2014 |
20150035066 | FET CHIP - An FET chip is configured to include an oscillation suppression circuit that has a gate capacitance C formed between a gate electrode 5 | 02-05-2015 |
20150249150 | TRANSISTOR HAVING NITRIDE SEMICONDUCTOR USED THEREIN AND METHOD FOR MANUFACTURING TRANSISTOR HAVING NITRIDE SEMICONDUCTOR USED THEREIN - A portion of an AlN spacer layer of a high electron mobility transistor (GaN HEMI) having a nitride semiconductor used therein is removed only in a region directly below a gate electrode and in a vicinity of the region, and a length of a portion where the AlN spacer layer is not present is sufficiently smaller than a distance between a source electrode and a drain electrode. | 09-03-2015 |