Patent application number | Description | Published |
20100150041 | WIRELESS COMMUNICATION APPARATUS HAVING SELF SENSING FUNCTION - Disclosed is a wireless communication apparatus having a self sensing function, which can detect an object by use of a wake-up function without employing a separate sensor. The wireless communication apparatus includes a communication unit wirelessly communicating with a server forming a wireless network, and a wake-up unit waking up the communication unit under the control of the server when the communication unit is in sleep mode, and sensing the presence of an object within a preset communication range according to a reflection signal, which is a signal reflected by the object after being transmitted from the communication unit. | 06-17-2010 |
20110280334 | DIGITAL AMPLITUDE MODULATOR AND POLAR TRANSMITTER USING THEREOF - The present invention provides a digital amplitude modulator and polar transmitter using the same. The polar transmitter includes: a polar converter for converting an input signal into an amplitude information signal and a phase information signal, and outputting the converted amplitude and phase information signal; a sigma-delta modulator for receiving a fractional part of the amplitude information signal, and generating a correcting value for an integer part of the amplitude information signal; a phase-modulator for upward-modulating the phase information signal outputted from the polar converter, and outputting carrier waves including the upward-modulated phase information signal; and a digital power amplifier for generating an output signal whose amplitude corresponds to the integer part of the amplitude information signal which is subjected to correction by the correcting value, and outputting combining the output signal with an output value of the phase-modulator to output the combined signal. | 11-17-2011 |
20110309885 | DELAY CIRCUIT FOR LOW POWER RING OSCILLATOR - Disclosed herein is a delay circuit for a low power ring oscillator. The delay circuit includes: a pair of N type transistors that receive first differential input signals Vin | 12-22-2011 |
20120235801 | Wireless apparatus having wake-up function - A wireless apparatus having a non-electric power-type wake-up function that operates a wake-up circuit waking-up a microprocessor for communications without power. There is provided a wireless apparatus having a wake-up function, including: a wake-up unit that has a rectifying circuit having elements configured as passive elements and rectifies preset first wireless signals to transmit wake-up signals; and a wireless communications unit that is woken-up by the wake-up signals from the wake-up unit to perform communications using preset second wireless signals, in a sleep mode. | 09-20-2012 |
20120268197 | PAD CONTROLLING APPARATUS - Disclosed herein is a pad controlling apparatus controlling current and voltage applied to a pad, the pad controlling apparatus including: a voltage drop unit dropping the voltage applied to the pad; a switching unit connected in parallel with the voltage drop unit; and a control unit comparing a level of the dropped voltage and first reference voltage with each other and turning on the switching unit on when the level of the dropped voltage is larger than the first reference voltage. According to the present invention, even though interrupt occurs from the outside, a chip may be normally operated. | 10-25-2012 |
20130082672 | CAPACITOR-FREE LOW DROP-OUT REGULATOR - There is provided a low drop-out regulator. The low drop-out regulator includes an amplifier including an odd number of operational amplifiers connected to one another in series, and an output unit including a pass transistor operated by an output from the amplifier and generating an output voltage to be applied to a load, wherein the pass transistor is an N-channel transistor, and the amplifier controls a feedback loop gain between an output terminal of one of the odd number of operational amplifiers and the output unit. The feedback loop gain may be controlled independently from the trans-conductance of the pass transistor, whereby the stable output voltage may be generated, even in the case that the load and the input voltage are changed, and the design parameter may be simplified. | 04-04-2013 |
20130107775 | WIRELESS COMMUNICATIONS TERMINAL HAVING RF DIRECT WAKEUP FUNCTION AND WAKEUP METHOD THEREOF | 05-02-2013 |
20140292107 | ELECTRONIC SHELF LABEL (ESL) TAG - Disclosed herein is an electronic shelf label (ESL) tag including a power adjusting unit connected to the battery to receive power, wherein the power adjusting unit boosts power and provides the boosted power to an IC when the IC is in an active mode, and transfers the power to the IC as it is when the IC is in a sleep mode. Therefore, the ESL tag may be normally operated even though a voltage drop phenomenon of a battery occurs. | 10-02-2014 |
Patent application number | Description | Published |
20090147841 | DISTRIBUTED VIDEO CODING APPARATUS AND METHOD CAPABLE OF CONTROLLING ENCODING RATE - There are provided a distributed video coding apparatus and method capable of controlling an encoding rate, the apparatus including: an intra-frame encoder encoding a key frame and outputting a bit stream of the encoded key frame; an encoder rate control (ERC) module calculating a bit rate according to motion complexity of a present Wyner-Ziv (WZ) frame by using a correlation between the motion complexity and the bit rate; and a turbo encoder encoding the present WZ frame by the bit rate calculated at the ERC module and outputting the encoded WZ bit stream. | 06-11-2009 |
20090158285 | APPARATUS AND METHOD FOR CONTROLLING RESOURCE SHARING SCHEDULE IN MULTI-DECODING SYSTEM - An apparatus for controlling a resource sharing schedule in a multi-decoding system including a multi-decoder formed of a plurality of resources, the apparatus including: a storage unit storing status information of the resources and information required in controlling the resource sharing schedule; and a controller, when a source resource requests assignment of a target resource, assigning the target resource, outputting information of the target resource to the source resource, and updating statuses of the resources, wherein the apparatus controls the resource sharing schedule while bidirectionally connected to the resources to share the resources between the multi-decoders. Accordingly, it is possible to reduce an overall decoding time and controlling a resource usage schedule. | 06-18-2009 |
20100142620 | METHOD OF GENERATING SIDE INFORMATION BY CORRECTING MOTION FIELD ERROR IN DISTRIBUTED VIDEO CODING AND DVC DECODER USING THE SAME - Disclosed is a technique that shifts the position of a motion compensation block by an error of a motion field and then performs motion compensation to estimate a current frame from past and future frames in digital video coding (DVC), thereby enhancing the accuracy of current frame estimation results. | 06-10-2010 |
20110149984 | CONFIGURATION MEMORY APPARATUS IN FPGA AND ROUTER SYSTEM USING THE SAME - Disclosed are a configuration memory apparatus and a router system using the same. The configuration memory apparatus includes: a selection unit selecting one of a first external device and a storage unit and receiving data; a register storing input data received from the selection unit; a storage unit storing data received from the register; and an I/O unit controlling transmission and reception of data to and from the register and a second external device. | 06-23-2011 |
20110154149 | PARITY GENERATING APPARATUS AND MAP APPARATUS FOR TURBO DECODING - An apparatus for generating a parity bit for turbo decoding, and a MAP (Maximum A Posteriori) apparatus are provided. The apparatus for generating a parity bit for turbo decoding includes: a index converter calculating forward and reverse state matrices with respect to a parity bit by maintaining or changing the relationship between the forward and reverse state matrices with respect to information bits and input symbols according to an encoder state; and a parity calculation unit calculating a parity bit by using the forward and reverse state matrices calculated by the parity state matric calculation unit. | 06-23-2011 |
20120161813 | SWITCH APPARATUS FOR FIELD PROGRAMMABLE GATE ARRAY - A switch apparatus of a Field Programmable Gate Array (FPGA) includes a pass transistor configured to switch and transfer an input signal to a logic cell according to a value of a configuration memory, and a voltage maintaining unit connected between the configuration memory and a gate of the pass transistor and configured to delay a drop of a gate voltage. | 06-28-2012 |
20130147516 | SWITCH BLOCK CIRCUIT IN FIELD PROGRAMMABLE GATE ARRAY - A switch block circuit in a field programmable gate array is provided. The switch block circuit includes a configuration memory unit including first group memories and second group memories and a switching unit including first group switching transistors and second group switching transistors. The switch block circuit further includes a selection unit for correspondingly connecting the second group memories with the second group switching transistors depending on an operation mode. The switch block is efficiently reconfigurable depending on the intended use, and configuration memories unused in a specific operation mode may be applied to other purposes. | 06-13-2013 |
Patent application number | Description | Published |
20090253186 | MICROORGANISM PRODUCING L-METHIONINE PRECURSOR AND THE METHOD OF PRODUCING L-METHIONINE PRECURSOR USING THE MICROORGANISM - The present invention relates to a microorganism producing L-methionine precursor, O-acetylhomoserine, and a method of producing L-methionine precursor using the microorganism. | 10-08-2009 |
20090253187 | MICROORGANISM PRODUCING L-METHIONINE PRECURSOR AND THE METHOD OF PRODUCING L-METHIONINE PRECURSOR USING THE MICROORGANISM - The present invention relates to a microorganism producing L-methionine precursor, O-succinylhomoserine, and a method of producing L-methionine precursor using the microorganism, | 10-08-2009 |
20110053252 | MICROORGANISM PRODUCING O-ACETYL-HOMOSERINE AND THE METHOD OF PRODUCING O-ACETYL-HOMOSERINE USING THE MICROORGANISM - Disclosed herein are a microorganism strain capable of producing the L-methionine precursor O-acetyl homoserine in high yield and a method of producing O-acetyl homoserine using the same. The microorganism strain is a strain of | 03-03-2011 |
20110053253 | MICROORGANISM PRODUCING O-ACETYL-HOMOSERINE AND THE METHOD OF PRODUCING O-ACETYL-HOMOSERINE USING THE MICROORGANISM - Disclosed is a strain of | 03-03-2011 |
20110207184 | MICROORGANISM PRODUCING L-METHIONINE PRECURSOR AND THE METHOD OF PRODUCING L-METHIONINE PRECURSOR USING THE MICROORGANISM - The present invention relates to a microorganism producing L-methionine precursor, O-acetylhomoserine, and a method of producing L-methionine precursor using the microorganism. | 08-25-2011 |
20120123158 | Method for Increasing Methionine Productivity Using a Mixture of Methyl Mercaptan and Dimethyl Sulfide - The present invention relates to a method for increasing L-methionine productivity and organic acid productivity. More particularly, the present invention relates to a method which involves adding a mixture containing methyl mercaptan and dimethyl sulfide at a appropriate ratio to O-acetyl homoserine or O-succinyl homoserine and to an enzyme having an activity of converting methionine precursor into L-methionine, so as to perform an enzyme reaction, to thereby improve the conversion rate of L-methionine and organic acid from the L-methionine precursor, and thus increasing L-methionine yield as compared to conventional method. | 05-17-2012 |
20120136058 | Method For Increasing The Solubility Of Methionine By Mineral Addition And Acid Treatment - The present invention relates to a method for enhancing the solubility of methionine. More particularly, the present invention relates to a method for increasing the solubility of methionine, in which mineral and sulfuric acid are added at an appropriate ratio to enhance the methionine solubility, thereby overcoming the problem of low solubility of methionine in water. | 05-31-2012 |
20130273614 | NOVEL O-ACETYLHOMOSERINE SULFHYDRYLASE OR MUTANT PROTEIN THEREOF, AND METHOD FOR CONVERTING TO METHIONINE USING THE SAME - The present invention relates to a novel protein having O-acetylhomoserine sulfhydrylase activity, a mutant protein thereof, a polynucleotide encoding the same, a recombinant vector comprising the polynucleotide, a microorganism transformed with the recombinant vector, and a method for producing methionine or acetic acid using the protein. The production method of the present invention has the advantage of producing L-methionine and acetic acid cost-effectively through having higher conversion rate and reduced reaction time compared to the existing methods, and it can minimize the amount of enzyme homogenate added when using the mutant protein, thereby easily producing L-methionine and acetic acid at high yield. | 10-17-2013 |
20130273615 | MODIFIED POLYPEPTIDE HAVING HOMOSERINE ACETYLTRANSFERASE ACTIVITY AND MICROORGANISM EXPRESSING THE SAME - The present invention relates to a polypeptide that is modified to have homoserine O-acetyltransferase activity, and in particular, the present invention provides a modified polypeptide having homoserine O-acetyltransferase activity, in which the amino acid at position 111 of a polypeptide having homoserine succinyltransferase activity is substituted with other amino acid. | 10-17-2013 |
20140315263 | METHOD FOR THE PREPARATION OF NICOTINIC ACID - A method for the preparation of nicotinic acid, which includes the step of obtaining a culture solution containing quinolinic acid by incubating a microorganism having an ability to produce quinolinic acid, and the step of adding an acid to the culture solution and conducting a decarboxylation reaction. | 10-23-2014 |
20150026824 | DEVICE AND METHOD FOR PROVIDING USER ACTIVITY INFORMATION IN PORTABLE TERMINAL - A device and a method for providing user activity information in a portable terminal are provided. The method includes receiving and storing log data from a specific application, generating user situation information representing a current status of a user based on the stored log data, and transmitting the generated user situation information to the specific application. | 01-22-2015 |
Patent application number | Description | Published |
20100165277 | IN-PLANE-SWITCHING MODE LIQUID CRYSTAL DISPLAY DEVICE - An in-plane-switching mode liquid crystal display device is disclosed. The LCD device includes: first and second substrates opposite to each other; a liquid crystal layer interposed between the first and second substrates; a passivation film formed on the first substrate in which a thin film transistor is disposed; pixel and common electrodes arranged alternately with each other; and a first alignment film formed on the pixel and common electrodes. The liquid crystal layer and the passivation film are formed to have lower non-resistances than that of the first alignment film. | 07-01-2010 |
20110051066 | Apparatus and method of fabricating alignment layer for liquid crystal display - Disclosed are an apparatus and method for fabricating an alignment layer for liquid crystal displays, capable of shortening process time, preventing scratches of alignment layers and decreasing black luminance. The method includes coating an alignment agent on a substrate, arranging a nano pattern mold with a groove and a protrusion to contact the alignment agent, pre-curing the alignment agent, separating the nano pattern mold from the alignment agent, and hard-curing the alignment agent separated from the nano pattern mold to form an alignment layer. | 03-03-2011 |
20110147743 | THIN FILM TRANSISTOR SUBSTRATE AND METHOD FOR FABRICATING THE SAME - The present invention relates to a thin film transistor substrate and a method for fabricating the same, which can shorten a process time, prevent a scratch from taking place at an alignment film, and increase black luminance. The thin film transistor substrate includes a thin film transistor formed on a substrate, a protective film formed to flatten a step of the thin film transistor and have an uneven surface with repetitive projected patterns and recessed patterns, a pixel electrode formed on the protective film to maintain an uneven shape of the protective film, and an alignment film formed both on the protective film and the pixel electrode to maintain the uneven shapes of the protective film and the pixel electrode. | 06-23-2011 |
20140368775 | LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - An alignment film for liquid crystal display device includes a first portion positioned towards to the liquid crystal layer and a second portion positioned away from the liquid crystal layer. The first portion provides improved anchoring force while the second portion exhibits a lower volume resistance than the first portion. Thus, AC image sticking and DC image sticking can be minimized at the same time. | 12-18-2014 |
20140368779 | LIQUID CRYSTAL DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME - Provided is a method of manufacturing new liquid crystal display device according to an embodiment of the present invention. Firstly, an alignment film is formed on a substrate. The alignment film is divided into a first alignment film formed using, as a precursor, liquid-state polyimide that contains a photodecomposition substance and a second alignment film formed using, as a precursor, a polyamic acid that does not contain a photodecomposition substance. UV light is irradiated to the alignment film, and decomposed substances formed by irradiation of the UV light is removed by an at least two-step removing process. By the method of manufacturing a liquid crystal display device according to the exemplary embodiment of the present disclosure, bright spots are minimized in pixels and a brightness of black is lowered, so that a liquid crystal display device with a high contrast ratio can be realized. | 12-18-2014 |
Patent application number | Description | Published |
20110192663 | WIG Vehicle Excluding Horizontal Stabilizer - A body having a fuselage, a wing unit including a main wing, and a propulsion unit including an engine. The wing unit includes a main wing protruding out from the lateral center of the WIG vehicle fuselage, a downward wing which is vertically and downwardly installed on the outer tip of the main wing, and a canard which protrudes out horizontally from the front end of the fuselage, which is in the moving direction of the WIG vehicle from the main wing. The canard includes a horizontal stabilization plate which has a stationary horizontal panel structure, and a variable flap which is installed to face the rear surface of the horizontal stabilization plate. In the lateral cross section shape, the front surface portion including the leading edge is round at a proper thickness to prevent clearance generated by turning of the canard, the trailing edge is sharp and straight, and the thickness of a portion between the thickest portion and rear portion narrows. The lateral cross section of the entire horizontal stabilizer is airfoil-shaped. Accordingly, the invention is able to resolve the design problem of the horizontal stabilizer caused by a ground effect because the WIG vehicle comprises a canard for stabilizing vertical disturbance instead of a horizontal stabilizer. | 08-11-2011 |
20110206528 | Wing Structure for WIG Vehicle - The wing structure of a WIG vehicle comprising left and right main wings, left and right downward wings, and a rudder unit. The left and right main wings protrude out from the central portions of left and right sides of the WIG vehicle. The panel of the main wing is flat and tapers successively toward the lateral edge, whereof the cross-section is airfoil-shaped and has the shape of a tadpole. The panel shaped left and right downward wings are connected with both ends of the left and right main wings without a joint and are formed heading downward to suppress vortex and guidance drag generated in both ends of the main wings. The rudder units are mounted on the rear surface of the left and right downward panels with a slight gap in order to compensate asymmetry between left and right lateral ends caused by movement under control of the fuselage driving unit of the WIG vehicle and to turn the fuselage left or right. Therefore, the wing structure of the WIG vehicle is capable of minimizing vortex and guidance drag generated in both ends of the left and right main wings by maximizing ground effect. Additionally, the wing structure has advantages for absorbing impact from the fuselage when taking off and landing and stabilizing horizontal disturbance of the fuselage because the left and right downward wings occupy much more volume than a winglet. | 08-25-2011 |
20120125706 | WIG CRAFT HAVING HYBRID PROPULSION MEANS - A wing-in-ground (WIG) craft having a streamlined WIG craft body, a main wing mounted on opposite sides of the WIG craft body, a pylon mounted on the WIG craft body or the main wing, and a combined thruster having a primary thruster unit mounted on the pylon, and an auxiliary thruster unit serving as a booster used when the WIG craft takes off from a water surface. | 05-24-2012 |
Patent application number | Description | Published |
20100009508 | Methods of fabricating stack type capacitors of semiconductor devices - Provided are methods of fabricating capacitors of semiconductor devices, the methods including: forming a lower electrode on a semiconductor substrate, performing a pre-process operation on the lower electrode for suppressing deterioration of the lower electrode during a process, forming a dielectric layer on the lower electrode using a source gas and an ozone gas, and forming an upper electrode on the dielectric layer, wherein the pre-process operation and the forming of the dielectric layer may be performed in one device capable of atomic layer deposition. | 01-14-2010 |
20100240191 | METHOD OF FORMING SEMICONDUCTOR DEVICE HAVING A CAPACITOR - A method of forming a semiconductor device includes forming a lower electrode layer on a substrate, forming a surface oxide layer on the lower electrode layer, partially removing the lower electrode layer to form a lower electrode, removing the surface oxide layer to expose the lower electrode, forming a capacitor dielectric layer on the lower electrode, and forming an upper electrode on the capacitor dielectric layer. | 09-23-2010 |
20110124176 | METHODS OF FORMING A CAPACITOR STRUCTURE AND METHODS OF MANUFACTURING A SEMICONDUCTOR DEVICE USING THE SAME - In a method of forming a capacitor, a seed stopper and a sacrificial layer is formed on an insulating interlayer having a plug therethrough. An opening is formed through the sacrificial layer and the seed stopper to expose the plug. A seed is formed on an innerwall of the opening. A lower electrode is formed covering the seed on the innerwall of the opening. The sacrificial layer and the seed are removed. A dielectric layer and an upper electrode are sequentially formed on the lower electrode. | 05-26-2011 |
20110222207 | Methods of forming a dielectric layer structure, and methods of manufacturing a capacitor using the same - In a method of forming a dielectric layer structure, a precursor thin film chemisorbed on a substrate in a process chamber is formed using a source gas including a metal precursor. The process chamber is purged and pumped out to remove a remaining source gas therein and to remove any metal precursor physisorbed on the precursor thin film. The forming of the precursor thin film and the purging and pumping out of the process chamber are alternately and repeatedly performed to form a multi-layer precursor thin film. An oxidant is provided onto the multilayer precursor thin film to form a bulk oxide layer. | 09-15-2011 |
20120001267 | ELECTRODE STRUCTURE, METHOD OF FABRICATING THE SAME, AND SEMICONDUCTOR DEVICE INCLUDING THE ELECTRODE STRUCTURE - An electrode structure is disclosed. The electrode structure includes a first polysilicon layer doped with resistance adjustment impurities; a second polysilicon layer for adjusting grains, formed in the first polysilicon layer and doped with grain adjustment impurities; an ohmic metal layer formed on the first and second polysilicon layers; a barrier metal layer formed on the ohmic metal layer; and a metal layer formed on the barrier metal layer. | 01-05-2012 |
20140158964 | Semiconductor Devices Having Blocking Layers and Methods of Forming the Same - A semiconductor device includes a lower interconnection having second conductivity-type impurities on a substrate having first conductivity-type impurities. A switching device is on the lower interconnection. A first blocking layer is provided between the lower interconnection and the switching device. The first blocking layer includes carbon (C), germanium (Ge), or a combination thereof. A second blocking layer may be provided between the substrate and the lower interconnection. | 06-12-2014 |
20140231958 | CAPACITORS HAVING DIELECTRIC LAYERS WITH DIFFERENT BAND GAPS AND SEMICONDUCTOR DEVICES USING THE SAME - A capacitor of a memory device includes dielectric layers with different energy band gaps. The capacitor may include, for example, a first electrode and a first dielectric layer on the first electrode. The capacitor may further include a second dielectric layer on the first dielectric layer. The first and second dielectric layers may include the same dielectric material with different concentration of an impurity therein. A second electrode is disposed on the second dielectric layer. | 08-21-2014 |
20140264778 | PRECURSOR COMPOSITION FOR DEPOSITION OF SILICON DIOXIDE FILM AND METHOD FOR FABRICATING SEMICONDUCTOR DEVICE USING THE SAME - A precursor composition for forming a silicon dioxide film on a substrate, the precursor composition including at least one precursor compound represented by the following chemical formulas (1), (2), and (3): | 09-18-2014 |
20140367774 | Semiconductor Devices Having Partially Oxidized Gate Electrodes - Semiconductor devices are provided including a first trench in a semiconductor substrate; a first insulating film in the first trench; a first conductive film on the first insulating film, the first conductive film having upper and lower portions and filling at least a portion of the first trench; and a first work function adjustment film having first and second portions, a first lower work function adjustment film portion and a first upper work function adjustment portion. The first lower work function adjustment film portion overlaps the lower portion of the first conductive film and the first upper work function adjustment film portion overlaps the upper portion of the first conductive film between the first insulating film and the first conductive film. | 12-18-2014 |
20150060862 | SEMICONDUCTOR DEVICE - A semiconductor device includes a substrate; a first inverter disposed on the substrate and receiving a voltage from any one of a bit line and a complementary bit line; a semiconductor layer disposed on the first inverter; and first and third switch devices disposed on the semiconductor layer and adjusting a threshold voltage of the first inverter to a voltage level of any one of the bit line and the complementary bit line. | 03-05-2015 |
20150061136 | SEMICONDUCTOR DEVICES HAVING METAL SILICIDE LAYERS AND METHODS OF MANUFACTURING SUCH SEMICONDUCTOR DEVICES - Provided are a semiconductor device and a method of manufacturing the semiconductor device. In order to improve reliability by solving a problem of conductivity that may occur when an air spacer structure that may reduce a capacitor coupling phenomenon between a plurality of conductive lines is formed, there are provided a semiconductor device including: a substrate having an active region; a contact plug connected to the active region; a landing pad spacer formed to contact a top surface of the contact plug; a contact conductive layer formed to contact the top surface of the contact plug and formed in a space defined by the landing pad spacer; a metal silicide layer formed on the contact conductive layer; and a landing pad connected to the contact conductive layer in a state in which the metal silicide layer is disposed between the landing pad and the contact conductive layer, and a method of manufacturing the semiconductor device. | 03-05-2015 |